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* Merge branch 'akpm-current/current'Stephen Rothwell2019-02-061-6/+0
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| * mm, compaction: Use free lists to quickly locate a migration source -fixMel Gorman2019-02-051-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vlastimil correctly pointed out that when a fast search fails and cc->migrate_pfn is reinitialised to the lowest PFN found that the caller does not use the updated PFN. He also pointed out that there is an inconsistency between move_freelist_head and move_freelist_tail. This patch adds a new helper and uses it in move_freelist_tail so that list manipulations are avoided if the first list item traversed is a suitable migration source. The end result will be that the helpers should be symmetrical and it's been confirmed that the scan rates are slightly improved as a result of the fix but not enough to rewrite the changelogs. This is a fix for the mmotm patch mm-compaction-use-free-lists-to-quickly-locate-a-migration-source.patch . It's been provided as a combined patch as the first patch is not picked up at the time of writing and a rolled up patch is less likely to fall through the cracks. Link: http://lkml.kernel.org/r/20190204120111.GL9565@techsingularity.net Signed-off-by: Mel Gorman <mgorman@techsingularity.net> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: David Rientjes <rientjes@google.com> Cc: YueHaibing <yuehaibing@huawei.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
* | Merge remote-tracking branch 'sound/for-next'Stephen Rothwell2019-02-061-1/+0
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| * | drm: bridge: dw-hdmi: Remove superfluous snd_pcm_suspend*() callsTakashi Iwai2019-01-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | The call of snd_pcm_suspend_all() & co became superfluous since we call it in the PCM PM ops. Let's remove them. Reviewed-by: Jaroslav Kysela <perex@perex.cz> Signed-off-by: Takashi Iwai <tiwai@suse.de>
* | | Merge remote-tracking branch 'etnaviv/etnaviv/next'Stephen Rothwell2019-02-067-9/+7
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| * | | drm/etnaviv: don't restrict to certain architecturesLucas Stach2019-01-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Vivante GPU cores are found in many different SoCs and the driver does not depend on anything architecture specific, so just drop the architecture restriction. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Sam Ravnborg <sam@ravnborg.org>
| * | | drm/etnaviv: NULL vs IS_ERR() buf in etnaviv_core_dump()Dan Carpenter2019-01-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The etnaviv_gem_get_pages() never returns NULL. It returns error pointers on error. Fixes: a8c21a5451d8 ("drm/etnaviv: add initial etnaviv DRM driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | Build etnaviv on non-ARM architecturesMatthew Wilcox2019-01-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I wanted to test-compile etnaviv on x86 after making a tree-wide change to it. Unfortunately, Kconfig has a bad dependency, so I couldn't. Signed-off-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| * | | drm/etnaviv: move job context pointer to etnaviv_gem_submitLucas Stach2019-01-074-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The context isn't really related to the cmdbuf, but is a property of the job. This has been missed when moving to a properly refcounted etnaviv_gem_submit. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
| * | | drm/etnaviv: fix some off by one bugsDan Carpenter2019-01-071-3/+3
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ->nr_signal is the supposed to be the number of elements in the ->signal array. There was one place where it was 5 but it was supposed to be 4. That looks like a copy and paste bug. There were also two checks that were off by one. Fixes: 9e2c2e273012 ("drm/etnaviv: add infrastructure to query perf counter") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* | | Merge remote-tracking branch 'imx-drm/imx-drm/next'Stephen Rothwell2019-02-0610-47/+137
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| * | | drm/imx: only send commit done event when all state has been appliedLucas Stach2019-01-301-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there is a small race window where we could manage to arm the vblank event from atomic flush, but programming the hardware was too close to the frame end, so the hardware will only apply the current state on the next vblank. In this case we will send out the commit done event too early causing userspace to reuse framebuffes that are still in use. Instead of using the event arming mechnism, just remember the pending event and send it from the vblank IRQ handler, once we are sure that all state has been applied sucessfully. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> [p.zabel@pengutronix.de: inverted logic: done -> pending, added back spinlock in atomic_flush] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | drm/imx: allow building under COMPILE_TESTPhilipp Zabel2019-01-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow to compile-test imx-drm on other platforms. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | | drm/imx: imx-tve: depend on COMMON_CLKPhilipp Zabel2019-01-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the TVE provides a clock to the DI, the driver can only be compiled if the common clock framework is enabled. With the COMMON_CLK dependency in place, it will be possible to allow building the other parts of imx-drm under COMPILE_TEST on architectures that do not select the common clock framework. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| * | | drm/imx: ipuv3-plane: add zpos propertyPhilipp Zabel2019-01-232-30/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a zpos property to planes. Call drm_atomic_helper_check() instead of calling drm_atomic_helper_check_modeset() and drm_atomic_check_planes() manually. This effectively adds a call to drm_atoimic_normalize_zpos() before checking planes. Reorder atomic update to allow changing plane zpos without modeset. Note that the initial zpos is set in ipu_plane_state_reset(). The initial value set in ipu_plane_init() is just for show. The zpos parameter of drm_plane_create_zpos_property() is ignored because the newly created plane do not have state yet. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | drm/imx: ipuv3-plane: add function to query atomic update statusLucas Stach2019-01-232-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function allows upper layer to check if a requested atomic update to the plane has been applied or is still pending. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> [p.zabel@pengutronix.de: inverted logic: done -> pending] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | gpu: ipu-v3: prg: add function to get channel configure statusLucas Stach2019-01-231-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows channels using the PRG to check if a requested configuration update has been applied or is still pending. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> [p.zabel@pengutronix.de: inverted logic: done -> pending] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | gpu: ipu-v3: pre: add double buffer status readbackLucas Stach2019-01-232-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the upper layers to check if a double buffer update has been applied by the PRE or is still pending. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> [p.zabel@pengutronix.de: inverted logic: done -> pending] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | gpu: ipu-v3: pre: don't trigger update if buffer address doesn't changeLucas Stach2019-01-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On a NOP double buffer update where current buffer address is the same as the next buffer address, the SDW_UPDATE bit clears too late. As we are now using this bit to determine when it is safe to signal flip completion to userspace this will delay completion of atomic commits where one plane doesn't change the buffer by a whole frame period. Fix this by remembering the last buffer address and just skip the double buffer update if it would not change the buffer address. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> [p.zabel@pengutronix.de: initialize last_bufaddr in ipu_pre_configure] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | gpu: ipu-v3: Fix CSI offsets for imx53Steve Longerbeam2019-01-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CSI offsets are wrong for both CSI0 and CSI1. They are at physical address 0x1e030000 and 0x1e038000 respectively. Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit") Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | drm/imx: imx-ldb: add missing of_node_putsJulia Lawall2019-01-171-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device node iterators perform an of_node_get on each iteration, so a jump out of the loop requires an of_node_put. Move the initialization channel->child = child; down to just before the call to imx_ldb_register so that intervening failures don't need to clear it. Add a label at the end of the function to do all the of_node_puts. The semantic patch that finds part of this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; iterator name for_each_child_of_node; @@ for_each_child_of_node(root, child) { ... when != of_node_put(child) when != e = child ( return child; | * return ...; ) ... } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | gpu: ipu-v3: Fix i.MX51 CSI control registers offsetAlexander Shiyan2019-01-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CSI0/CSI1 registers offset is at +0xe030000/+0xe038000 relative to the control module registers on IPUv3EX. This patch fixes wrong values for i.MX51 CSI0/CSI1. Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit") Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * | | drm/imx: ignore plane updates on disabled crtcsPhilipp Zabel2019-01-071-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes backtraces like the following when sending SIGKILL to a process with a currently pending plane update: [drm:ipu_plane_atomic_check] CRTC should be enabled [drm:drm_framebuffer_remove] *ERROR* failed to commit ------------[ cut here ]------------ WARNING: CPU: 3 PID: 63 at drivers/gpu/drm/drm_framebuffer.c:926 drm_framebuffer_remove+0x47c/0x498 atomic remove_fb failed with -22 Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | | Merge remote-tracking branch 'drm-msm/msm-next'Stephen Rothwell2019-02-0625-865/+277
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| * | | drm/msm/dpu: remove struct encoder_kickoff_paramsBruce Wang2019-02-056-29/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The contents of struct encoder_kickoff_params are never used. Remove the structure and all remnants of it from function calls. Changes in v2 (seanpaul): - Actually remove the struct (Jeykumar) Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm: subclass work object for vblank eventsJeykumar Sankaran2019-02-012-56/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | msm maintains a separate structure to define vblank work definitions and a list to track events submitted to the workqueue. We can avoid this redundant list and its protection mechanism, if we subclass the work object to encapsulate vblank event parameters. changes in v2: - subclass optimization on system wq (Sean Paul) changes in v3: - none changes in v4: - move flush_workqueue before irq uninstall changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm: clean up display threadJeykumar Sankaran2019-02-012-35/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since there are no clients using these threads, cleaning it up. changes in v2: - switch all the dependent clients to use system wq before removing the disp_threads (Sean Paul) changes in v3: - none changes in v4: - none changes in v5: - Rebase on latest tip with [1] (Sean Paul) [1] https://patchwork.freedesktop.org/patch/255105/ Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: use msm wq for idle power collapseJeykumar Sankaran2019-02-011-18/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | msm is using msm wq for dispatching commit and vblank events. Switch idle power collapse feature also to use msm wq to handle delayed work handlers so that msm can get rid of redundant display threads. changes in v2: - patch introduced in v2 changes in v3: - none changes in v4: - use msm wq for delayed works changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: use msm wq for vblank eventsJeykumar Sankaran2019-02-012-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DPU was using one thread per display to dispatch async commits and vblank requests. Since clean up already happened in msm to use the common thread for all the display commits, display threads are only used to cater vblank requests. Since a single thread is sufficient to do the job without any performance hits, use msm workqueue to queue requests. A separate patch is submitted later in this series to remove the display threads altogether. changes in v2: - switch to system wq before removing disp threads (Sean Paul) changes in v3: - none changes in v4: - use msm wq for vblank events changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: use kthread_destroy_worker to release msm workersJeykumar Sankaran2019-02-011-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use kthread_destroy_worker to destroy workers and release their associated kthreads. changes in v3: - introduced in the series changes in v4: - none changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Change definition of RGB565 and BGR565Tanmay Shah2019-02-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct definition of both formats by swapping red and blue channels v3: update commit message Signed-off-by: Tanmay Shah <tanmay@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Clean up dpu hw interruptsJayant Shekhar2019-02-012-88/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused functions and macros from files handling dpu hardware interrupts. changes in v2: Removed clear_interrupt_status (Jordan Crouse) changes in v3: Changed commit text Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Cleanup dpu plane interfaceJayant Shekhar2019-02-011-27/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused functions from dpu plane interface and unused variables from dpu plane state structure. Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Remove unused enum and comment from dpu mdssJayant Shekhar2019-02-011-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove enum dpu_iommu_domain from dpu mdss as its unused. Remove unnecessary comment for variable which is already removed. Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: handle failures while initializing displaysJeykumar Sankaran2019-02-011-13/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bail out KMS hw init on display initialization failures with proper error logging. changes in v3: - introduced in the series changes in v4: - avoid duplicate return on errors (Sean Paul) - avoid spamming errors on failures (Jordon Crouse) Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: fix documentation for intf_typeJeykumar Sankaran2019-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix intf_type description in msm_disp_info to show that it represents drm encoder mode of the display. changes in v3: - introduced in the series changes in v4: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Convert to a chained irq chipStephen Boyd2019-02-011-15/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices that make up DPU, i.e. graphics card, request their interrupts from this "virtual" interrupt chip. The interrupt chip builds upon a GIC SPI interrupt that raises high when any of the interrupts in the DPU's irq status register are triggered. From the kernel's perspective this is a chained irq chip, so requesting a flow handler for the GIC SPI and then calling generic IRQ handling code from that irq handler is not completely proper. It's better to convert this to a chained irq so that the GIC SPI irq doesn't appear in /proc/interrupts, can't have CPU affinity changed, and won't be accounted for with irq stats. Doing this also silences a recursive lockdep warning because we can specify a different lock class for the chained interrupts, silencing a warning that is easy to see with 'threadirqs' on the kernel commandline. WARNING: inconsistent lock state 4.19.10 #76 Tainted: G W -------------------------------- inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage. irq/40-dpu_mdss/203 [HC0[0]:SC0[2]:HE1:SE0] takes: 0000000053ea9021 (&irq_desc_lock_class){?.-.}, at: handle_level_irq+0x34/0x26c {IN-HARDIRQ-W} state was registered at: lock_acquire+0x244/0x360 _raw_spin_lock+0x64/0xa0 handle_fasteoi_irq+0x54/0x2ec generic_handle_irq+0x44/0x5c __handle_domain_irq+0x9c/0x11c gic_handle_irq+0x208/0x260 el1_irq+0xb4/0x130 arch_cpu_idle+0x178/0x3cc default_idle_call+0x3c/0x54 do_idle+0x1a8/0x3dc cpu_startup_entry+0x24/0x28 rest_init+0x240/0x270 start_kernel+0x5a8/0x6bc irq event stamp: 18 hardirqs last enabled at (17): [<ffffff9042385e80>] _raw_spin_unlock_irq+0x40/0xc0 hardirqs last disabled at (16): [<ffffff904237a1f4>] __schedule+0x20c/0x1bbc softirqs last enabled at (0): [<ffffff9040f318d0>] copy_process+0xb50/0x3964 softirqs last disabled at (18): [<ffffff9041036364>] local_bh_disable+0x8/0x20 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(&irq_desc_lock_class); <Interrupt> lock(&irq_desc_lock_class); *** DEADLOCK *** no locks held by irq/40-dpu_mdss/203. stack backtrace: CPU: 0 PID: 203 Comm: irq/40-dpu_mdss Tainted: G W 4.19.10 #76 Call trace: dump_backtrace+0x0/0x2f8 show_stack+0x20/0x2c __dump_stack+0x20/0x28 dump_stack+0xcc/0x10c mark_lock+0xbe0/0xe24 __lock_acquire+0x4cc/0x2708 lock_acquire+0x244/0x360 _raw_spin_lock+0x64/0xa0 handle_level_irq+0x34/0x26c generic_handle_irq+0x44/0x5c dpu_mdss_irq+0x64/0xec irq_forced_thread_fn+0x58/0x9c irq_thread+0x120/0x1dc kthread+0x248/0x260 ret_from_fork+0x10/0x18 ------------[ cut here ]------------ irq 169 handler irq_default_primary_handler+0x0/0x18 enabled interrupts Cc: Sean Paul <seanpaul@chromium.org> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Jayant Shekhar <jshekhar@codeaurora.org> Cc: Rajesh Yadav <ryadav@codeaurora.org> Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: maintain hw_mdp in kmsJeykumar Sankaran2019-02-013-34/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hw_mdp block is common for displays. No need to reserve per display. changes in v2: - use IS_ERR for error checking (Jordan Crouse) Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: clean up redundant hw typeJeykumar Sankaran2019-02-012-34/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct dpu_hw_blk has hw block type info. Remove duplicate type tracking in struct dpu_rm_hw_blk. changes in v2: - remove redundant type in trace api's (Sean Paul) Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: remove encoder from crtc mixer structJeykumar Sankaran2019-02-012-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not actively used. Clean up the crtc mixer struct. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: clean up dpu_rm_check_property_topctl declarationJeykumar Sankaran2019-02-011-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Definition was removed already. Clean up header declaration. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: remove dev from RMJeykumar Sankaran2019-02-013-12/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not used. Remove from RM. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: avoid tracking reservations in RMJeykumar Sankaran2019-02-012-245/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RM was equipped with reservation tracking structure RSVP to cache HW reservation of displays for certain clients where atomic_checks (atomic commit with TEST_ONLY) for all the displays are called before their respective atomic_commits. Since DPU doesn't support the sequence anymore, clean up the support from RM. Replace rsvp with the corresponding encoder id to tag the HW blocks reserved. It prepares DPU to get rid of RM altogether and track reservations using private states. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Correct initialization of modifiersFritz Koenig2019-02-011-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | allow_fb_modifiers needs to be set before drm_universal_plane_init is called. Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Initialize supported modifiersFritz Koenig2019-02-011-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass list of supported modifiers to plane init. Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Plane helper for modifiersFritz Koenig2019-02-011-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Filter planes based on the supported modifiers Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Use simple list for plane format initFritz Koenig2019-02-017-154/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the initilization of a list of formats by passing the list in directly instead of copying it from one structure to another. Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm/dpu: Remove unused format tables.Fritz Koenig2019-02-011-73/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
| * | | drm/msm: avoid unused function warningArnd Bergmann2019-01-291-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:368:13: error: 'dpu_plane_danger_signal_ctrl' defined but not used [-Werror=unused-function] Fixes: 7b2e7adea732 ("drm/msm/dpu: Make dpu_plane_danger_signal_ctrl void") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * | | drm/msm: Add __printf verificationJoe Perches2019-01-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few __printf attribute specifiers to routines that could use them. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
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