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* m68k: coldfire: drop ISA_DMA_API supportArnd Bergmann2022-05-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | After a build regression report, I took a look at possible users of CONFIG_ISA_DMA_API on m68k and found none, which Greg confirmed. The CONFIG_GENERIC_ISA_DMA option in turn is only needed to implement ISA_DMA_API, and is clearly not used on the platforms with ISA support. The CONFIG_ISA support for AMIGA_PCMCIA is probably also unneeded, but this is less clear. Unlike other PCMCIA implementations, this one does not use the drivers/pcmcia subsystem at all and just supports the "apne" network driver. When it was first added, one could use ISA drivers on it as well, but this probably broke at some point. With no reason to keep this, let's just drop the corresponding files and prevent the remaining ISA drivers that use this from getting built. The remaining definitions in asm/dma.h are used for PCI support. Link: https://lore.kernel.org/lkml/9e5ee1c3-ca80-f343-a1f5-66f3dd1c0727@linux-m68k.org/ Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: Greg Ungerer <gerg@linux-m68k.org> Acked-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
* mmc: Add driver for LiteX's LiteSDCard interfaceGabriel Somlo2022-02-281-0/+13
| | | | | | | | | | | | | | | | | | | | | LiteX (https://github.com/enjoy-digital/litex) is a SoC framework that targets FPGAs. LiteSDCard is a small footprint, configurable SDCard core commonly used in LiteX designs. The driver was first written in May 2020 and has been maintained cooperatively by the LiteX community. Thanks to all contributors! Co-developed-by: Kamil Rakoczy <krakoczy@antmicro.com> Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com> Co-developed-by: Maciej Dudek <mdudek@internships.antmicro.com> Signed-off-by: Maciej Dudek <mdudek@internships.antmicro.com> Co-developed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220113170300.3555651-4-gsomlo@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* clk: sunxi-ng: Allow the CCU core to be built as a moduleSamuel Holland2021-11-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Like the individual CCU drivers, it can be beneficial for memory consumption of cross-platform configurations to only load the CCU core on the relevant platform. For example, a generic arm64 kernel sees the following improvement when building the CCU core and drivers as modules: before: text data bss dec hex filename 13882360 5251670 360800 19494830 12977ae vmlinux after: text data bss dec hex filename 13734787 5086442 360800 19182029 124b1cd vmlinux So the result is a 390KB total reduction in kernel image size. The one early clock provider (sun5i) requires the core to be built in. Now that loading the MMC driver will trigger loading the CCU core, the MMC timing mode functions do not need a compile-time fallback. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211119033338.25486-5-samuel@sholland.org
* Merge branch 'fixes' into nextUlf Hansson2021-10-191-1/+1
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| * mmc: winbond: don't build on M68KRandy Dunlap2021-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Winbond MMC driver fails to build on ARCH=m68k so prevent that build config. Silences these build errors: ../drivers/mmc/host/wbsd.c: In function 'wbsd_request_end': ../drivers/mmc/host/wbsd.c:212:28: error: implicit declaration of function 'claim_dma_lock' [-Werror=implicit-function-declaration] 212 | dmaflags = claim_dma_lock(); ../drivers/mmc/host/wbsd.c:215:17: error: implicit declaration of function 'release_dma_lock'; did you mean 'release_task'? [-Werror=implicit-function-declaration] 215 | release_dma_lock(dmaflags); Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20211017175949.23838-1-rdunlap@infradead.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-s3c: Describe driver in KConfigKrzysztof Kozlowski2021-10-121-3/+5
|/ | | | | | | | | Describe better which driver applies to which SoC, to make configuring kernel for Samsung SoC easier. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210924133257.112017-1-krzysztof.kozlowski@canonical.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* qcom_scm: hide Kconfig symbolArnd Bergmann2021-10-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that SCM can be a loadable module, we have to add another dependency to avoid link failures when ipa or adreno-gpu are built-in: aarch64-linux-ld: drivers/net/ipa/ipa_main.o: in function `ipa_probe': ipa_main.c:(.text+0xfc4): undefined reference to `qcom_scm_is_available' ld.lld: error: undefined symbol: qcom_scm_is_available >>> referenced by adreno_gpu.c >>> gpu/drm/msm/adreno/adreno_gpu.o:(adreno_zap_shader_load) in archive drivers/built-in.a This can happen when CONFIG_ARCH_QCOM is disabled and we don't select QCOM_MDT_LOADER, but some other module selects QCOM_SCM. Ideally we'd use a similar dependency here to what we have for QCOM_RPROC_COMMON, but that causes dependency loops from other things selecting QCOM_SCM. This appears to be an endless problem, so try something different this time: - CONFIG_QCOM_SCM becomes a hidden symbol that nothing 'depends on' but that is simply selected by all of its users - All the stubs in include/linux/qcom_scm.h can go away - arm-smccc.h needs to provide a stub for __arm_smccc_smc() to allow compile-testing QCOM_SCM on all architectures. - To avoid a circular dependency chain involving RESET_CONTROLLER and PINCTRL_SUNXI, drop the 'select RESET_CONTROLLER' statement. According to my testing this still builds fine, and the QCOM platform selects this symbol already. Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Alex Elder <elder@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'clk-for-linus' of ↵Linus Torvalds2021-07-011-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This round has a diffstat dominated by Qualcomm clk drivers. Honestly though that's just a bunch of data so the diffstat reflects that. Looking beyond that there's just a bunch of updates all around in various clk drivers. Renesas and NXP (for i.MX) are two SoC vendors that have a lot of patches in here. Overall the driver changes look to be mostly enabling more clks and non-critical fixes that we could hold until the next merge window. I'm especially excited about the series from Arnd that graduates clkdev to be the only implementation of clk_get() and clk_put(). That's a good step in the right direction to migreate eveerything over to the common clk framework. Now we don't have to worry about clkdev specific details, they're just part of the clk API now. Core: - clkdev is now the only option, i.e. clk_get()/clk_put() is implemented in only one place in the kernel instead of in drivers/clk/clkdev.c and in architectures that want their own implementation New Drivers: - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs - Qualcomm MDM9607 GCC - Qualcomm SC8180X display clks - Qualcomm SM6125 GCC - Qualcomm SM8250 CAMCC (camera) - Renesas RZ/G2L SoC - Hisilicon hi3559A SoC Updates: - Stop using clock-output-names in ST clk drivers (yay!) - Support secure mode of STM32MP1 SoCs - Improve clock support for Actions S500 SoC - duty cycle setting support on qcom clks - Add TI am33xx spread spectrum clock support - Use determine_rate() for the Amlogic pll ops instead of round_rate() - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1 - Improve Amlogic axg-audio controller error on deferral - Add NNA clocks on Amlogic g12a - Reduce memory footprint of Rockchip PLL rate tables - A fix for the newly added Rockchip rk3568 clk driver - Exported clock for the newly added Rockchip video decoder - Remove audio ipg clock from i.MX8MP - Remove deprecated legacy clock binding for i.MX SCU clock driver - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif, audio, parallel interface) - Add dedicated clock ops for i.MX paralel interface - Different fixes for clocks controlled by ATF on i.MX SoCs - Add A53/A72 frequency scaling support i.MX clk-scu driver - Add special case for DCSS clock on suspend for i.MX clk-scu driver - Add parent save/restore on suspend/resume to i.MX clk-scu driver - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their bindings - Tegra clk driver no longer deasserts resets on clk_enable as it gets in the way of certain power-up sequences - Fix compile testing for Tegra clk driver - One patch to fix a divider on the Allwinner v3s Audio PLL - Add support for CPU core clock boost modes on Renesas R-Car Gen3 - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate() and improve support for multiple parents - Switch Renesas RZ/N1 divider clocks to .determine_rate() - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3 - Convert ar7 to common clk framework - Convert ralink to common clk framework" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (161 commits) clk: zynqmp: Handle divider specific read only flag clk: zynqmp: Use firmware specific mux clock flags clk: zynqmp: Use firmware specific divider clock flags clk: zynqmp: Use firmware specific common clock flags clk: lmk04832: Use of match table clk: lmk04832: Depend on SPI clk: stm32mp1: new compatible for secure RCC support dt-bindings: clock: stm32mp1 new compatible for secure rcc dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15 dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15 dt-bindings: clock: add IDs for SCMI clocks on stm32mp15 reset: stm32mp1: remove stm32mp1 reset clk: hisilicon: Add clock driver for hi3559A SoC dt-bindings: Document the hi3559a clock bindings clk: si5341: Add sysfs properties to allow checking/resetting device faults clk: si5341: Add silabs,iovdd-33 property clk: si5341: Add silabs,xaxb-ext-clk property clk: si5341: Allow different output VDD_SEL values clk: si5341: Update initialization magic clk: si5341: Check for input clock presence and PLL lock on startup ...
| * clkdev: remove CONFIG_CLKDEV_LOOKUPArnd Bergmann2021-06-081-2/+2
| | | | | | | | | | | | | | | | | | This option is now synonymous with CONFIG_HAVE_CLK, so use the latter globally. Any out-of-tree platform ports that still use a private clk_get()/clk_put() implementation should move to CONFIG_COMMON_CLK. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | mmc: sdhci-iproc: Add support for the legacy sdhci controller on the BCM7211Al Cooper2021-06-151-1/+1
|/ | | | | | | | | | Add support for the legacy Arasan sdhci controller on the BCM7211 and related SoC's. This includes adding a .shutdown callback to increase the power savings during S5. Signed-off-by: Al Cooper <alcooperx@gmail.com> Link: https://lore.kernel.org/r/20210602192758.38735-2-alcooperx@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: renesas_sdhi: do hard reset if possibleWolfram Sang2021-03-301-0/+1
| | | | | | | | | | | | All recent SDHI instances can be reset via the reset controller. If one is found, use it instead of the open coded reset. This is to get a future-proof sane reset state. Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210317091622.31890-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-esdhc-imx: Remove non-DT stubFabio Estevam2021-03-301-0/+1
| | | | | | | | | | | i.MX has been converted to a devicetree only platform, so remove the non-DT stub for sdhci_esdhc_imx_probe_dt(). Also, make the driver depend on OF now. Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20210314230824.148969-1-festevam@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: host: Retire MMC_GOLDFISHRoman Kiryanov2021-02-151-7/+0
| | | | | | | | Android Studio Emulator no longer uses this driver, so let's drop it. Signed-off-by: Roman Kiryanov <rkir@google.com> Link: https://lore.kernel.org/r/20210209190850.16647-1-rkir@google.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: add Inline Crypto Engine supportEric Biggers2021-02-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Qualcomm Inline Crypto Engine (ICE) to sdhci-msm. The standard-compliant parts, such as querying the crypto capabilities and enabling crypto for individual MMC requests, are already handled by cqhci-crypto.c, which itself is wired into the blk-crypto framework. However, ICE requires vendor-specific init, enable, and resume logic, and it requires that keys be programmed and evicted by vendor-specific SMC calls. Make the sdhci-msm driver handle these details. This is heavily inspired by the similar changes made for UFS, since the UFS and eMMC ICE instances are very similar. See commit df4ec2fa7a4d ("scsi: ufs-qcom: Add Inline Crypto Engine support"). I tested this on a Sony Xperia 10, which uses the Snapdragon 630 SoC, which has basic upstream support. Mainly, I used android-xfstests (https://github.com/tytso/xfstests-bld/blob/master/Documentation/android-xfstests.md) to run the ext4 and f2fs encryption tests in a Debian chroot: android-xfstests -c ext4,f2fs -g encrypt -m inlinecrypt These tests included tests which verify that the on-disk ciphertext is identical to that produced by a software implementation. I also verified that ICE was actually being used. Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Satya Tangirala <satyat@google.com> Signed-off-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20210126001456.382989-9-ebiggers@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: remove sirf prima/atlas driverArnd Bergmann2021-02-011-12/+0
| | | | | | | | | | | The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/r/20210120142801.334550-3-arnd@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: remove dw_mmc-zx driverArnd Bergmann2021-02-011-9/+0
| | | | | | | | | | | The zte zx platform is getting removed, so this driver is no longer needed. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210120142801.334550-2-arnd@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-of-aspeed: Add KUnit tests for phase calculationsAndrew Jeffery2021-02-011-0/+14
| | | | | | | | | Converting degrees of phase to logic delays is irritating to test on hardware, so lets exercise the function using KUnit. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210114031433.2388532-5-andrew@aj.id.au Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mediatek: depend on COMMON_CLK to fix compile testsKrzysztof Kozlowski2020-11-241-0/+1
| | | | | | | | | | | | | The MFD_OMAP_USB_HOST uses Common Clock Framework thus it cannot be built on platforms without it (e.g. compile test on MIPS with LANTIQ): mips-linux-ld: drivers/mmc/host/mtk-sd.o: in function `msdc_ops_set_ios': mtk-sd.c:(.text+0x2bbc): undefined reference to `clk_get_parent' Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201122120056.100045-1-krzk@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: host: Kconfig: fix spelling mistake "hardare" -> "hardware"Colin Ian King2020-11-171-1/+1
| | | | | | | | There is a spelling mistake in the Kconfig file. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20201114120819.416311-1-colin.king@canonical.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: s3cmci: enable compile testingKrzysztof Kozlowski2020-11-161-2/+2
| | | | | | | | The driver can be compile tested to increase build coverage. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201026153810.89512-2-krzk@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2020-10-241-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC platform updates from Olof Johansson: "SoC changes, a substantial part of this is cleanup of some of the older platforms that used to have a bunch of board files. In particular: - Remove non-DT i.MX platforms that haven't seen activity in years, it's time to remove them. - A bunch of cleanup and removal of platform data for TI/OMAP platforms, moving over to genpd for power/reset control (yay!) - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them closer to multiplatform support (not quite there yet, but getting close). There are a few other changes too, smaller fixlets, etc. For new platform support, the primary ones are: - New SoC: Hisilicon SD5203, ARM926EJ-S platform. - Cpufreq support for i.MX7ULP" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits) ARM: mstar: Select MStar intc ARM: stm32: Replace HTTP links with HTTPS ones ARM: debug: add UART early console support for SD5203 ARM: hisi: add support for SD5203 SoC ARM: omap3: enable off mode automatically clk: imx: imx35: Remove mx35_clocks_init() clk: imx: imx31: Remove mx31_clocks_init() clk: imx: imx27: Remove mx27_clocks_init() ARM: imx: Remove unused definitions ARM: imx35: Retrieve the IIM base address from devicetree ARM: imx3: Retrieve the AVIC base address from devicetree ARM: imx3: Retrieve the CCM base address from devicetree ARM: imx31: Retrieve the IIM base address from devicetree ARM: imx27: Retrieve the CCM base address from devicetree ARM: imx27: Retrieve the SYSCTRL base address from devicetree ARM: s3c64xx: bring back notes from removed debug-macro.S ARM: s3c24xx: fix Wunused-variable warning on !MMU ARM: samsung: fix PM debug build with DEBUG_LL but !MMU MAINTAINERS: mark linux-samsung-soc list non-moderated ARM: imx: Remove remnant board file support pieces ...
| * ARM: s5pv210: don't imply CONFIG_PLAT_SAMSUNGArnd Bergmann2020-08-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The plat-samsung directory and mach-s5pv210 can be build completely independently, so split the two Kconfig symbols CONFIG_PLAT_SAMSUNG and CONFIG_ARCH_S5PV210. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200806182059.2431-18-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * ARM: exynos: stop selecting PLAT_SAMSUNGArnd Bergmann2020-08-191-1/+1
| | | | | | | | | | | | | | | | | | | | Now that no code in arch/arm is shared between mach-exynos and the others, make the split formal. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20200806182059.2431-15-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* | mmc: host: fix depends for MMC_MESON_GX w/ COMPILE_TESTRandy Dunlap2020-09-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build errors for meson-gx-mmc.c when CONFIG_COMMON_CLK is not set/enabled. This can happen when COMPILE_TEST is set/enabled. ERROR: modpost: "clk_divider_ops" [drivers/mmc/host/meson-gx-mmc.ko] undefined! ERROR: modpost: "devm_clk_register" [drivers/mmc/host/meson-gx-mmc.ko] undefined! ERROR: modpost: "clk_mux_ops" [drivers/mmc/host/meson-gx-mmc.ko] undefined! ERROR: modpost: "__clk_get_name" [drivers/mmc/host/meson-gx-mmc.ko] undefined! Fixes: 54d8454436a2 ("mmc: host: Enable compile testing of multiple drivers") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20200925164323.29843-1-rdunlap@infradead.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: Drop COMPILE_TEST Kconfig option for MMC_S3CUlf Hansson2020-09-081-1/+1
| | | | | | | | | | | | | | | | MMC_S3C isn't ready yet to be built with COMPILE_TEST, hence drop it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20200908140242.743234-1-ulf.hansson@linaro.org Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
* | mmc: host: Enable compile testing of multiple driversKrzysztof Kozlowski2020-09-071-19/+21
| | | | | | | | | | | | | | | | | | Multiple MMC host controller driver can be compile tested as they do not depend on architecture specific headers. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907105254.31097-1-krzk@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: host: Drop unneeded MMC dependency in KconfigKrzysztof Kozlowski2020-09-071-2/+2
| | | | | | | | | | | | | | | | | | | | All entries in Kconfig are already part of "if MMC", so there is no need for additional dependency on MMC. Suggested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200904164315.24618-1-krzk@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | Merge branch 'fixes' into nextUlf Hansson2020-09-071-1/+1
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| * | mmc: mmc_spi: Allow the driver to be built when CONFIG_HAS_DMA is unsetUlf Hansson2020-09-071-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit cd57d07b1e4e ("sh: don't allow non-coherent DMA for NOMMU") made CONFIG_NO_DMA to be set for some platforms, for good reasons. Consequentially, CONFIG_HAS_DMA doesn't get set, which makes the DMA mapping interface to be built as stub functions, but also prevent the mmc_spi driver from being built as it depends on CONFIG_HAS_DMA. It turns out that for some odd cases, the driver still relied on the DMA mapping interface, even if the DMA was not actively being used. To fixup the behaviour, let's drop the build dependency for CONFIG_HAS_DMA. Moreover, as to allow the driver to succeed probing, let's move the DMA initializations behind "#ifdef CONFIG_HAS_DMA". Fixes: cd57d07b1e4e ("sh: don't allow non-coherent DMA for NOMMU") Reported-by: Rich Felker <dalias@libc.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Rich Felker <dalias@libc.org> Link: https://lore.kernel.org/r/20200901150438.228887-1-ulf.hansson@linaro.org
* | mmc: sdhci-msm: enable compile-testing on !ARMAlex Dewar2020-09-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | There seems to be no particular reason to only test for ARM, so allow for build-testing on other platforms to increase coverage. Build-tested on x86 with allyesconfig. Signed-off-by: Alex Dewar <alex.dewar90@gmail.com> Link: https://lore.kernel.org/r/20200824171854.406157-1-alex.dewar90@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-sparx5: Add Sparx5 SoC eMMC driverLars Povlsen2020-09-071-0/+12
| | | | | | | | | | | | | | | | | | | | This adds the eMMC driver for the Sparx5 SoC. It is based upon the designware IP, but requires some extra initialization and quirks. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200825081357.32354-3-lars.povlsen@microchip.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: Kconfig: Add RISCV and CSKY for MMC_DWGuo Ren2020-09-071-1/+1
|/ | | | | | | | | | Synopsys DesignWare MMC controller could be used in RISC-V and C-SKY architectures. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/1596887102-9743-1-git-send-email-guoren@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mediatek: command queue supportChun-Hung Wu2020-07-241-0/+1
| | | | | | | | | | | | | | | Support command queue for mt6779 platform. a. Add msdc_set_busy_timeout() to calculate emmc write timeout. b. Connect mtk msdc driver to cqhci driver through host->cq_host->ops = &msdc_cmdq_ops; c. msdc_cmdq_irq() will link up with cqchi_irq(). Besides, it provides more irq error messages like RSPCRCERR/CMDTO/DATACRCERR/DATTMO. d. Select kernel config MMC_CQHCI for MMC_MTK Signed-off-by: Chun-Hung Wu <chun-hung.wu@mediatek.com> Acked-by: Yong Mao <yong.mao@mediatek.com> Link: https://lore.kernel.org/r/1595205759-5825-4-git-send-email-chun-hung.wu@mediatek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada2020-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over '---help---'"), the number of '---help---' has been gradually decreasing, but there are still more than 2400 instances. This commit finishes the conversion. While I touched the lines, I also fixed the indentation. There are a variety of indentation styles found. a) 4 spaces + '---help---' b) 7 spaces + '---help---' c) 8 spaces + '---help---' d) 1 space + 1 tab + '---help---' e) 1 tab + '---help---' (correct indentation) f) 1 tab + 1 space + '---help---' g) 1 tab + 2 spaces + '---help---' In order to convert all of them to 1 tab + 'help', I ran the following commend: $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/' Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* Merge tag 'clk-for-linus' of ↵Linus Torvalds2020-06-101-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This time around we have four lines of diff in the core framework, removing a function that isn't used anymore. Otherwise the main new thing for the common clk framework is that it is selectable in the Kconfig language now. Hopefully this will let clk drivers and clk consumers be testable on more than the architectures that support the clk framework. The goal is to introduce some Kunit tests for the framework. Outside of the core framework we have the usual set of various driver updates and non-critical fixes. The dirstat shows that the new Baikal-T1 driver is the largest addition this time around in terms of lines of code. After that the x86 (Intel), Qualcomm, and Mediatek drivers introduce many lines to support new or upcoming SoCs. After that the dirstat shows the usual suspects working on their SoC support by fixing minor bugs, correcting data and converting some of their DT bindings to YAML. Core: - Allow the COMMON_CLK config to be selectable New Drivers: - Clk driver for Baikal-T1 SoCs - Mediatek MT6765 clock support - Support for Intel Agilex clks - Add support for X1830 and X1000 Ingenic SoC clk controllers - Add support for the new Renesas RZ/G1H (R8A7742) SoC - Add support for Qualcomm's MSM8939 Generic Clock Controller Updates: - Support IDT VersaClock 5P49V5925 - Bunch of updates for HSDK clock generation unit (CGU) driver - Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver - Enable supply regulators for GPU gdscs on Qualcomm SoCs - Add support for Si5342, Si5344 and Si5345 chips - Support custom flags in Xilinx zynq firmware - Various small fixes to the Xilinx clk driver - A single minor rounding fix for the legacy Allwinner clock support - A few patches from Abel Vesa as preparation of adding audiomix clock support on i.MX - A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and clk-pllv3 drivers - Drop dependency on ARM64 for i.MX8M clock driver, to support aarch32 mode on aarch64 hardware - A series from Peng Fan to improve i.MX8M clock drivers, using composite clock for core and bus clk slice - Set a better parent clock for flexcan on i.MX6UL to support CiA102 defined bit rates - A couple changes for EMC frequency scaling on Tegra210 - Support for CPU frequency scaling on Tegra20/Tegra30 - New clk gate for CSI test pattern generator on Tegra210 - Regression fixes for Samsung exynos542x and exynos5433 SoCs - Use of fallthrough; attribute for Samsung s3c24xx - Updates and fixup HDMI and video clocks on Meson8b - Fixup reset polarity on Meson8b - Fix GPU glitch free mux switch on Meson gx and g12 - A minor fix for the currently unused suspend/resume handling on Renesas RZ/A1 and RZ/A2 - Two more conversions of Renesas DT bindings to json-schema - Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (155 commits) clk: mediatek: Remove ifr{0,1}_cfg_regs structures clk: baikal-t1: remove redundant assignment to variable 'divider' clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible" dt-bindings: clock: Add a missing include to MMP Audio Clock binding dt: Add bindings for IDT VersaClock 5P49V5925 clk: vc5: Add support for IDT VersaClock 5P49V6965 clk: Add Baikal-T1 CCU Dividers driver clk: Add Baikal-T1 CCU PLLs driver dt-bindings: clk: Add Baikal-T1 CCU Dividers binding dt-bindings: clk: Add Baikal-T1 CCU PLLs binding clk: mediatek: assign the initial value to clk_init_data of mtk_mux clk: mediatek: Add MT6765 clock support clk: mediatek: add mt6765 clock IDs dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC CLK: HSDK: CGU: add support for 148.5MHz clock CLK: HSDK: CGU: support PLL bypassing CLK: HSDK: CGU: check if PLL is bypassed first clk: clk-si5341: Add support for the Si5345 series ...
| * mmc: meson-mx-sdio: Depend on OF_ADDRESS and not just OFStephen Boyd2020-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Making COMMON_CLK a visible option causes the sparc allyesconfig to fail to build like so: sparc64-linux-ld: drivers/mmc/host/meson-mx-sdio.o: in function `meson_mx_mmc_remove': meson-mx-sdio.c:(.text+0x70): undefined reference to `of_platform_device_destroy' sparc64-linux-ld: drivers/mmc/host/meson-mx-sdio.o: in function `meson_mx_mmc_probe': meson-mx-sdio.c:(.text+0x9e4): undefined reference to `of_platform_device_create' sparc64-linux-ld: meson-mx-sdio.c:(.text+0xdd4): undefined reference to `of_platform_device_destroy' This is because the implementation of of_platform_device_destroy() is inside an #ifdef CONFIG_OF_ADDRESS section of drivers/of/platform.c. This driver already depends on OF being enabled, so let's tighten that constrain a little more so that it depends on OF_ADDRESS instead. This way we won't try to build this driver on platforms that don't have this function. Reported-by: kbuild test robot <lkp@intel.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20200409064416.83340-7-sboyd@kernel.org Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
* | mmc: host: add Coldfire esdhc supportAngelo Dureghello2020-05-281-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver has been developed as a separate module starting from the similar sdhci-esdhc-imx.c. Reasons for a separate sdchi-esdhc-mcf driver: - m68K architecture does not support devicetrees, so modifying sdhci-of-esdhc.c that is devicetree-related adding platform data seems not appropriate, - clock-related part, has to be implemented specifically for mcf5441x family (see esdhc_mcf_pltfm_set_clock()), - this is a big endian cpu accessing a big endian controller, but about sdma, this controller does not support hw swap, which needs to be handled with specific code, - some other minor differences but mainly to avoid risks on tweaking inside largely used imx driver. Adding just a small size ColdFire-specific driver, with benefits in a further less risky maintenance. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200518191742.1251440-3-angelo.dureghello@timesys.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC hostMartin Blumenstingl2020-05-281-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC card interface with 1/4/8-bit bus width. It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock). The public S805 datasheet [0] contains a short documentation about the registers. Unfortunately it does not describe how to use the registers to make the hardware work. Thus this driver is based on reading (and understanding) the Amlogic 3.10 GPL kernel code. Some hardware details are not easy to see. Jianxin Pan was kind enough to answer my questions: The hardware has built-in busy timeout support. The maximum timeout is 30 seconds. This is only documented in Amlogic's internal documentation. The controller only works with very specific clock configurations. The details are not part of the public datasheet. In my own words the supported configurations are: - 399.812kHz: clkin = 850MHz div = 2126 sd_rx_phase = 63 - 1MHz: clkin = 850MHz div = 850 sd_rx_phase = 55 - 5.986MHz: clkin = 850MHz div = 142 sd_rx_phase = 24 - 25MHz: clkin = 850MHz div = 34 sd_rx_phase = 15 - 47.222MHz: clkin = 850MHz div = 18 sd_rx_phase = 11/15 (SDR50/HS) - 53.125MHz: clkin = 850MHz div = 16 sd_rx_phase = (tuning) - 70.833MHz: clkin = 850MHz div = 12 sd_rx_phase = (tuning) - 85MHz: clkin = 850MHz div = 10 sd_rx_phase = (tuning) - 94.44MHz: clkin = 850MHz div = 9 sd_rx_phase = (tuning) - 106.25MHz: clkin = 850MHz div = 8 sd_rx_phase = (tuning) - 127.5MHz: clkin = 1275MHz div = 10 sd_rx_phase = (tuning) - 141.667MHz: clkin = 850MHz div = 6 sd_rx_phase = (tuning) - 159.375MHz: clkin = 1275MHz div = 8 sd_rx_phase = (tuning) - 212.5MHz: clkin = 1275MHz div = 6 sd_rx_phase = (tuning) - (sd_tx_phase is always 1, 94.44MHz is not listed in the datasheet but this is what the 3.10 BSP kernel on Odroid-C1 actually uses) NOTE: CMD23 support is disabled for now because it results in command timeouts and thus decreases read performance. Tested-by: Wei Wang <lnykww@gmail.com> Tested-by: Xin Yin <yinxin_1989@aliyun.com> Reviewed-by: Xin Yin <yinxin_1989@aliyun.com> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20200512204147.504087-3-martin.blumenstingl@googlemail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: sdhci-of-at91: make MMC_SDHCI_OF_AT91 depend on HAVE_CLKMasahiro Yamada2020-05-281-1/+1
|/ | | | | | | | | | | | | | | | | | | | | If sdhci-of-at91.c is compiled without CONFIG_HAVE_CLK, the line caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul); ... emits "FIELD_PREP: value too large for the field" warning. The compiler seems to decide clk_mul is constant (unsigned int)-1, because clk_get_rate() returns 0 when CONFIG_HAVE_CLK is disabled. Add HAVE_CLK to the depenency since this driver does not work without the clock APIs anyway. Reported-by: Randy Dunlap <rdunlap@infradead.org> Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Link: https://lore.kernel.org/r/20200422153401.7913-1-yamada.masahiro@socionext.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
* mmc: host: sdhci-sprd: Add software queue supportBaolin Wang2020-03-241-0/+1
| | | | | | | | | Add software queue support to improve the performance. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/f629b32943aae9e30ffa17acf4af06c270417001.1581478569.git.baolin.wang7@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: Add MMC host software queue supportBaolin Wang2020-03-241-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the MMC read/write stack will always wait for previous request is completed by mmc_blk_rw_wait(), before sending a new request to hardware, or queue a work to complete request, that will bring context switching overhead and spend some extra time to poll the card for busy completion for I/O writes via sending CMD13, especially for high I/O per second rates, to affect the IO performance. Thus this patch introduces MMC software queue interface based on the hardware command queue engine's interfaces, which is similar with the hardware command queue engine's idea, that can remove the context switching. Moreover we set the default queue depth as 64 for software queue, which allows more requests to be prepared, merged and inserted into IO scheduler to improve performance, but we only allow 2 requests in flight, that is enough to let the irq handler always trigger the next request without a context switch, as well as avoiding a long latency. Moreover the host controller should support HW busy detection for I/O operations when enabling the host software queue. That means, the host controller must not complete a data transfer request, until after the card stops signals busy. From the fio testing data in cover letter, we can see the software queue can improve some performance with 4K block size, increasing about 16% for random read, increasing about 90% for random write, though no obvious improvement for sequential read and write. Moreover we can expand the software queue interface to support MMC packed request or packed command in future. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/4409c1586a9b3ed20d57ad2faf6c262fc3ccb6e2.1581478568.git.baolin.wang7@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add CQHCI support for sdhci-msmRitesh Harjani2020-01-241-0/+1
| | | | | | | | | | This adds CQHCI support for sdhci-msm platforms. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/1579194192-7942-3-git-send-email-vbadigan@codeaurora.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)Al Cooper2020-01-201-0/+1
| | | | | | | | | The latest Arasan controller first used in the 7216 now supports CQE so enable this feature. Signed-off-by: Al Cooper <alcooperx@gmail.com> Link: https://lore.kernel.org/r/20200113210706.11972-6-alcooperx@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-omap: Add using external dmaChunyan Zhang2020-01-201-0/+1
| | | | | | | | | | | | | | | sdhci-omap can support both external dma controller via dmaengine framework as well as ADMA which standard SD host controller provides. Fixes by Faiz Abbas <fazi_abbas@ti.com>: 1. Switch to DMA slave mode when using external DMA 2. Add offset to mapbase Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200116105154.7685-5-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: add support for using external DMA devicesChunyan Zhang2020-01-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | Some standard SD host controllers can support both external dma controllers as well as ADMA/SDMA in which the SD host controller acts as DMA master. TI's omap controller is the case as an example. Currently the generic SDHCI code supports ADMA/SDMA integrated in the host controller but does not have any support for external DMA controllers implemented using dmaengine, meaning that custom code is needed for any systems that use an external DMA controller with SDHCI. Fixes by Faiz Abbas <faiz_abbas@ti.com>: 1. Map scatterlists before dmaengine_prep_slave_sg() 2. Use dma_async() functions inside of the send_command() path and call terminate_sync() in non-atomic context in case of an error. Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200116105154.7685-4-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-of-aspeed: enable CONFIG_MMC_SDHCI_IO_ACCESSORSIvan Mikhaylov2019-11-201-0/+1
| | | | | | | | | | Enable CONFIG_MMC_SDHCI_IO_ACCESSORS for the ASPEED MMC driver. The read_l callback is used for inverted card detection. Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci_am654: Add Support for Command Queuing Engine to J721EFaiz Abbas2019-11-201-0/+1
| | | | | | | | | | Add Support for CQHCI (Command Queuing Host Controller Interface) for each of the host controllers present in TI's J721E devices. Add cqhci_ops and a .irq() callback to handle cqhci specific interrupts. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: Add Actions Semi Owl SoCs SD/MMC driverManivannan Sadhasivam2019-11-131-0/+8
| | | | | | | | | Add SD/MMC driver for Actions Semi Owl SoCs. This driver currently supports standard, high speed, SDR12, SDR25 and SDR50. DDR50 mode is supported but it is untested. There is no SDIO support for now. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-milbeaut: add Milbeaut SD controller driverTakao Orito2019-11-131-0/+11
| | | | | | | | | | | | | | | | | | SD Host controller on Milbeaut consists of two controller parts. One is core controller F_SDH30, this is similar to sdhci-fujitsu controller. Another is bridge controller. This bridge controller is not compatible with sdhci-fujitsu controller. This is special for Milbeaut series. This has some functions. For example, reset control, clock enable/select for SDR50/25/12, set property of SD physical pins, retuning control, set capabilityies. This bridge controller requires special procedures at reset or clock enablement or change for further tuning of clock. Signed-off-by: Takao Orito <orito.takao@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: host: sdhci-pci: Add Genesys Logic GL975x supportBen Chuang2019-09-271-0/+1
| | | | | | | | | | | | | | Add support for the GL9750 and GL9755 chipsets. Enable v4 mode and wait 5ms after set 1.8V signal enable for GL9750/ GL9755. Fix the value of SDHCI_MAX_CURRENT register and use the vendor tuning flow for GL9750. Co-developed-by: Michael K Johnson <johnsonm@danlj.org> Signed-off-by: Michael K Johnson <johnsonm@danlj.org> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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