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path: root/drivers/pci/intel-iommu.c
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* intel-iommu: fix bit shift at DOMAIN_FLAG_P2P_MULTIPLE_DEVICESMike Day2009-01-031-1/+1
| | | | | Signed-off-by: Mike Day <ncmike@ncultra.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* VT-d: remove now unused intel_iommu_found functionJoerg Roedel2009-01-031-6/+0
| | | | Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* VT-d: register functions for the IOMMU APIJoerg Roedel2009-01-031-0/+15
| | | | Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* VT-d: adapt domain iova_to_phys function for IOMMU APIJoerg Roedel2009-01-031-3/+4
| | | | Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* VT-d: adapt domain map and unmap functions for IOMMU APIJoerg Roedel2009-01-031-13/+20
| | | | Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* VT-d: adapt device attach and detach functions for IOMMU APIJoerg Roedel2009-01-031-12/+15
| | | | Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* VT-d: adapt domain init and destroy functions for IOMMU APIJoerg Roedel2009-01-031-15/+18
| | | | Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Check agaw is sufficient for mapped memoryWeidong Han2009-01-031-0/+61
| | | | | | | When domain is related to multiple iommus, need to check if the minimum agaw is sufficient for the mapped memory Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Change intel iommu APIs of virtual machine domainWeidong Han2009-01-031-70/+59
| | | | | | | These APIs are used by KVM to use VT-d Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Change domain_context_mapping_one for virtual machine domainWeidong Han2009-01-031-3/+52
| | | | | | | | | vm_domid won't be set in context, find available domain id for a device from its iommu. For a virtual machine domain, a default agaw will be set, and skip top levels of page tables for iommu which has less agaw than default. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Allocation and free functions of virtual machine domainWeidong Han2009-01-031-2/+105
| | | | | | | virtual machine domain is different from native DMA-API domain, implement separate allocation and free functions for virtual machine domain. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Add domain_flush_cacheWeidong Han2009-01-031-17/+26
| | | | | | | | | Because virtual machine domain may have multiple devices from different iommus, it cannot use __iommu_flush_cache. In some common low level functions, use domain_flush_cache instead of __iommu_flush_cache. On the other hand, in some functions, iommu can is specified or domain cannot be got, still use __iommu_flush_cache Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Add/remove domain device info for virtual machine domainWeidong Han2009-01-031-5/+166
| | | | | | | | | Add iommu reference count in domain, and add a lock to protect iommu setting including iommu_bmp, iommu_count and iommu_coherency. virtual machine domain may have multiple devices from different iommus, so it needs to do more things when add/remove domain device info. Thus implement separate these functions for virtual machine domain. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Add domain flag DOMAIN_FLAG_VIRTUAL_MACHINEWeidong Han2009-01-031-0/+7
| | | | | | | Add this flag for VT-d used in virtual machine, like KVM. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu coherencyWeidong Han2009-01-031-0/+24
| | | | | | | In dmar_domain, more than one iommus may be included in iommu_bmp. Due to "Coherency" capability may be different across iommus, set this variable to indicate iommu access is coherent or not. Only when all related iommus in a dmar_domain are all coherent, iommu access of this domain is coherent. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* calculate agaw for each iommuWeidong Han2009-01-031-0/+22
| | | | | | | "SAGAW" capability may be different across iommus. Use a default agaw, but if default agaw is not supported in some iommus, choose a less supported agaw. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu bitmap instead of iommu pointer in dmar_domainWeidong Han2009-01-031-30/+67
| | | | | | | In order to support assigning multiple devices from different iommus to a domain, iommu bitmap is used to keep all iommus the domain are related to. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Get iommu from g_iommus for deferred flushWeidong Han2009-01-031-3/+4
| | | | | | | deferred_flush[] uses the iommu seq_id to index, so its iommu is fixed and can get it from g_iommus. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Add global iommu listWeidong Han2009-01-031-0/+25
| | | | | Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* change P2P domain flagsWeidong Han2009-01-031-3/+5
| | | | | Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Initialize domain flags to 0Weidong Han2009-01-031-0/+1
| | | | | | | It's random number after the domain is allocated by kmem_cache_alloc Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* intel-iommu: trivially inline DMA PTE macrosMark McLoughlin2009-01-031-23/+48
| | | | | Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: trivially inline context entry macrosMark McLoughlin2009-01-031-30/+55
| | | | | | | | | | | | | Some macros were unused, so I just dropped them: context_fault_disable context_translation_type context_address_root context_address_width context_domain_id Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: move iommu_prepare_gfx_mapping() out of dma_remapping.hMark McLoughlin2009-01-031-0/+5
| | | | | Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: move struct device_domain_info out of dma_remapping.hMark McLoughlin2009-01-031-0/+10
| | | | | Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: move struct dmar_domain def out dma_remapping.hMark McLoughlin2009-01-031-0/+18
| | | | | Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: move DMA PTE defs out of dma_remapping.hMark McLoughlin2009-01-031-0/+22
| | | | | | | DMA_PTE_READ/WRITE are needed by kvm. Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: move context entry defs out from dma_remapping.hMark McLoughlin2009-01-031-0/+38
| | | | | Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: move root entry defs from dma_remapping.hMark McLoughlin2009-01-031-0/+33
| | | | | | | | We keep the struct root_entry forward declaration for the pointer in struct intel_iommu. Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: move DMA_32/64BIT_PFN into intel-iommu.cMark McLoughlin2009-01-031-0/+3
| | | | | Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: make init_dmars() staticMark McLoughlin2009-01-031-1/+1
| | | | | | | init_dmars() is not used outside of drivers/pci/intel-iommu.c Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: remove some unused struct intel_iommu fieldsMark McLoughlin2009-01-031-1/+0
| | | | | | | | | | | | | | | | The seg, saved_msg and sysdev fields appear to be unused since before the code was first merged. linux/msi.h is not needed in linux/intel-iommu.h anymore since there is no longer a reference to struct msi_msg. The MSI code in drivers/pci/intel-iommu.c still has linux/msi.h included via linux/dmar.h. linux/sysdev.h isn't needed because there is no reference to struct sys_device. Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* intel-iommu: fix compile warningsFUJITA Tomonori2008-11-191-2/+4
| | | | | | | | | | | | | | | | | | | | | | Impact: cleanup I got the following warnings on IA64: linux-2.6/drivers/pci/intel-iommu.c: In function 'init_dmars': linux-2.6/drivers/pci/intel-iommu.c:1658: warning: format '%Lx' expects type 'long long unsigned int', but argument 2 has type 'u64' linux-2.6/drivers/pci/intel-iommu.c:1663: warning: format '%Lx' expects type 'long long unsigned int', but argument 2 has type 'u64' Another victim of int-ll64.h versus int-l64.h confusion between platforms. ->reg_base_addr has a type of u64 - which can only be printed out consistently if we cast its type up to LL. [ Eventually reg_base_addr should be converted to phys_addr_t, for which we have the %pR printk helper - but that is out of the scope of late -rc's. ] Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Merge branch 'master' of ↵David Woodhouse2008-10-201-121/+129
|\ | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 Conflicts: drivers/pci/intel-iommu.c
| * intel-iommu: use coherent_dma_mask in alloc_coherentFUJITA Tomonori2008-10-181-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes intel-iommu to use dev->coherent_dma_mask in alloc_coherent. Currently, intel-iommu uses dev->dma_mask in alloc_coherent but alloc_coherent is supposed to use coherent_dma_mask. It could break drivers that uses smaller coherent_dma_mask than dma_mask (though the current code works for the majority that use the same mask for coherent_dma_mask and dma_mask). [dwmw2: dma_mask can be bigger than 'unsigned long'] Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * intel-iommu: IA64 supportFenghua Yu2008-10-181-62/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current Intel IOMMU code assumes that both host page size and Intel IOMMU page size are 4KiB. The first patch supports variable page size. This provides support for IA64 which has multiple page sizes. This patch also adds some other code hooks for IA64 platform including DMAR_OPERATION_TIMEOUT definition. [dwmw2: some cleanup] Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * dmar: Use queued invalidation interface for IOTLB and context invalidationYouquan Song2008-10-171-50/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | If queued invalidation interface is available and enabled, queued invalidation interface will be used instead of the register based interface. According to Vt-d2 specification, when queued invalidation is enabled, invalidation command submit works only through invalidation queue and not through the command registers interface. Signed-off-by: Youquan Song <youquan.song@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | intel-iommu: typo fix and correct word in the commentAmeya Palande2008-10-201-2/+2
|/ | | | | | | | | | | Fix for a typo and and replacing incorrect word in the comment. Signed-off-by: Ameya Palande <2ameya@gmail.com> Cc: "Ashok Raj" <ashok.raj@intel.com> Cc: "Shaohua Li" <shaohua.li@intel.com> Cc: "Anil S Keshavamurthy" <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* VT-d: Changes to support KVMKay, Allen M2008-10-151-4/+112
| | | | | | | | | | | | | | This patch extends the VT-d driver to support KVM [Ben: fixed memory pinning] [avi: move dma_remapping.h as well] Signed-off-by: Kay, Allen M <allen.m.kay@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Ben-Ami Yassour <benami@il.ibm.com> Signed-off-by: Amit Shah <amit.shah@qumranet.com> Acked-by: Mark Gross <mgross@linux.intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* Merge branch 'linus' into x86/x2apicIngo Molnar2008-07-221-1/+1
|\
| *---. Merge branches 'x86/urgent', 'x86/amd-iommu', 'x86/apic', 'x86/cleanups', ↵Ingo Molnar2008-07-211-1/+1
| |\ \ \ | | | | | | | | | | | | | | | 'x86/core', 'x86/cpu', 'x86/fixmap', 'x86/gart', 'x86/kprobes', 'x86/memtest', 'x86/modules', 'x86/nmi', 'x86/pat', 'x86/reboot', 'x86/setup', 'x86/step', 'x86/unify-pci', 'x86/uv', 'x86/xen' and 'xen-64bit' into x86/for-linus
| | | * | x86: make only GART code include gart.hFUJITA Tomonori2008-07-111-1/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gart.h has only GART-specific stuff. Only GART code needs it. Other IOMMU stuff should include iommu.h instead of gart.h. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | Merge branch 'linux-next' of ↵Linus Torvalds2008-07-161-1/+0
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (72 commits) Revert "x86/PCI: ACPI based PCI gap calculation" PCI: remove unnecessary volatile in PCIe hotplug struct controller x86/PCI: ACPI based PCI gap calculation PCI: include linux/pm_wakeup.h for device_set_wakeup_capable PCI PM: Fix pci_prepare_to_sleep x86/PCI: Fix PCI config space for domains > 0 Fix acpi_pm_device_sleep_wake() by providing a stub for CONFIG_PM_SLEEP=n PCI: Simplify PCI device PM code PCI PM: Introduce pci_prepare_to_sleep and pci_back_from_sleep PCI ACPI: Rework PCI handling of wake-up ACPI: Introduce new device wakeup flag 'prepared' ACPI: Introduce acpi_device_sleep_wake function PCI: rework pci_set_power_state function to call platform first PCI: Introduce platform_pci_power_manageable function ACPI: Introduce acpi_bus_power_manageable function PCI: make pci_name use dev_name PCI: handle pci_name() being const PCI: add stub for pci_set_consistent_dma_mask() PCI: remove unused arch pcibios_update_resource() functions PCI: fix pci_setup_device()'s sprinting into a const buffer ... Fixed up conflicts in various files (arch/x86/kernel/setup_64.c, arch/x86/pci/irq.c, arch/x86/pci/pci.h, drivers/acpi/sleep/main.c, drivers/pci/pci.c, drivers/pci/pci.h, include/acpi/acpi_bus.h) from x86 and ACPI updates manually.
| | * | PCI: eliminate double kfree in intel-iommu initializationJulia Lawall2008-06-101-1/+0
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | The destination of goto error also does a kfree(g_iommus), so it is not correct to do one here. This was found using Coccinelle (http://www.emn.fr/x-info/coccinelle/). Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | x64, x2apic/intr-remap: Interrupt remapping infrastructureSuresh Siddha2008-07-121-13/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt remapping (part of Intel Virtualization Tech for directed I/O) infrastructure. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d)Suresh Siddha2008-07-121-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Queued invalidation (part of Intel Virtualization Technology for Directed I/O architecture) infrastructure. This will be used for invalidating the interrupt entry cache in the case of Interrupt-remapping and IOTLB invalidation in the case of DMA-remapping. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | x64, x2apic/intr-remap: move IOMMU_WAIT_OP() macro to intel-iommu.hSuresh Siddha2008-07-121-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move IOMMU_WAIT_OP() macro to header file. This will be used by both DMA-remapping and Intr-remapping. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and ↵Suresh Siddha2008-07-121-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt remapping Allocate the iommu during the parse of DMA remapping hardware definition structures. And also, introduce routines for device scope initialization which will be explicitly called during dma-remapping initialization. These will be used for enabling interrupt remapping separately from the existing DMA-remapping enabling sequence. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | x64, x2apic/intr-remap: fix the need for sequential array allocation of iommusSuresh Siddha2008-07-121-17/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the intel-iommu code related to deferred iommu flush logic. There is no need to allocate all the iommu's as a sequential array. This will be used later in the interrupt-remapping patch series to allocate iommu much early and individually for each device remapping hardware unit. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganizationSuresh Siddha2008-07-121-84/+8
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | code reorganization of the generic Intel vt-d parsing related routines and linux iommu routines specific to Intel vt-d. drivers/pci/dmar.c now contains the generic vt-d parsing related routines drivers/pci/intel_iommu.c contains the iommu routines specific to vt-d Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
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