From 56f1896093043c63c6ecd8a53080aa89d6b41070 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Fri, 30 Nov 2018 15:26:32 +0000 Subject: ARM: dts: r8a7744: Add CAN support Add the definitions for can0 and can1 to the r8a7744 SoC dtsi. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7744.dtsi | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/r8a7744.dtsi') diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index cb6dfb5af218..87187f266066 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -884,13 +884,31 @@ }; can0: can@e6e80000 { + compatible = "renesas,can-r8a7744", + "renesas,rcar-gen2-can"; reg = <0 0xe6e80000 0 0x1000>; - /* placeholder */ + interrupts = ; + clocks = <&cpg CPG_MOD 916>, + <&cpg CPG_CORE R8A7744_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 916>; + status = "disabled"; }; can1: can@e6e88000 { + compatible = "renesas,can-r8a7744", + "renesas,rcar-gen2-can"; reg = <0 0xe6e88000 0 0x1000>; - /* placeholder */ + interrupts = ; + clocks = <&cpg CPG_MOD 915>, + <&cpg CPG_CORE R8A7744_CLK_RCAN>, + <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; + resets = <&cpg 915>; + status = "disabled"; }; rcar_sound: sound@ec500000 { -- cgit v1.2.1