From 7fc82b655a169039d8a58fde609b5e778573d5ab Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 2 Nov 2010 17:13:27 +1000 Subject: m68knommu: move ColdFire CPU names into their headers Move the ColdFire CPU names out of setup.c and into their repsective headers. That way when we add new ones we won't need to modify setup.c any more. Add the missing 548x CPU name. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5307sim.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/m68k/include/asm/m5307sim.h') diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index c6830e5b54ce..3e06b8379a49 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -14,6 +14,8 @@ #define m5307sim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m5307)" + /* * Define the 5307 SIM register set addresses. */ -- cgit v1.2.1 From 733f31b764061d976a60c5ee454632d9562900ea Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 2 Nov 2010 17:40:37 +1000 Subject: m68knommu: fix clock rate value reported for ColdFire 54xx parts The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5307sim.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/m68k/include/asm/m5307sim.h') diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index 3e06b8379a49..008f36bd66c3 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -14,7 +14,8 @@ #define m5307sim_h /****************************************************************************/ -#define CPU_NAME "COLDFIRE(m5307)" +#define CPU_NAME "COLDFIRE(m5307)" +#define CPU_INSTR_PER_JIFFY 3 /* * Define the 5307 SIM register set addresses. -- cgit v1.2.1 From 57015421d3f3deafb1f6ccf03a6fe0539763dbee Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 3 Nov 2010 12:50:30 +1000 Subject: m68knommu: move UART addressing to part specific includes The ColdFire UART base addresses varies between the different ColdFire family members. Instead of keeping the base addresses with the UART definitions keep them with the other addresses definitions for each ColdFire part. The motivation for this move is so that when we add new ColdFire part definitions, they are all in a single file (and we shouldn't normally need to modify the UART definitions in mcfuart.h at all). Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5307sim.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/m68k/include/asm/m5307sim.h') diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index 008f36bd66c3..7003d7268ae8 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -96,6 +96,17 @@ #define MCFSIM_PADDR (MCF_MBAR + 0x244) #define MCFSIM_PADAT (MCF_MBAR + 0x248) +/* + * UART module. + */ +#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) +#define MCFUART_BASE1 0x200 /* Base address of UART1 */ +#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */ +#else +#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ +#define MCFUART_BASE2 0x200 /* Base address of UART2 */ +#endif + /* * Generic GPIO support */ -- cgit v1.2.1 From 278c2cbd59371bc8905d83b7cc3aa0bbe69c00f1 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 9 Nov 2010 10:19:45 +1000 Subject: m68knommu: merge bit definitions for version 3 ColdFire cache controller All version 3 based ColdFire CPU cores have a similar cache controller. Merge all the exitsing definitions into a single file, and make them similar in style and naming to the existing version 2 and version 4 cache controller definitions. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m5307sim.h | 29 ++--------------------------- 1 file changed, 2 insertions(+), 27 deletions(-) (limited to 'arch/m68k/include/asm/m5307sim.h') diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index 7003d7268ae8..0bf57397e7a9 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -17,6 +17,8 @@ #define CPU_NAME "COLDFIRE(m5307)" #define CPU_INSTR_PER_JIFFY 3 +#include + /* * Define the 5307 SIM register set addresses. */ @@ -160,32 +162,5 @@ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ -/* - * Define the Cache register flags. - */ -#define CACR_EC (1<<31) -#define CACR_ESB (1<<29) -#define CACR_DPI (1<<28) -#define CACR_HLCK (1<<27) -#define CACR_CINVA (1<<24) -#define CACR_DNFB (1<<10) -#define CACR_DCM_WTHRU (0<<8) -#define CACR_DCM_WBACK (1<<8) -#define CACR_DCM_OFF_PRE (2<<8) -#define CACR_DCM_OFF_IMP (3<<8) -#define CACR_DW (1<<5) - -#define ACR_BASE_POS 24 -#define ACR_MASK_POS 16 -#define ACR_ENABLE (1<<15) -#define ACR_USER (0<<13) -#define ACR_SUPER (1<<13) -#define ACR_ANY (2<<13) -#define ACR_CM_WTHRU (0<<5) -#define ACR_CM_WBACK (1<<5) -#define ACR_CM_OFF_PRE (2<<5) -#define ACR_CM_OFF_IMP (3<<5) -#define ACR_WPROTECT (1<<2) - /****************************************************************************/ #endif /* m5307sim_h */ -- cgit v1.2.1