From 97dcb82de6cc99a5669eb8e342efc24cceb1e77e Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 8 Jan 2007 02:14:29 +0900 Subject: [MIPS] Define MIPS_CPU_IRQ_BASE in generic header The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all platforms and are same value on most platforms (0 or 16, depends on CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make them customizable. This will save a few cycle on each CPU interrupt. A good side effect is removing some dependencies to MALTA in generic SMTC code. Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing them might cause some header dependency problem and there seems no good reason to customize it. So currently only VR41XX is using custom MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259. Testing this patch on those platforms is greatly appreciated. Thank you. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/rtlx.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/asm-mips/rtlx.h') diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h index 76cd51c6be39..59162f74a798 100644 --- a/include/asm-mips/rtlx.h +++ b/include/asm-mips/rtlx.h @@ -6,9 +6,10 @@ #ifndef __ASM_RTLX_H #define __ASM_RTLX_H_ +#include + #define LX_NODE_BASE 10 -#define MIPSCPU_INT_BASE 16 #define MIPS_CPU_RTLX_IRQ 0 #define RTLX_VERSION 2 -- cgit v1.2.1