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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-08 11:14:29 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-08 11:14:29 -0700
commitb3345d7c57d70e6cb6749af25cdbe80515582e99 (patch)
tree04cce706bc7e944ad1fb257108a8ae735948f97f /arch/arm/mach-mvebu/system-controller.c
parent44c916d58b9ef1f2c4aec2def57fa8289c716a60 (diff)
parentc2fff85e21818952aa0ee5778926beee6c03e579 (diff)
downloadlinux-rt-b3345d7c57d70e6cb6749af25cdbe80515582e99.tar.gz
Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson: "This is the bulk of new SoC enablement and other platform changes for 3.17: - Samsung S5PV210 has been converted to DT and multiplatform - Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms - Kirkwood, one of the popular Marvell platforms, is folded into the mvebu platform code, removing mach-kirkwood - Hwmod data for TI AM43xx and DRA7 platforms - More additions of Renesas shmobile platform support - Removal of plat-samsung contents that can be removed with S5PV210 being multiplatform/DT-enabled and the other two old platforms being removed New platforms (most with only basic support right now): - Hisilicon X5HD2 settop box chipset is introduced - Mediatek MT6589 (mobile chipset) is introduced - Broadcom BCM7xxx settop box chipset is introduced + as usual a lot other pieces all over the platform code" * tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits) ARM: hisi: remove smp from machine descriptor power: reset: move hisilicon reboot code ARM: dts: Add hix5hd2-dkb dts file. ARM: debug: Rename Hi3716 to HIX5HD2 ARM: hisi: enable hix5hd2 SoC ARM: hisi: add ARCH_HISI MAINTAINERS: add entry for Broadcom ARM STB architecture ARM: brcmstb: select GISB arbiter and interrupt drivers ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: configs: enable SMP in bcm_defconfig ARM: add SMP support for Broadcom mobile SoCs Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ...
Diffstat (limited to 'arch/arm/mach-mvebu/system-controller.c')
-rw-r--r--arch/arm/mach-mvebu/system-controller.c50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 0c5524ac75b7..a068cb5c2ce8 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -28,8 +28,14 @@
#include <linux/io.h>
#include <linux/reboot.h>
#include "common.h"
+#include "mvebu-soc-id.h"
+#include "pmsu.h"
+
+#define ARMADA_375_CRYPT0_ENG_TARGET 41
+#define ARMADA_375_CRYPT0_ENG_ATTR 1
static void __iomem *system_controller_base;
+static phys_addr_t system_controller_phys_base;
struct mvebu_system_controller {
u32 rstoutn_mask_offset;
@@ -39,6 +45,9 @@ struct mvebu_system_controller {
u32 system_soft_reset;
u32 resume_boot_addr;
+
+ u32 dev_id;
+ u32 rev_id;
};
static struct mvebu_system_controller *mvebu_sc;
@@ -47,6 +56,8 @@ static const struct mvebu_system_controller armada_370_xp_system_controller = {
.system_soft_reset_offset = 0x64,
.rstoutn_mask_reset_out_en = 0x1,
.system_soft_reset = 0x1,
+ .dev_id = 0x38,
+ .rev_id = 0x3c,
};
static const struct mvebu_system_controller armada_375_system_controller = {
@@ -55,6 +66,8 @@ static const struct mvebu_system_controller armada_375_system_controller = {
.rstoutn_mask_reset_out_en = 0x1,
.system_soft_reset = 0x1,
.resume_boot_addr = 0xd4,
+ .dev_id = 0x38,
+ .rev_id = 0x3c,
};
static const struct mvebu_system_controller orion_system_controller = {
@@ -101,11 +114,45 @@ void mvebu_restart(enum reboot_mode mode, const char *cmd)
;
}
+int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev)
+{
+ if (of_machine_is_compatible("marvell,armada380") &&
+ system_controller_base) {
+ *dev = readl(system_controller_base + mvebu_sc->dev_id) >> 16;
+ *rev = (readl(system_controller_base + mvebu_sc->rev_id) >> 8)
+ & 0xF;
+ return 0;
+ } else
+ return -ENODEV;
+}
+
#ifdef CONFIG_SMP
+void mvebu_armada375_smp_wa_init(void)
+{
+ u32 dev, rev;
+ phys_addr_t resume_addr_reg;
+
+ if (mvebu_get_soc_id(&dev, &rev) != 0)
+ return;
+
+ if (rev != ARMADA_375_Z1_REV)
+ return;
+
+ resume_addr_reg = system_controller_phys_base +
+ mvebu_sc->resume_boot_addr;
+ mvebu_setup_boot_addr_wa(ARMADA_375_CRYPT0_ENG_TARGET,
+ ARMADA_375_CRYPT0_ENG_ATTR,
+ resume_addr_reg);
+}
+
void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr)
{
BUG_ON(system_controller_base == NULL);
BUG_ON(mvebu_sc->resume_boot_addr == 0);
+
+ if (of_machine_is_compatible("marvell,armada375"))
+ mvebu_armada375_smp_wa_init();
+
writel(virt_to_phys(boot_addr), system_controller_base +
mvebu_sc->resume_boot_addr);
}
@@ -119,7 +166,10 @@ static int __init mvebu_system_controller_init(void)
np = of_find_matching_node_and_match(NULL, of_system_controller_table,
&match);
if (np) {
+ struct resource res;
system_controller_base = of_iomap(np, 0);
+ of_address_to_resource(np, 0, &res);
+ system_controller_phys_base = res.start;
mvebu_sc = (struct mvebu_system_controller *)match->data;
of_node_put(np);
}