summaryrefslogtreecommitdiff
path: root/arch/mips/boot/dts/ingenic/cu1830-neo.dts
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2020-12-16 12:07:54 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2020-12-16 12:07:54 -0800
commit8312f41f08edc641aa927d31fb71319694ae9c42 (patch)
treee21de0f34fa104acc35b87e6191fa3a5fe40d8eb /arch/mips/boot/dts/ingenic/cu1830-neo.dts
parent66fc6a6254c7a138aef7806bd933c218e1aefcfc (diff)
parentad4fddef5f2345aa9214e979febe2f47639c10d9 (diff)
downloadlinux-rt-8312f41f08edc641aa927d31fb71319694ae9c42.tar.gz
Merge tag 'mips_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer: - enable GCOV - rework setup of protection map - add support for more MSCC platforms - add sysfs boardinfo for Loongson64 - enable KASLR for Loogson64 - add reset controller for BCM63xx - cleanups and fixes * tag 'mips_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (70 commits) mips: fix Section mismatch in reference MAINTAINERS: Add linux-mips mailing list to JZ47xx entries MAINTAINERS: Remove JZ4780 DMA driver entry MAINTAINERS: chenhc@lemote.com -> chenhuacai@kernel.org MIPS: Octeon: irq: Alloc desc before configuring IRQ MIPS: mm: Add back define for PAGE_SHARED MIPS: Select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL to enable sysfs memblock debug mips: lib: uncached: fix non-standard usage of variable 'sp' MIPS: DTS: img: Fix schema warnings for pwm-leds MIPS: KASLR: Avoid endless loop in sync_icache if synci_step is zero MIPS: Move memblock_dump_all() to the end of setup_arch() MIPS: SMP-CPS: Add support for irq migration when CPU offline MIPS: OCTEON: Don't add kernel sections into memblock allocator MIPS: Don't round up kernel sections size for memblock_add() MIPS: Enable GCOV MIPS: configs: drop unused BACKLIGHT_GENERIC option MIPS: Loongson64: Fix up reserving kernel memory range MIPS: mm: Remove unused is_aligned_hugepage_range MIPS: No need to check CPU 0 in {loongson3,bmips,octeon}_cpu_disable() mips: cdmm: fix use-after-free in mips_cdmm_bus_discover ...
Diffstat (limited to 'arch/mips/boot/dts/ingenic/cu1830-neo.dts')
-rw-r--r--arch/mips/boot/dts/ingenic/cu1830-neo.dts66
1 files changed, 60 insertions, 6 deletions
diff --git a/arch/mips/boot/dts/ingenic/cu1830-neo.dts b/arch/mips/boot/dts/ingenic/cu1830-neo.dts
index 640f96c00d63..cfcb40edb7d9 100644
--- a/arch/mips/boot/dts/ingenic/cu1830-neo.dts
+++ b/arch/mips/boot/dts/ingenic/cu1830-neo.dts
@@ -3,7 +3,7 @@
#include "x1830.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/ingenic,tcu.h>
+#include <dt-bindings/clock/ingenic,sysost.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
@@ -31,6 +31,42 @@
};
};
+ ssi0: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-chipselects = <1>;
+
+ mosi-gpios = <&gpc 12 GPIO_ACTIVE_HIGH>;
+ miso-gpios = <&gpc 11 GPIO_ACTIVE_HIGH>;
+ sck-gpios = <&gpc 15 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpc 16 GPIO_ACTIVE_HIGH>;
+
+ status = "okay";
+
+ spi-max-frequency = <50000000>;
+
+ sc16is752: expander@0 {
+ compatible = "nxp,sc16is752";
+ reg = <0>; /* CE0 */
+ spi-max-frequency = <4000000>;
+
+ clocks = <&exclk_sc16is752>;
+
+ interrupt-parent = <&gpb>;
+ interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ exclk_sc16is752: sc16is752 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+ };
+ };
+
wlan_pwrseq: msc1-pwrseq {
compatible = "mmc-pwrseq-simple";
@@ -43,13 +79,19 @@
clock-frequency = <24000000>;
};
-&tcu {
+&cgu {
+ /*
+ * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
+ * precision.
+ */
+ assigned-clocks = <&cgu X1830_CLK_RTC>;
+ assigned-clock-parents = <&cgu X1830_CLK_RTCLK>;
+};
+
+&ost {
/* 1500 kHz for the system timer and clocksource */
- assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>;
+ assigned-clocks = <&ost OST_CLK_PERCPU_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
assigned-clock-rates = <1500000>, <1500000>;
-
- /* Use channel #0 for the system timer channel #2 for the clocksource */
- ingenic,pwm-channels-mask = <0xfa>;
};
&uart1 {
@@ -73,6 +115,10 @@
};
};
+&dtrng {
+ status = "okay";
+};
+
&msc0 {
status = "okay";
@@ -135,6 +181,14 @@
};
};
+&otg_phy {
+ status = "okay";
+};
+
+&otg {
+ status = "okay";
+};
+
&pinctrl {
pins_uart1: uart1 {
function = "uart1";