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author | Manu Gautam <mgautam@codeaurora.org> | 2018-10-16 12:52:07 +0530 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-12-17 09:24:34 +0100 |
commit | 4724b50f9e093cfa9bea7caa5f25f00755bcc568 (patch) | |
tree | 5a6afa2784b9a6d1557b437c6e43c70b4c37ae86 /drivers/phy | |
parent | d801a3eff5541321abd235243c8237b34d05ddf5 (diff) | |
download | linux-rt-4724b50f9e093cfa9bea7caa5f25f00755bcc568.tar.gz |
phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845
[ Upstream commit c88520db18ba0b9a41326c3b8680e7c09eb4c381 ]
Tune1 register on sdm845 is used to update HSTX_TRIM with fused
setting. Enable same by specifying update_tune1_with_efuse flag
for sdm845, otherwise driver ends up programming tune2 register.
Fixes: ef17f6e212ca ("phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845")
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/phy')
-rw-r--r-- | drivers/phy/qualcomm/phy-qcom-qusb2.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c index 9d6c88064158..69c92843eb3b 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -231,6 +231,7 @@ static const struct qusb2_phy_cfg sdm845_phy_cfg = { .mask_core_ready = CORE_READY_STATUS, .has_pll_override = true, .autoresume_en = BIT(0), + .update_tune1_with_efuse = true, }; static const char * const qusb2_phy_vreg_names[] = { |