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| author | Jarkko Nikula <jarkko.nikula@linux.intel.com> | 2015-06-04 16:55:10 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-06-05 11:40:45 +0100 |
| commit | 03fbf488cece461468d3abb795f5e5f055e00040 (patch) | |
| tree | 2654de21ea139c4a3ed4d6f13f437fbfd95f683a /include/linux/pxa2xx_ssp.h | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
| download | linux-rt-03fbf488cece461468d3abb795f5e5f055e00040.tar.gz | |
spi: pxa2xx: Differentiate Intel LPSS types
Intel LPSS SPI properties differ between between platforms. Now private
registers offset 0x400 or 0x800 is autodetected but there is need to
support also other offset and handle a few other differences.
Prepare for that by splitting the LPSS_SSP type into compatible hardware
types and set it now based on PCI or ACPI ID. That type will be used to set
properties that differ between current and upcoming platforms.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/linux/pxa2xx_ssp.h')
| -rw-r--r-- | include/linux/pxa2xx_ssp.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h index dab545bb66b3..95a4b3bd7a5c 100644 --- a/include/linux/pxa2xx_ssp.h +++ b/include/linux/pxa2xx_ssp.h @@ -194,8 +194,9 @@ enum pxa_ssp_type { PXA168_SSP, PXA910_SSP, CE4100_SSP, - LPSS_SSP, QUARK_X1000_SSP, + LPSS_LPT_SSP, + LPSS_BYT_SSP, }; struct ssp_device { |