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| author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2018-09-26 17:32:37 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-11-24 08:22:53 +0100 |
| commit | c1997d7041c75a82502cbd895f223e532bccc931 (patch) | |
| tree | 7b540a4c670f58c5946a6e48a511da12786a01e4 /virt | |
| parent | 1a41082b01127d33048446f8b82beb32c7bdf580 (diff) | |
| download | linux-rt-c1997d7041c75a82502cbd895f223e532bccc931.tar.gz | |
kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table
[ Upstream commit d2db7773ba864df6b4e19643dfc54838550d8049 ]
So far we have only supported 3 level page table with fixed IPA of
40bits, where PUD is folded. With 4 level page tables, we need
to check if the PUD entry is valid or not. Fix stage2_flush_memslot()
to do this check, before walking down the table.
Acked-by: Christoffer Dall <cdall@kernel.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'virt')
| -rw-r--r-- | virt/kvm/arm/mmu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c index 1f4cac53b923..9f69202d8e49 100644 --- a/virt/kvm/arm/mmu.c +++ b/virt/kvm/arm/mmu.c @@ -375,7 +375,8 @@ static void stage2_flush_memslot(struct kvm *kvm, pgd = kvm->arch.pgd + stage2_pgd_index(addr); do { next = stage2_pgd_addr_end(addr, end); - stage2_flush_puds(kvm, pgd, addr, next); + if (!stage2_pgd_none(*pgd)) + stage2_flush_puds(kvm, pgd, addr, next); } while (pgd++, addr = next, addr != end); } |