| Commit message (Collapse) | Author | Age | Files | Lines |
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Clean up the socfpga_defconfig file by doing:
make socfpga_defconfig
make
make savedefconfig
Then add the following to socfpga_defconfig:
CONFIG_SIGNALFD=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_SRAM=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_CONFIGFS_FS=y
CONFIG_PMBUS=y
CONFIG_SENSORS_PMBUS=y
CONFIG_SENSORS_LTC2978=y
CONFIG_SENSORS_LTC2978_REGULATOR=y
CONFIG_PRINTK_TIME=y
CONFIG_EXT4_FS=y
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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CONFIG_PM=y
CONFIG_SUSPEND=y
CONFIG_MMC_UNSAFE_RESUME=y
CONFIG_DWMAC_SOCFPGA=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC2_HOST=y
CONFIG_USB_DWC2_PLATFORM=y
CONFIG_FHANDLE=y
CONFIG_I2C=y
CONFIG_I2C_DESIGNWARE_CORE=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_CHARDEV=y
CONFIG_CAN=y
CONFIG_CAN_RAW=y
CONFIG_CAN_BCM=y
CONFIG_CAN_GW=y
CONFIG_CAN_DEV=y
CONFIG_CAN_CALC_BITTIMING=y
CONFIG_CAN_C_CAN=y
CONFIG_CAN_C_CAN_PLATFORM=y
CONFIG_WATCHDOG=y
CONFIG_DW_WATCHDOG=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_DWAPB=y
CONFIG_PPS=y
CONFIG_NETWORK_PHY_TIMESTAMPING=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_VLAN_8021Q=y
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_GARP=y
CONFIG_IPV6=y
CONFIG_HOTPLUG=y
Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com>
Signed-off-by: Alan Tull <atull@altera.com>
Signed-off-by: Thor Thayer <tthayer@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@altear.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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CONFIG_MICREL_PHY=y
CONFIG_EXT3_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Enable SMP for the SOCFPGA platform.
Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Adding core definitions for Altera's SOCFPGA ARM platform.
Mininum support for Altera's SOCFPGA Cyclone 5 hardware.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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