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* ARM: shmobile: Move common.hMagnus Damm2014-06-171-56/+0
| | | | | | | | | | Change location for common.h so it can be used as #include "common.h" instead of the old style #include <mach/common.h>. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Add shared shmobile_init_delay()Magnus Damm2014-04-141-0/+1
| | | | | | | | | | Introduce shmobile_init_delay() that gets CPU specific parameters from DT and sets up the early delay from there. This allows us to both remove frequency information from the C code and consolidate existing code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove duplicate shmobile_invalidate_start() declarationGeert Uytterhoeven2014-02-041-1/+0
| | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove shmobile_smp_scu_boot_secondary()Magnus Damm2013-09-301-2/+0
| | | | | | | | | Remove shmobile_smp_scu_boot_secondary() since it is no longer used. CPU boot vector setup is instead handled by CPU notifiers. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Shared APMU SMP support code without DTMagnus Damm2013-09-301-0/+6
| | | | | | | | | | | | | Introduce shared APMU SMP code for mach-shmobile. Both SMP boot up and CPU Hotplug is supported. This version does not use DT but if needed this will be added as an incremental feature patch. The code is designed around CONFIG_NR_CPUS and should in theory support any number of APMUs, however due to the current DT-less static design only a single APMU is supported. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Introduce shmobile_boot_sizeMagnus Damm2013-09-201-0/+1
| | | | | | | | | Introduce shmobile_boot_size that can be used by future SMP code to determine the size of the boot code that needs to be copied to internal SRAM. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Expose shmobile_invalidate_start()Magnus Damm2013-09-201-0/+1
| | | | | | | | | Expose shmobile_invalidate_start() in common.h for mach-shmobile. This function will be used for boot of secondary processors on future non-SCU SMP platforms. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove unused shmobile_smp_init_cpus()Magnus Damm2013-09-201-1/+0
| | | | | | | | | Remove shmobile_smp_init_cpus() since all SMP platforms in mach-shmobile now rely on DT for CPU core description instead of for instance determining number of cores from the SCU. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Introduce shmobile_smp_cpu_disable()Magnus Damm2013-09-201-0/+1
| | | | | | | | | Introduce the shared CPU Hotplug function shmobile_smp_cpu_disable() for mach-shmobile. It is useful for the case when all CPUs may be hotplugged, including CPU 0. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'renesas-smp-for-v3.12' of ↵Olof Johansson2013-08-281-0/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Renesas ARM based SoC SMP updates for v3.12 * Per-CPU SMP boot and sleep code on SoCs that use SCU * Shared SCU CPU Hotplug code on r8a7779 and sh73a0 SoCs * Shared SCU CPU boot code on emev2, r8a7779 and sh73a0 SoCs * tag 'renesas-smp-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs ARM: shmobile: Introduce per-CPU SMP boot / sleep code ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779 ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0 ARM: shmobile: Add shared SCU CPU Hotplug code ARM: shmobile: Use shared SCU SMP boot code on emev2 ARM: shmobile: Use shared SCU SMP boot code on r8a7779 ARM: shmobile: Use shared SCU SMP boot code on sh73a0 ARM: shmobile: Introduce shared SCU SMP boot code Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: shmobile: Introduce per-CPU SMP boot / sleep codeMagnus Damm2013-08-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add per-CPU SMP boot / sleep code that can be used by all SoCs included in mach-shmobile. The boot code reads out the per-CPU MPIDR id value and matches it with the value stored for any CPU number, and if there is a match and the boot function is set as well then the boot function will be executed. The sleep code simply uses WFI and then jumps back to the boot code to see if anyone has asked to wake up that CPU, if not it will sleep again. Signed-off-by: Magnus Damm <damm@opensource.se> [horms+renesas@verge.net.au: Remove trailing whitespace] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Add shared SCU CPU Hotplug codeMagnus Damm2013-08-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add CPU Hotplug functions for SCU equipped mach-shmobile SoCs. The functions shmobile_smp_scu_cpu_die() together with shmobile_smp_scu_cpu_kill() perform basic shutdown and allows checking of shutdown status. These are written to work together with SMP boot code in headsmp-scu.S. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Introduce shared SCU SMP boot codeMagnus Damm2013-08-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Add SMP boot functions for SCU equipped mach-shmobile SoCs. At this point shmobile_smp_scu_prepare_cpus() controls the SCU and installs boot fn and arg, while shmobile_smp_scu_boot_secondary() currently does nothing. In the future the boot function and arg install code will be reworked, so the empty function is ground work for that. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: Remove unused shmobile_init_time()Magnus Damm2013-08-061-1/+0
|/ | | | | | | Remove shmobile_timer_init() since it now is unused. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove old SCU boot codeMagnus Damm2013-06-171-1/+0
| | | | | | | | | Remove shmobile_secondary_vector_scu now when all SCU enabled SMP platforms instead make use of shmobile_boot_scu. This removes two inline virtual to physical address conversions. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Add SCU boot function using argumentMagnus Damm2013-06-171-0/+1
| | | | | | | | | Add a shmoible_boot_scu function that assumes that the base address of the SCU is passed in r0. This code is free from inline virtual to physical address conversion. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Add SMP boot function and argumentMagnus Damm2013-06-171-1/+3
| | | | | | | | | | Add code for mach-shmobile to allow specifying boot function and argument. Will initially be used for SMP together with SCU but may in the future also be used for deep sleep resume. This patch removes one inline virtual to physical address conversion. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'soc-for-linus-2' of ↵Linus Torvalds2013-05-071-54/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates (part 2) from Arnd Bergmann: "These patches are all for Renesas shmobile, and depend on the earlier pinctrl updates. Remarkably, this adds support for three new SoCs: r8a73a4, r8a73a4 and r8a7778. The bulk of the code added for these is for pinctrl (using the new subsystem) and for clocks (not yet using the common clock subsystem). The latter will have to get converted in one of the upcoming releases, but shmobile is not ready for that yet. The series also contains Renesas shmobile board changes, adding one board file for each of the three new SoCs. These boards are using a mix of classic and device-tree based probing, as there is still a lot of infrastructure in shmobile that has not been converted to DT yet. Once those are resolved to the degree that no board specific setup code is needed, they can get folded into the respective SoC setup files." * tag 'soc-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits) ARM: shmobile: use r8a7790 timer setup code on Lager ARM: shmobile: force enable of r8a7790 arch timer ARM: shmobile: Add second I/O range for r8a7790 PFC ARM: shmobile: bockw: enable network settings on bootargs ARM: shmobile: bockw: add SMSC ethernet support ARM: shmobile: R8A7778: add Ether support ARM: shmobile: bockw: enable SMSC ethernet on defconfig ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin() ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO() ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection ARM: shmobile: mackerel: add interrupt names for SDHI0 ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio ARM: shmobile: mackerel: remove OCR masks, where regulators are used ARM: shmobile: mackerel: SDHI resources do not have to be numbered ARM: shmobile: Initial r8a7790 Lager board support ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support ARM: shmobile: APE6EVM base support ARM: shmobile: kzm9g-reference: add ethernet support ARM: shmobile: add R-Car M1A Bock-W platform support ...
| * ARM: shmobile: r8a7779: move global functions to r8a7779.hKuninori Morimoto2013-04-021-14/+0
| | | | | | | | | | | | | | | | | | There is no reason each CPU's own function has to exist in common.h. r8a7779_xxx() go to r8a7779.h Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: r8a7740: move global functions to r8a7740.hKuninori Morimoto2013-04-021-9/+0
| | | | | | | | | | | | | | | | | | There is no reason each CPU's own function has to exist in common.h. r8a7740_xxx() go to r8a7740.h Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: sh73a0: move global functions to sh73a0.hKuninori Morimoto2013-04-021-16/+0
| | | | | | | | | | | | | | | | | | There is no reason each CPU's own function has to exist in common.h. sh73a0_xxx() go to sh73a0.h Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: sh7372: move global functions to sh7372.hKuninori Morimoto2013-04-021-15/+0
| | | | | | | | | | | | | | | | | | There is no reason each CPU's own function has to exist in common.h. sh7372_xxx() go to sh7372.h Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge tag 'drivers-for-linus' of ↵Linus Torvalds2013-05-041-0/+1
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Olof Johansson: "This is a rather large set of patches for device drivers that for one reason or another the subsystem maintainer preferred to get merged through the arm-soc tree. There are both new drivers as well as existing drivers that are getting converted from platform-specific code into standalone drivers using the appropriate subsystem specific interfaces. In particular, we can now have pinctrl, clk, clksource and irqchip drivers in one file per driver, without the need to call into platform specific interface, or to get called from platform specific code, as long as all information about the hardware is provided through a device tree. Most of the drivers we touch this time are for clocksource. Since now most of them are part of drivers/clocksource, I expect that we won't have to touch these again from arm-soc and can let the clocksource maintainers take care of these in the future. Another larger part of this series is specific to the exynos platform, which is seeing some significant effort in upstreaming and modernization of its device drivers this time around, which unfortunately is also the cause for the churn and a lot of the merge conflicts. There is one new subsystem that gets merged as part of this series: the reset controller interface, which is a very simple interface for taking devices on the SoC out of reset or back into reset. Patches to use this interface on i.MX follow later in this merge window, and we are going to have other platforms (at least tegra and sirf) get converted in 3.11. This will let us get rid of platform specific callbacks in a number of platform independent device drivers." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (256 commits) irqchip: s3c24xx: add missing __init annotations ARM: dts: Disable the RTC by default on exynos5 clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3} ARM: exynos: restore mach/regs-clock.h for exynos5 clocksource: exynos_mct: fix build error on non-DT pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register() irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructure reset: NULL deref on allocation failure reset: Add reset controller API dt: describe base reset signal binding ARM: EXYNOS: Add arm-pmu DT binding for exynos421x ARM: EXYNOS: Add arm-pmu DT binding for exynos5250 ARM: EXYNOS: Enable PMUs for exynos4 irqchip: exynos-combiner: Correct combined IRQs for exynos4 irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irq ARM: EXYNOS: fix compilation error introduced due to common clock migration clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3} clk: exynos4: export clocks required for fimc-is clk: samsung: Fix compilation error clk: tegra: fix enum tegra114_clk to match binding ...
| * ARM: shmobile: INTC External IRQ pin driver on r8a7779Magnus Damm2013-03-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the r8a7779 IRQ code to make use of the INTC External IRQ pin driver for external interrupt pins IRQ0 -> IRQ3. The r8a7779 SoC can like older SH SoCs configure to use the IRQ0 -> IRQ3 signals as individual interrupts or a combined IRL mode. Without this patch the r8a7779 SoC code does not fully support external IRQ pins in individual IRQ mode. The r8a7779 PFC code does not yet have gpio_to_irq() support so no need to update such code. At this point the DT reference implementations are not covered. In the future such code shall tie in the INTC External IRQ pin driver via DT, so this kind of verbose code is not needed for the long term DT case. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge tag 'soc-for-linus' of ↵Linus Torvalds2013-05-021-14/+7
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "This branch contains part 1 of the platform updates for 3.10. Among the highlights: - Support for the new Atmel Cortex-A5 based platforms (SAMA5D3) - New support for CSR SiRFatlas6 SoCs - A handful of updates for NVidia T114 (a.k.a. Tegra 4) - A bunch of updates for the shmobile platforms - A handful of updates for davinci - A few updates for Qualcomm MSM - Plus a handful of other patches, defconfig updates, etc." * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (135 commits) ARM: tegra: pm: fix build error w/o PM_SLEEP ARM: davinci: ensure global variables are declared ARM: davinci: sram.c: fix incorrect type in assignment ARM: davinci: da8xx dt: make file local symbols static ARM: davinci: da8xx: add remoteproc support ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries ARM: socfpga: Add clock entries into device tree ARM: socfpga: Enable soft reset ARM: EXYNOS: replace cpumask by the corresponding macro ARM: EXYNOS: handle properly the return values ARM: EXYNOS: factor out the idle states ARM: OMAP4: Enable fix for Cortex-A9 erratas ARM: OMAP2+: Export SoC information to userspace ARM: OMAP2+: SoC name and revision unification ARM: OMAP2+: Move common part of late init into common function ARM: tegra: pm: remove duplicated include from pm.c ARM: davinci: da850: override mmc DT node device name ARM: davinci: da850: add mmc DT entries mmc: davinci_mmc: add DT support ARM: SAMSUNG: check processor type before cache restoration in resume ...
| * ARM: shmobile: tidyup chip series definition order for r8a7740/r8a7779Kuninori Morimoto2013-03-131-2/+1
| | | | | | | | | | | | | | | | move r8a7740_meram_workaround() to r8a7740 area from r8a7779 area Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Remove unused hotplug.cMagnus Damm2013-03-131-10/+0
| | | | | | | | | | | | | | | | | | | | Each CPU Hotplug implementation for mach-shmobile is now self-contained, so this change removes unused helper code in hotplug.c. The two CPU Hotplug capable SoCs sh73a0 and r8a7779 remain unchanged. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: r8a7779: Do not use early devices with DT referenceSimon Horman2013-03-131-1/+1
| | | | | | | | | | | | | | | | Do not initialise any early devices when using the minimal DT reference code. Only the delay needs to be initialised. Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: sh73a0: Do not use early devices with DT referenceSimon Horman2013-03-131-1/+1
| | | | | | | | | | | | | | | | Do not initialise any early devices when using the minimal DT reference code. Only the delay needs to be initialised. Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Common shmobile_scu_base in headsmp-scu.SMagnus Damm2013-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code in headsmp-scu.S to use a global shmobile_scu_base variable both for convenient SCU base address storage and for the early SCU setup code in shmobile_secondary_vector_scu. With this patch applied r8a7779, sh73a0 and EMEV2 all make use of the global shmobile_scu_base variable. However only sh73a0 makes use of the SCU bring up code in shmobile_secondary_vector_scu. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Move headsmp-sh73a0.S to headsmp-scu.SMagnus Damm2013-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename headsmp-sh73a0.S into headsmp-scu.S and introduce shmobile_secondary_vector_scu(). The goal is to be able to share the function above between all mach-shmobile SoCs that use SCU for SMP. So far only sh73a0 use this. At this time the SCU base address is still hard coded in headsmp-scu.S to 0xf0000000, but this will be changed in the future. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: mach-shmobile: r8a7779: Minimal setup using DTSimon Horman2013-03-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow a minimal setup of the r8a7779 SoC using a flattened device tree. In particular, configure the i2c and ethernet controllers using a flattened device tree. SCI serial controller and TMU clock source, whose drivers do not yet support configuration using a flattened device tree, are still configured using C code in order to allow booting of a board with this SoC. The ethernet controller also requires a regulator which is a board property. A sample snippet DT for the marzen board is as follows: /dts-v1/; /include/ "r8a7779.dtsi" / { fixedregulator3v3: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; &lan0 { vddvario-supply = <&fixedregulator3v3>; vdd33a-supply = <&fixedregulator3v3>; }; Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: mach-shmobile: r8a7779: Allow initialisation of GIC by DTSimon Horman2013-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the GIC interrupt controller of the r8a7779 SoC to be initialised using a flattened device tree blob. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- v3 * Fix copy-paste error and use unique reg values for each CPU v2 As suggested by Mark Rutland * Add reg and device_type to cpus * Remove #address-cells from gic
* | ARM: shmobile: cpuidle: remove shmobile_enter_wfi prototypeDaniel Lezcano2013-04-221-3/+0
|/ | | | | | | | | | | | | | | Commit 688036b538974de32ce55be8b0e013b003992abc removed the function 'shmobile_enter_wfi' but we forgot to remove the definition in the header file. Note this function is just an alias to 'cpu_do_idle()' wrapped into a cpuidle function callback prototype which already exists with the default WFI state and the arm_simple_enter function. Remove the function prototype. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: mach-shmobile: add shmobile_cpu_disable_any()Ulrich Hecht2013-01-301-0/+1
| | | | | | | | Method to disable any core to be used on platforms where CPU0 does not need special treatment. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: mach-shmobile: sh73a0: Minimal setup using DTSimon Horman2013-01-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | Allow a minimal setup of the sh73a0 SoC using a flattened device tree. In particular, Configure the i2c controllers using a flattened device tree. SCI serial controller and CMT clock source, whose drivers do not yet support configuration using a flattened device tree, are still configured using C code in order to allow booting of a board with this SoC. *** Please note that the clock initialisation scheme used in this patch does not currently work with SMP as there is a yet to be resolved lock-up in workqueue initialisation. CONFIG_SMP must be disabled when using this code. *** Includes update from Thierry Reding to no longer use gic_handle_irq() Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> fix
* ARM: mach-shmobile: sh73a0: Allow initialisation of GIC by DTSimon Horman2013-01-251-0/+1
| | | | | | | | | | | | | | | | | | | This allows the GIC interrupt controller of the sh73a0 SoC to be initialised using a flattened device tree blob. It does not allow the INTC interrupt controller which is also present on the sh73a0 SoC to be enabled via device tree. Nor does it handle sharing of interrupts between the GIC and INTC interrupt controllers. This limits the usefulness of this code to applications which only wish to access devices which use interrupts that can be handled by the GIC interrupt controller. Other applications should, for now, continue using non-device tree initialisation of the sh72a0 interrupt controllers. Includes update to use irqchip_init() by Thierry Reding Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: SH-Mobile: sh73a0: Secondary CPUs handle own SCU flagsBastian Hecht2013-01-251-0/+1
| | | | | | | | | | | | | | | | When booting secondary CPUs we have used the main CPU to set up the Snoop Control Unit flags of these CPUs. It is a cleaner approach if every CPU takes care of its own flags. We avoid the need for locking and the program logic is more concise. With this patch the file headsmp-sh73a0.S is added that contains a startup vector for secondary CPUs that sets up its own SCU flags. Further in sh73a0_smp_prepare_cpus() we can rely on the generic ARM helper scu_power_mode(). This is possible as we don't cross borders anymore (every CPU handles its own flags) and need no locking. So we can throw out the needless function modify_scu_cpu_psr(). Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7740: Add CPU sleep suspendBastian Hecht2013-01-251-0/+1
| | | | | | | | | | | | Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> [ horms@verge.net.au: Added missing includes ] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: sh73a0: Add CPU sleep suspendBastian Hecht2013-01-251-0/+1
| | | | | | | | | | | Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As just clocks are stopped there is no need to save or restore any state of the system. Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: add function declarations for sh7372 DT helper functionsGuennadi Liakhovetski2013-01-251-0/+2
| | | | | | | | | | sh7372_add_early_devices_dt() and sh7372_add_standard_devices_dt() are defined as global functions in arch/arm/mach-shmobile/setup-sh7372.c, but their declarations are missing. Add them to common.h, where similar functions for this and other SoC types are already declared. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms@verge.net.au>
* ARM: delete struct sys_timerStephen Warren2012-12-241-1/+4
| | | | | | | | | | | | | | | | | | Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: shmobile: Remove SH7377 supportNobuhiro Iwamatsu2012-11-061-9/+0
| | | | | | | | | This is old CPU of shmobile, and the machine by which this CPU is used cannot be obtained. Therefore, remove SH7377 support. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
* ARM: shmobile: Remove SH7367 supportNobuhiro Iwamatsu2012-11-061-9/+0
| | | | | | | | | This is old CPU of shmobile, and the machine by which this CPU is used cannot be obtained. Therefore, remove SH7367 support. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
* ARM: shmobile: mark shmobile_init_late as __initArnd Bergmann2012-10-091-1/+1
| | | | | | | | | | | | | | | | | | | | Patch 35f2b0bd59 "ARM: shmobile: Move definition of shmobile_init_late() to header" moved the definition of the shmobile_init_late function, but dropped the __init annotation, which is now causing warnings because the function calls shmobile_suspend_init, which is also marked init. Without this patch, building kota2_defconfig results in: WARNING: vmlinux.o(.text+0xb7c8): Section mismatch in reference from the function shmobile_init_late() to the function .init.text:shmobile_suspend_init() The function shmobile_init_late() references the function __init shmobile_suspend_init(). This is often because shmobile_init_late lacks a __init annotation or the annotation of shmobile_suspend_init is wrong. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Magnus Damm <damm@opensource.se> Cc: Simon Horman <horms@verge.net.au>
* Merge tag 'pm-for-3.7-rc1' of ↵Linus Torvalds2012-10-021-4/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael J Wysocki: - Improved system suspend/resume and runtime PM handling for the SH TMU, CMT and MTU2 clock event devices (also used by ARM/shmobile). - Generic PM domains framework extensions related to cpuidle support and domain objects lookup using names. - ARM/shmobile power management updates including improved support for the SH7372's A4S power domain containing the CPU core. - cpufreq changes related to AMD CPUs support from Matthew Garrett, Andre Przywara and Borislav Petkov. - cpu0 cpufreq driver from Shawn Guo. - cpufreq governor fixes related to the relaxing of limit from Michal Pecio. - OMAP cpufreq updates from Axel Lin and Richard Zhao. - cpuidle ladder governor fixes related to the disabling of states from Carsten Emde and me. - Runtime PM core updates related to the interactions with the system suspend core from Alan Stern and Kevin Hilman. - Wakeup sources modification allowing more helper functions to be called from interrupt context from John Stultz and additional diagnostic code from Todd Poynor. - System suspend error code path fix from Feng Hong. Fixed up conflicts in cpufreq/powernow-k8 that stemmed from the workqueue fixes conflicting fairly badly with the removal of support for hardware P-state chips. The changes were independent but somewhat intertwined. * tag 'pm-for-3.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (76 commits) Revert "PM QoS: Use spinlock in the per-device PM QoS constraints code" PM / Runtime: let rpm_resume() succeed if RPM_ACTIVE, even when disabled, v2 cpuidle: rename function name "__cpuidle_register_driver", v2 cpufreq: OMAP: Check IS_ERR() instead of NULL for omap_device_get_by_hwmod_name cpuidle: remove some empty lines PM: Prevent runtime suspend during system resume PM QoS: Use spinlock in the per-device PM QoS constraints code PM / Sleep: use resume event when call dpm_resume_early cpuidle / ACPI : move cpuidle_device field out of the acpi_processor_power structure ACPI / processor: remove pointless variable initialization ACPI / processor: remove unused function parameter cpufreq: OMAP: remove loops_per_jiffy recalculate for smp sections: fix section conflicts in drivers/cpufreq cpufreq: conservative: update frequency when limits are relaxed cpufreq / ondemand: update frequency when limits are relaxed properly __init-annotate pm_sysrq_init() cpufreq: Add a generic cpufreq-cpu0 driver PM / OPP: Initialize OPP table from device tree ARM: add cpufreq transiton notifier to adjust loops_per_jiffy for smp cpufreq: Remove support for hardware P-state chips from powernow-k8 ...
| * ARM: shmobile: Make sh7372 cpuidle handling more straightforwardRafael J. Wysocki2012-09-041-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sh7372 cpuidle code uses the same artificially designed routine shmobile_cpuidle_enter() as the .enter() callback for all of its cpuidle states. However, shmobile_cpuidle_enter() calls a different "enter" function for each state using an array of function pointers populated by the sh7372 PM initialization code. Moreover, the states[] array of the shmobile cpuidle driver is populated by that code as well, although in principle it just might have been filled with static data. All of that complexity goes away if the sh7372 cpuidle code is allowed to define its own cpuidle driver structure that can be passed for registration to the common shmobile cpuidle initialization routine, so modify the code accordingly. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Magnus Damm <damm@opensource.se>
| * ARM: shmobile: Move definition of shmobile_init_late() to headerRafael J. Wysocki2012-09-041-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | The role of the only function in the common.c file in arch/arm/mach-shmobile, shmobile_init_late(), is to call two initializers whose definitions depend on kernel configuration options. Those initializers may very well be called from a static inline function in arm/mach-shmobile/include/mach/common.h, though, in which makes the code a bit easier to read. Moreover, the common.c may be dropped entirely then. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Magnus Damm <damm@opensource.se>
* | ARM: SoC: convert shmobile SMP to SMP operationsMarc Zyngier2012-09-141-12/+12
|/ | | | | | | | | | | Convert shmobile SMP platforms to use struct smp_operations to provide their SMP and CPU hotplug operations. Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: shmobile: r8a7740: add MERAM work-aroundKuninori Morimoto2012-06-201-0/+1
| | | | | | | | | | | | | | | r8a7740 chip has lasting errata on MERAM buffer, and this patch adds its work-around on setup-r8a7740.c It solved CEU/VIO6C/2D-DMAC/VCP1/VPU5F/JPU/DISP memroy access error. But MERAM driver can't control this issue, since this work-around requires access to non-MERAM register address. So, This it will be called as board specific code at this point. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>