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path: root/arch/mips/cavium-octeon/octeon-irq.c
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* MIPS: octeon: Fix GPIO number in IRQ chip private dataAlexander Sverdlin2013-05-081-3/+2
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-2/+2
* MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.David Daney2012-12-131-1/+0
* MIPS: OCTEON: Register ciu/ciu2 as the default irq_domain.David Daney2012-08-311-0/+2
* MIPS: Octeon: Make interrupt controller work with threaded handlers.David Daney2012-08-311-143/+137
* MIPS: OCTEON: Add support for cn68XX interrupt controller.David Daney2012-08-311-24/+544
* MIPS: Octeon: Fix broken interrupt controller code.David Daney2012-08-171-46/+43
* MIPS: Octeon: Use device tree to register serial ports.David Daney2012-07-231-4/+0
* netdev: octeon_mgmt: Convert to use device tree.David Daney2012-07-231-2/+0
* i2c: Convert i2c-octeon.c to use device tree.David Daney2012-07-231-2/+0
* MIPS: Octeon: Setup irq_domains for interrupts.David Daney2012-07-231-9/+206
* MIPS: OCTEON: Consolidate the edge and level irq_chip structures.David Daney2012-07-231-28/+2
* MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.David Daney2012-07-231-43/+0
* MIPS: Octeon: Add irq handlers for GPIO interrupts.David Daney2012-07-231-1/+110
* MIPS: Octeon: Simplify irq_cpu_on/offline irq chip functionsThomas Gleixner2011-03-291-54/+17
* MIPS: Octeon: Rewrite interrupt handling code.David Daney2011-03-291-607/+815
* MIPS: Octeon: Fix fixup_irqs for HOTPLUG_CPUDavid Daney2010-08-051-39/+69
* MIPS: Octeon: Improve interrupt handling.David Daney2010-08-051-100/+256
* MIPS: Octeon: Move MSI code out of octeon-irq.c.David Daney2010-08-051-93/+0
* MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.David Daney2010-02-271-28/+14
* MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.Ralf Baechle2010-02-271-5/+5
* MIPS: Make various locks static.Ralf Baechle2010-02-271-1/+2
* MIPS: Octeon: Do proper acknowledgment of CIU timer interrupts.David Daney2010-02-271-4/+63
* MIPS: Octeon: Fix EOI handling.David Daney2010-02-271-6/+34
* MIPS: Octeon: Use lockless interrupt controller operations when possible.David Daney2009-11-021-36/+178
* MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinityDavid Daney2009-11-021-4/+6
* MIPS: Cavium: Add CPU hotplugging code.Ralf Baechle2009-06-241-0/+59
* MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.Ralf Baechle2009-06-241-1/+1
* MIPS: Add Cavium OCTEON PCI support.David Daney2009-06-171-0/+2
* irq: change ->set_affinity() to return statusYinghai Lu2009-04-281-2/+6
* MIPS: Convert obsolete irq_desc_t to struct irq_descThomas Gleixner2009-03-301-1/+1
* MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.David Daney2009-01-111-0/+497
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