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* | sh-pfc: Remove unused input_pd and input_pu rangesLaurent Pinchart2013-07-292-12/+0
| | | | | | | | | | | | | | The ranges are not used anymore, remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* | sh-pfc: shx3: Remove unused input_pu rangeLaurent Pinchart2013-07-291-146/+124
| | | | | | | | | | | | | | | | | | | | | | | | The PFC SHX3 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SHX3 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* | sh-pfc: sh7786: Remove unused input_pu rangeLaurent Pinchart2013-07-291-140/+120
| | | | | | | | | | | | | | | | | | | | | | | | The PFC SH7786 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7786 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* | sh-pfc: sh7785: Remove unused input_pu rangeLaurent Pinchart2013-07-291-253/+222
| | | | | | | | | | | | | | | | | | | | | | | | The PFC SH7785 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7785 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* | sh-pfc: sh7757: Remove unused input_pu rangeLaurent Pinchart2013-07-291-170/+129
| | | | | | | | | | | | | | | | | | | | | | | | The PFC SH7757 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7757 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* | sh-pfc: sh7724: Remove unused input_pu rangeLaurent Pinchart2013-07-291-389/+342
| | | | | | | | | | | | | | | | | | | | | | | | The PFC SH7724 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7724 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* | sh-pfc: sh7723: Remove unused input_pu rangeLaurent Pinchart2013-07-291-23/+16
| | | | | | | | | | | | | | | | | | | | | | | | The PFC SH7723 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7723 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* | sh-pfc: sh7722: Remove unused input_pd and input_pu rangesLaurent Pinchart2013-07-291-241/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | The PFC SH7722 SoC data contains input_pd and input_pu ranges used to configure pull-down and pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the ranges are thus not used anymore. Remove them. If required, configuring pull-down and pull-up resistors for the SH7722 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* | sh-pfc: sh7720: Remove unused input_pu rangeLaurent Pinchart2013-07-291-248/+217
|/ | | | | | | | | | | | The PFC SH7720 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7720 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* Merge tag 'pinctrl-for-v3.11-1' of ↵Linus Torvalds2013-07-032-2/+268
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: - A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. * tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe() pinctrl: remove bindings for pinconf options needing more thought pinctrl: remove slew-rate parameter from tz1090 pinctrl: set unit for debounce time pinconfig to usec pinctrl: more clarifications for generic pull configs pinctrl: rip out the direct pinconf API pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver pinctrl-tz1090: add TZ1090 pinctrl driver pinctrl: samsung: Staticize drvdata_list pinctrl: rockchip: Add missing irq_gc_unlock() call before return error pinctrl: abx500: rework error path pinctrl: abx500: suppress hardcoded value pinctrl: abx500: factorize code pinctrl: abx500: fix abx500_gpio_get() pinctrl: abx500: fix abx500_pin_config_set() pinctrl: abx500: Add device tree support sh-pfc: Guard DT parsing with #ifdef CONFIG_OF pinctrl: add Intel BayTrail GPIO/pinctrl support pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc pinctrl: Staticize local symbols ... Conflicts: drivers/net/ethernet/ti/davinci_mdio.c drivers/pinctrl/Makefile
| * sh-pfc: Guard DT parsing with #ifdef CONFIG_OFLaurent Pinchart2013-06-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a compilation error caused by pinconf_generic_parse_dt_config() not being defined on !CONFIG_OF platforms by guarding the whole DT node parsing code with #ifdef CONFIG_OF. Defining a pinconf_generic_parse_dt_config() on !CONFIG_OF would have been possible as well, but would have resulted in a larger code size on !CONFIG_OF platforms (such as arch/sh). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * sh-pfc: Add pinconf support to DT bindingsLaurent Pinchart2013-06-181-12/+97
| | | | | | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * sh-pfc: Add DT supportLaurent Pinchart2013-06-182-1/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | Support device instantiation through the device tree. The compatible property is used to select the SoC pinmux information. Set the gpio_chip device field to the PFC device to enable automatic GPIO OF support. Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * sh-pfc: Remove support for platform dataLaurent Pinchart2013-06-181-2/+1
| | | | | | | | | | | | | | | | Platform data isn't used, support can thus be removed. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | sh-pfc: r8a7778: tidyup MMC_D1 pinKuninori Morimoto2013-06-181-2/+2
| | | | | | | | | | | | | | | | | | MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8) Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | pinctrl: r8a7790: fix two pin numbersGuennadi Liakhovetski2013-06-171-9/+7
| | | | | | | | | | | | | | | | Fix two erroneous MMCIF1 pin numbers on r8a7790. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7790: add HSCIF pin groupsUlrich Hecht2013-06-121-15/+196
| | | | | | | | | | | | | | | | Adds HSCIF data/clk/ctrl groups to R8A7790 PFC driver. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfacesGuennadi Liakhovetski2013-06-121-0/+198
| | | | | | | | | | | | | | | | | | This patch adds pinmux groups and functions for the two MMCIF and three SDHI interfaces on r8a73a4 (APE6). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entryPhil Edworthy2013-06-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The list of functions selected by the MOD_SEL2 register was missing an entry. This caused all entries after this to modify the MOD_SEL2 register incorrectly. This bug showed up when selecting i2c2_c pins on the Renesas Hurricane board. This bug has been present since pinmux support was added for the r8a7779 SoC by 881023d28b465eb457067dc8bbca0f24d8b34279 ("sh-pfc: Add r8a7779 pinmux support") in v3.8-rc4. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfacesGuennadi Liakhovetski2013-06-051-0/+294
| | | | | | | | | | | | | | | | This patch adds pinmux groups and functions for the two MMCIF and four SDHI interfaces on r8a73a4 (APE6). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: add MMCIF pin groupsKuninori Morimoto2013-06-051-0/+38
| | | | | | | | | | | | | | Add MMCIF CLK/CMD/DATA groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: add HSPI pin groupsKuninori Morimoto2013-06-051-0/+61
| | | | | | | | | | | | | | Add HSPI CLK/CS/RX/TX pin groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: add I2C pin groupsKuninori Morimoto2013-06-051-0/+54
| | | | | | | | | | | | | | Add I2C SDA/SCL pin groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | pinctrl: sh-pfc: fix a typo in pfc-r8a7790Guennadi Liakhovetski2013-06-051-9/+9
| | | | | | | | | | | | | | | | | | Fix multiple occurrences of the "RESEVED" typo. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | pinctrl: sh-pfc: fix r8a7790 Function Select register tablesGuennadi Liakhovetski2013-06-051-8/+6
| | | | | | | | | | | | | | | | | | | | | | Fix several errors in Peripheral Function Select register tables for r8a7790, which prevent various function pins from being correctly configured. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: fixup IRQ1A settingsKuninori Morimoto2013-06-051-1/+1
| | | | | | | | | | | | | | | | IP2[31] func2 is IRQ1A, not IRQ3A Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7779: add Ether pin groupsSergei Shtylyov2013-06-051-0/+42
| | | | | | | | | | | | | | | | | | Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: add Ether pin groupsSergei Shtylyov2013-06-051-0/+26
| | | | | | | | | | | | | | | | | | Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: add VIN pin groupsVladimir Barinov2013-06-051-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver. While at it, add SH_PFC_MUX8() macro for 8-bit data busses. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> [Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus, made use of SH_PFC_*() macros to define the pin groups.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: sh73a0: Remove function GPIOsLaurent Pinchart2013-06-051-395/+0
| | | | | | | | | | | | | | No sh73a0 platform use the function GPIOs API. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7790: Add TPU pin groups and functionsLaurent Pinchart2013-06-051-0/+41
| | | | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Add TPU pin groups and functionsLaurent Pinchart2013-06-051-0/+50
| | | | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: sh73a0: Add TPU pin groups and functionsLaurent Pinchart2013-06-051-0/+213
| | | | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: add USB pin groupsSergei Shtylyov2013-06-051-0/+28
| | | | | | | | | | | | | | | | | | Add USB0/1 PENC/USB_OVC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: sh73a0: Add VCCQ MC0 regulatorLaurent Pinchart2013-06-052-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sh73a0 has an internal power gate on the VCCQ power supply for the SDHI0 device that is controlled (for some strange reason) by a bit in a PFC register. This feature should be exposed as a regulator. As the same register is also used for pin control purposes there is no way to achieve atomic read/write sequences with a separate regulator driver. We thus need to implement the regulator here. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: Add support for SoC-specific initializationLaurent Pinchart2013-06-053-1/+18
| | | | | | | | | | | | | | | | | | Add two optional init and exit SoC operations and call them from the core at probe and remove time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: tidyup SDHI naming suffixes and sort it alphabeticallyKuninori Morimoto2013-06-051-84/+80
| | | | | | | | | | | | | | | | SDHI 1/2 are the target Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7778: Fix outdated GPIO_FN commentsLaurent Pinchart2013-06-051-13/+13
| | | | | | | | | | | | | | | | Function GPIOs have been removed, remove comments that refer to them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Add bias (pull-up/down) pinconf supportLaurent Pinchart2013-06-051-145/+220
| | | | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Replace GPIO_PORTx enum with GPIO port numbersLaurent Pinchart2013-06-051-32/+39
| | | | | | | | | | | | | | | | | | The PFC GPIO API implementation moved to using port numbers. Replace all GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx enum values are identical to the port number on this platform. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove function GPIOsLaurent Pinchart2013-06-051-205/+0
| | | | | | | | | | | | | | No r8a7740 platform use the function GPIOs API. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove HDMI function GPIOSLaurent Pinchart2013-06-041-4/+0
| | | | | | | | | | | | | | | | All r8a7740 platforms now use the pinctrl API to control the HDMI pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove FSI function GPIOSLaurent Pinchart2013-06-041-12/+0
| | | | | | | | | | | | | | | | All r8a7740 platforms now use the pinctrl API to control the FSI pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove CEU function GPIOSLaurent Pinchart2013-06-041-28/+0
| | | | | | | | | | | | | | | | All r8a7740 platforms now use the pinctrl API to control the CEU pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove GETHER function GPIOSLaurent Pinchart2013-06-041-20/+0
| | | | | | | | | | | | | | | | All r8a7740 platforms now use the pinctrl API to control the GETHER pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove BSC function GPIOSLaurent Pinchart2013-06-041-24/+2
| | | | | | | | | | | | | | | | All r8a7740 platforms now use the pinctrl API to control the BSC pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove INTC function GPIOSLaurent Pinchart2013-06-041-34/+0
| | | | | | | | | | | | | | | | All r8a7740 platforms now use the pinctrl API to control the INTC pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Remove SCIF function GPIOSLaurent Pinchart2013-06-041-72/+0
| | | | | | | | | | | | | | | | All r8a7740 platforms now use the pinctrl API to control the SCIF pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Hardcode the LCDC0 outputLaurent Pinchart2013-06-041-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r8a7740 has two LCDC units and two sets of LCDC output signals. By default LCDC0 is routed to the LCD0 signals, and LCDC1 to the LCD1 signals. However, LCDC1 can be routed to the LCD0 signals by setting bit MSEL6 in MSEL3CR (the LCD0 signals are further pinmuxed the usual way). This could be configured by duplicating the LCD0 pin groups for LCDC1. However, this would unnecessarily complicate the LCD pin groups, as no r8a7740 board supported in mainline use such a configuration. Hardcode the MSEL3CR MSEL6 bit to 0 for now. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: r8a7740: Add HDMI pin groups and functionsLaurent Pinchart2013-06-041-0/+14
| | | | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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