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| * | | | | pinctrl: adi2: Convert to devm_ioremap_resourceAxel Lin2013-09-271-32/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | pinctrl: at91: fix sam9x5 debounce/deglitch functionsBoris BREZILLON2013-09-271-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace at91_mux_get_deglitch with at91_mux_pio3_get_deglitch when using sam9x5 (pio3) IP. at91_mux_get_deglitch only test the activation of the "Input Filter" which may be overloaded by the activation of the "Input Filter Slow Clock" to use the input filter as a debounce filter instead of a deglitch filter. Fix at91_mux_pio3_get_debounce to test the activation of the Input Filter before testing the activation of the debounce filter (Input Filter Slow Clock depends on Input Filter). Fix at91_mux_pio3_set_debounce function to avoid disabling the deglitch filter ("Input Filter") when debounce filter is disabled. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | pinctrl: at91: fix typosBoris BREZILLON2013-09-271-3/+3
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix AT91_PINCTRL_DEBOUNCE_VAL dt macro typo. Fix at91_pinctrl_mux_ops callback typos. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: pinctrl-adi2-bf60x: remove useless and duplicated GPIO definition ↵Sonic Zhang2013-09-231-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for PPI2. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: pinctrl-adi2: Add dependency to arch BLACKFIN in Kconfig.Sonic Zhang2013-09-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.Sonic Zhang2013-09-196-0/+2392
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new ADI GPIO2 controller was introduced since the BF548 and BF60x processors. It differs a lot from the old one on BF5xx processors. So, create a pinctrl driver under the pinctrl framework. - Define gpio ports and pin interrupt controllers as individual platform devices. - Register a pinctrl driver for the whole GPIO ports and pin interrupt devices. - Probe pint devices before port devices. Put device instances into the global gpio and pint lists. - Define peripheral, irq and gpio reservation bit masks for each gpio port as runtime resources. - Save and restore gpio port and pint status MMRs in syscore PM functions. - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Handle peripheral and gpio requests in pinctrl operation functions. - Demux gpio IRQs via the irq_domain created by each GPIO port. v2-changes: - Remove unlinke() directive. v3-changes: - Rename struct adi_pmx to adi_pinctrl. - Fix the comments of struct gpio_pint. - Remove unused pin_base in struct gpio_port. - Change pint_assign into bool type. - Add comments about the relationship between pint device and port device to the driver header. - Use BIT macro to shift bit. - Remove all bitmap reservation help functions. Inline reservation functions into the actual code. - Remove gpio and offset mutual reference help functions. - Remove all help functions to find gpio_port and adi_pinctrl structs. Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Pass bool type usage variable to port_setup help function. - Separate long bit operations into several lines and add comments. - Use debugfs to output all GPIO request information. - Avoid to set drvdata to NULL - Add explanation to function adi_gpio_init_int() - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Remove the reference to pin control device from the gpio_port struct. Remove the reference list to gpio device from the adi_pinctrl struct. Replace the global adi_pinctrl list with adi_gpio_port_list. Walk through the gpio list to do power suspend and resume operations. - Remove the global GPIO base from struct adi_pinctrl, define pin base in the platform data for each GPIO port device. - Initialize adi_pinctrl_setup in arch_initcall(). - print the status of triggers, whether it is in GPIO mode, if it is flagged to be used as IRQ, etc in adi_pin_dbg_show(). - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. v4-changes: - remove useless system_state checking. - replace dev_err with dev_warn in both irq and gpio pin cases. - comment on relationship between irq type and invert operation. - It is not necessary to check the reservation mode of the requested pin in IRQ chip operation. Remove the reservation map. - Use existing gpio/pinctrl subsystem debugfs files. Remove pinctrl-adi2 driver specific debugfs output. - Add linkport group and function information for bf60x. - Separate uart and ctsrts pins into 2 groups. - Separate APAPI and alternative ATAPI pins into 2 groups. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | pinctrl: single: Fix build when not built on ARMTony Lindgren2013-10-181-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looks like we need a little bit of arch specific handling with the generic IRQ. Fix the issue with an ifdef the same way as other drivers do. ARM needs things set to IRQF_VALID, which also then sets noprobe. Others seem to use just irq_set_noprobe(). Otherwise we can get: drivers/pinctrl/pinctrl-single.c: In function 'pcs_irqdomain_map': drivers/pinctrl/pinctrl-single.c:1750:2: error: implicit declaration of function 'set_irq_flags' [-Werror=implicit-function-declaration] drivers/pinctrl/pinctrl-single.c:1750:21: error: 'IRQF_VALID' undeclared (first use in this function) drivers/pinctrl/pinctrl-single.c:1750:34: error: 'IRQF_PROBE' undeclared (first use in this function) Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | pinctrl: single: Add support for auxdataTony Lindgren2013-10-101-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For omaps, we still have dependencies to the legacy code for handling the PRM (Power Reset Management) interrupts, and also for reconfiguring the io wake-up chain after changes. Let's pass the PRM interrupt and the rearm functions via auxdata. Then when at some point we have a proper PRM driver, we can get the interrupt via device tree and set up the rearm function as exported function in the PRM driver. By using auxdata we can remove a dependency to the wake-up events for converting omap3 to be device tree only. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Prakash Manjunathappa <prakash.pm@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: linux-kernel@vger.kernel.org Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | pinctrl: single: Add support for wake-up interruptsTony Lindgren2013-10-101-0/+322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pin control registers can have interrupts for example for device wake-up. These interrupts can be treated as a chained interrupt controller as suggested earlier by Linus Walleij <linus.walleij@linaro.org>. This patch adds support for interrupts in a way that should be pretty generic, and works for the omaps that support wake-up interrupts. On omaps, there's an interrupt enable and interrupt status bit for each pin. The two pinctrl domains on omaps share a single interrupt from the PRM chained interrupt handler. Support for other similar hardware should be easy to add. Note that this patch does not attempt to handle the wake-up interrupts automatically unlike the earlier patches. This patch allows the device drivers to do a request_irq() on the wake-up pins as needed. I'll try to do also a separate generic patch for handling the wake-up events automatically. Also note that as this patch makes the pinctrl-single an irq controller, the current bindings need some extra trickery to use interrupts from two different interrupt controllers for the same driver. So it might be worth waiting a little on the patches enabling the wake-up interrupts from drivers as there should be a generic way to handle it coming. And also there's been discussion of interrupts-extended binding for using interrupts from multiple interrupt controllers. In any case, this patch should be ready to go allowing handling the wake-up interrupts in a generic way, or separately from the device drivers. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Prakash Manjunathappa <prakash.pm@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: linux-kernel@vger.kernel.org Cc: Benoît Cousson <bcousson@baylibre.com> Cc: devicetree@vger.kernel.org Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | pinctrl: single: Prepare for supporting SoC specific featuresTony Lindgren2013-10-091-9/+29
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's replace is_pinconf with flags and add struct pcs_soc_data so we can support SoC specific features like pin wake-up events. Done in collaboration with Roger Quadros <rogerq@ti.com>. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Prakash Manjunathappa <prakash.pm@ti.com> Cc: linux-kernel@vger.kernel.org Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | pinctrl: palmas: do not abort pin configuration for BIAS_DEFAULTLaxman Dewangan2013-09-271-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent movement of all configurations of pin in the single call of pin_config_set(), it is aborting configuration if BIAS_PULL_PIN_DEFAULT is selected as return of configuration. The original idea was to just avoid any update on register for pull up/down configuration if this option is selected. Fixing this by just bypassing any register update for BIAS_PULL_PIN_DEFAULT and continuing the remaining configuration. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: Correct number of pins for s5pv210Mateusz Krawczuk2013-09-271-6/+6
| |/ |/| | | | | | | | | | | | | | | | | Values of pins in table s5pv210 bank are incorrect. This patch correct values. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: remove an unnecessary castDan Carpenter2013-09-231-1/+1
| | | | | | | | | | | | | | | | | | sizeof() is already size_t so there is no need to cast here. Generally, casting inside the min() macro instead of using min_t() is considered bad style. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: fix pinconf_dbg_config_write return typeVincent Stehlé2013-09-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Have pinconf_dbg_config_write() return a ssize_t. This fixes the following compilation warning: drivers/pinctrl/pinconf.c:617:2: warning: initialization from incompatible pointer type [enabled by default] drivers/pinctrl/pinconf.c:617:2: warning: (near initialization for ‘pinconf_dbg_pinconfig_fops.write’) [enabled by default] Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: tegra114: Remove MODULE_ALIASThierry Reding2013-09-191-3/+2
|/ | | | | | | | | | | | The driver cannot be built as a module, so having a MODULE_ALIAS() isn't useful. While at it, fix a small typo in the file header comment and make the module description string consistent with those for earlier Tegra SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'PTR_RET-for-linus' of ↵Linus Torvalds2013-09-041-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux Pull PTR_RET() removal patches from Rusty Russell: "PTR_RET() is a weird name, and led to some confusing usage. We ended up with PTR_ERR_OR_ZERO(), and replacing or fixing all the usages. This has been sitting in linux-next for a whole cycle" [ There are still some PTR_RET users scattered about, with some of them possibly being new, but most of them existing in Rusty's tree too. We have that #define PTR_RET(p) PTR_ERR_OR_ZERO(p) thing in <linux/err.h>, so they continue to work for now - Linus ] * tag 'PTR_RET-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: GFS2: Replace PTR_RET with PTR_ERR_OR_ZERO Btrfs: volume: Replace PTR_RET with PTR_ERR_OR_ZERO drm/cma: Replace PTR_RET with PTR_ERR_OR_ZERO sh_veu: Replace PTR_RET with PTR_ERR_OR_ZERO dma-buf: Replace PTR_RET with PTR_ERR_OR_ZERO drivers/rtc: Replace PTR_RET with PTR_ERR_OR_ZERO mm/oom_kill: remove weird use of ERR_PTR()/PTR_ERR(). staging/zcache: don't use PTR_RET(). remoteproc: don't use PTR_RET(). pinctrl: don't use PTR_RET(). acpi: Replace weird use of PTR_RET. s390: Replace weird use of PTR_RET. PTR_RET is now PTR_ERR_OR_ZERO(): Replace most. PTR_RET is now PTR_ERR_OR_ZERO
| * pinctrl: don't use PTR_RET().Rusty Russell2013-07-151-1/+1
| | | | | | | | | | | | | | We've already tested that it's an error. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
* | pinctrl: sunxi: Fix off-by-one for valid offset range checkingAxel Lin2013-08-301-1/+1
| | | | | | | | | | | | | | The valid offset range should be 0 ... chip->ngpio - 1. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunxi: drop lock on error pathLinus Walleij2013-08-301-1/+3
| | | | | | | | | | | | | | | | | | | | I forgot to drop the lock for the return inside the loop protected by the spinlock in the pin config routine when merging in -rc7 in commit 6ad30ce046aefbdc3848232c665a728860d7bb68 Reported-by: Sherman Yin <syin@broadcom.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: pinconf-generic: Remove ti prefix in dev_err messagesAxel Lin2013-08-291-3/+2
| | | | | | | | | | | | | | | | It does not make sense to show ti prefix in pinconf_generic_dt_subnode_to_map() dev_err messages. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'v3.11-rc7' into develLinus Walleij2013-08-296-7/+81
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Merged in this to avoid conflicts with the big locking fixes from upstream. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/pinctrl/pinctrl-sunxi.c
| * | pinctrl: sunxi: Add spinlocksMaxime Ripard2013-08-072-3/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code use no locking at all, which is obviously not that great and can lead to concurrency issues, especially with the newer SMP SoCs from Allwinner. Add some locking where it's needed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
| * | pinctrl: sunxi: Fix gpio_set behaviourMaxime Ripard2013-08-071-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current gpio_set function is ignoring the previous value set in the GPIO value register, which leads in erasing the values already set for the other GPIOs in the same bank when setting the value of a given GPIO. Add the usual read/mask/write pattern to fix this brown paper bag bug. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
| * | pinctrl: sunxi: Read register before writing to it in irq_set_typeMaxime Ripard2013-08-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The current irq_set_type code doesn't read the current register value before writing to it, leading to the older programmed values being overwritten and everything but the latest value being reset. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
| * | pinctrl: fix a memleak when freeing mapsLinus Walleij2013-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | We forgot to free the node itself when free:ing a map. Reported-by: xulinuxkernel <xulinuxkernel@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: pinctrl-single: fix compile warning when no CONFIG_PMJean-Francois Moine2013-07-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This warning has been introduced by the commit 0f9bc4bcdf4f pinctrl: single: adopt pinctrl sleep mode management Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DTGuennadi Liakhovetski2013-07-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PFC pinctrl driver on sh73a0 is also regiatering a VccQ regulator for SDHI0. However, its consumers list only included the platform-data based SDHI device name. When booted with DT SDHI0 couldn't enable VccQ and therefore was unusable. Fix this by adding a consumer with DT-based name. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without ↵Qipan Li2013-07-221-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flowctrl this patch adds the lost pin group which supports to let USP0 to simulate a UART without hardware flow control. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: sirf: fix the pin number and mux bit for usp0Qipan Li2013-07-221-2/+2
| |/ | | | | | | | | | | | | | | | | we missed a pin and related mux bit for usp pin group, this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: rockchip: Implement .request() and .free() callbacksAxel Lin2013-08-291-0/+12
| | | | | | | | | | | | | | | | | | | | Implement .request() and .free() callbacks on the GPIO chips to inform pinctrl when a GPIO is requested or freed. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: at91: fix get_pullup/down function returnBoris BREZILLON2013-08-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the pullup/down for this pin (pin is represented as a bit position) is disabled. Cc: stable <stable@vger.kernel.org> # 3.8+ Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sh-pfc: remove unnecessary platform_set_drvdata()Jingoo Han2013-08-281-2/+0
| | | | | | | | | | | | | | | | | | | | The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Add s5pv210 support to pinctrl-exynosMateusz Krawczuk2013-08-284-1/+62
| | | | | | | | | | | | | | | | | | This patch implements pinctrl support and adds device tree bindings for s5pv210. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: utils: include export.h to avoid warningsLaxman Dewangan2013-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Include "linux/export.h" to avoid following warnings during compilation: /*** pinctrl/pinctrl-utils.c:53:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:53:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:53:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:70:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:70:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:70:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:98:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:98:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:98:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:122:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:122:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:122:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:135:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:135:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:135:1: warning: parameter names (without types) in function declaration [enabled by default] **/ Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: s3c24xx: off by one in s3c24xx_eint_init()Dan Carpenter2013-08-281-1/+1
| | | | | | | | | | | | | | | | | | If "irq == NUM_EINT" then it writes one space beyond the end of the eint_data->domains[] array. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: testing the wrong variableDan Carpenter2013-08-281-1/+1
| | | | | | | | | | | | | | | | We wanted to test "*map" here instead of "map". Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: abx500: fix bitwise AND testDan Carpenter2013-08-281-3/+3
| | | | | | | | | | | | | | | | The intent here was to test if the bit was set or not but there is a logical vs bitwise AND typo so it is true if any bits are set. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: Convert to use devm_ioremap_resourceJisheng Zhang2013-08-281-6/+5
| | | | | | | | | | | | | | | | | | | | | | The resource mapped by of_iomap() isn't unmapped in error path. This patch fix the resource leakage by using devm_ioremap_resource() instead of of_iomap(). Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Pass all configs to driver on pin_config_set()Sherman Yin2013-08-2823-724/+948
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When setting pin configuration in the pinctrl framework, pin_config_set() or pin_config_group_set() is called in a loop to set one configuration at a time for the specified pin or group. This patch 1) removes the loop and 2) changes the API to pass the whole pin config array to the driver. It is now up to the driver to loop through the configs. This allows the driver to potentially combine configs and reduce the number of writes to pin config registers. All c files changed have been build-tested to verify the change compiles and that the corresponding .o is successfully generated. Signed-off-by: Sherman Yin <syin@broadcom.com> Reviewed-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Matt Porter <matt.porter@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: tz1090-pdc: Convert to devm_ioremap_resourceAxel Lin2013-08-281-19/+3
| | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: tz1090: Convert to devm_ioremap_resourceAxel Lin2013-08-281-19/+3
| | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: tegra: Convert to devm_ioremap_resourceAxel Lin2013-08-281-19/+3
| | | | | | | | | | | | | | | | Using the new devm_ioremap_resource() we can greatly simplify resource handling. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: rockchip: Simplify pin_to_bank equationAxel Lin2013-08-281-2/+1
| | | | | | | | | | | | | | | | | | | | If (b->pin_base + b->nr_pins - 1) < pin is true, pin >= b->pin_base is always true because b->nr_pins is never less than 0. Thus this patch simplify the equation. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: spear: Convert to devm_ioremap_resourceAxel Lin2013-08-281-9/+4
| | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: rockchip: Remove of_match_ptr macro for DT only driverAxel Lin2013-08-281-1/+1
| | | | | | | | | | | | | | | | This is a DT only driver and rockchip_pinctrl_dt_match is always compiled in. Thus remove of_match_ptr macro. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: palmas: PINCTRL_PALMAS needs to select PINMUXAxel Lin2013-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below build error if !PINMUX. CC drivers/pinctrl/pinctrl-palmas.o drivers/pinctrl/pinctrl-palmas.c:741:21: error: variable 'palmas_pinmux_ops' has initializer but incomplete type drivers/pinctrl/pinctrl-palmas.c:742:2: error: unknown field 'get_functions_count' specified in initializer drivers/pinctrl/pinctrl-palmas.c:742:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:742:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] drivers/pinctrl/pinctrl-palmas.c:743:2: error: unknown field 'get_function_name' specified in initializer drivers/pinctrl/pinctrl-palmas.c:743:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:743:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] drivers/pinctrl/pinctrl-palmas.c:744:2: error: unknown field 'get_function_groups' specified in initializer drivers/pinctrl/pinctrl-palmas.c:744:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:744:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] drivers/pinctrl/pinctrl-palmas.c:745:2: error: unknown field 'enable' specified in initializer drivers/pinctrl/pinctrl-palmas.c:745:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:745:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] make[2]: *** [drivers/pinctrl/pinctrl-palmas.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: core: Add proper mutex lock in pinctrl_request_gpioAxel Lin2013-08-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This one is missed in commit 42fed7ba "pinctrl: move subsystem mutex to pinctrl_dev struct". I think this fixes the race between pin_free() and pin_request() calls. It protects accessing the members of pctldev->desc. (e.g. update desc->mux_usecount, desc->gpio_owner, desc->mux_owner, etc) Current code grabs pctldev->mutex before calling pinmux_free_gpio(), but did not grab the mutex while calling pinmux_request_gpio(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: imx: Fix compilation with DEBUG enabledSascha Hauer2013-08-231-16/+3
| | | | | | | | | | | | | | | | | | | | | | This became broken with converting the pinmux arrays into struct types. While at it replace the preprocessor magic with a simple dev_dbg. Reported-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: rockchip: Simplify for loop iterationAxel Lin2013-08-231-15/+6
| | | | | | | | | | | | | | Just return once a match found makes the code simpler and shorter. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: tegra: use pinctrl-utils APIs for mappingLaxman Dewangan2013-08-231-112/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pin control utility functions provides the function for creating map lists. In place of implementing APIs locally in Tegra pin control driver for creating map lists, use the utility functions. This reduces the code size and avoid duplication. Changes from V1: - Rebased change on top of V1. - Use pinctrl_utils_dt_free_map Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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