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path: root/include/asm-mips/cpu-features.h
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* [MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle2007-10-111-1/+4
* [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle2007-10-111-3/+0
* [MIPS] Enable support for the userlocal hardware registerRalf Baechle2007-07-101-0/+4
* [MIPS] FPU ownership management & preemption fixesAtsushi Nemoto2007-03-171-0/+3
* [MIPS] Use the proper technical term for naming some of the cache macros.Ralf Baechle2006-07-131-2/+2
* [MIPS] Default cpu_has_mipsmt to a runtime checkChris Dearman2006-07-131-5/+1
* [MIPS] Fix configuration of R2 CPU features and multithreading.Ralf Baechle2006-06-291-12/+8
* Don't include linux/config.h from anywhere else in include/David Woodhouse2006-04-261-1/+0
* [MIPS] FPU affinity for MT ASE.Ralf Baechle2006-04-191-1/+1
* [MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto2006-03-181-0/+3
* MIPS: Reorganize ISA constants strictly as bitmasks.Ralf Baechle2006-01-101-24/+21
* MIPS: Introduce machinery for testing for MIPSxxR1/2.Ralf Baechle2006-01-101-0/+24
* Cleanup the mess in cpu_cache_init.Ralf Baechle2005-10-291-2/+13
* Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle2005-10-291-0/+24
* Redo RM9000 workaround which along with other DSP ASE changes wasRalf Baechle2005-10-291-11/+0
* Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle2005-10-291-0/+4
* Cleanup decoding of MIPSxx config registers.Ralf Baechle2005-10-291-3/+13
* [PATCH] mips: clean up 32/64-bit configurationRalf Baechle2005-09-051-2/+2
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+159
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