From 0a5011673af0fe995a3e448d3479a027a4082ddf Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 7 Dec 2016 16:22:17 +0100 Subject: ARM: davinci: da850: coding style fix Fix alignment of the clock lookup table entries. Signed-off-by: Bartosz Golaszewski [nsekhar@ti.com: commit headline update] Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da850.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index e770c97ea45c..063560d75b22 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -543,7 +543,7 @@ static struct clk_lookup da850_clks[] = { CLK("spi_davinci.0", NULL, &spi0_clk), CLK("spi_davinci.1", NULL, &spi1_clk), CLK("vpif", NULL, &vpif_clk), - CLK("ahci_da850", NULL, &sata_clk), + CLK("ahci_da850", NULL, &sata_clk), CLK("davinci-rproc.0", NULL, &dsp_clk), CLK(NULL, NULL, &ehrpwm_clk), CLK("ehrpwm.0", "fck", &ehrpwm0_clk), -- cgit v1.2.1 From b40881738f098e1be5c32e89c2691b688fc00875 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 7 Dec 2016 16:22:18 +0100 Subject: ARM: davinci: da850: fix da850_set_pll0rate() This function is confusing - its second argument is an index to the freq table, not the requested clock rate in Hz, but it's used as the set_rate callback for the pll0 clock. It leads to an oops when the caller doesn't know the internals and passes the rate in Hz as argument instead of the cpufreq index since this argument isn't bounds checked either. Fix it by iterating over the array of supported frequencies and selecting a one that matches or returning -EINVAL for unsupported rates. Also: update the davinci cpufreq driver. It's the only user of this clock and currently it passes the cpufreq table index to clk_set_rate(), which is confusing. Make it pass the requested clock rate in Hz. Signed-off-by: Bartosz Golaszewski Acked-by: Viresh Kumar [nsekhar@ti.com: commit headline update] Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da850.c | 22 ++++++++++++++++++---- drivers/cpufreq/davinci-cpufreq.c | 2 +- 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 063560d75b22..07d36fc1e33c 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -1174,14 +1174,28 @@ static int da850_set_armrate(struct clk *clk, unsigned long index) return clk_set_rate(pllclk, index); } -static int da850_set_pll0rate(struct clk *clk, unsigned long index) +static int da850_set_pll0rate(struct clk *clk, unsigned long rate) { - unsigned int prediv, mult, postdiv; - struct da850_opp *opp; struct pll_data *pll = clk->pll_data; + struct cpufreq_frequency_table *freq; + unsigned int prediv, mult, postdiv; + struct da850_opp *opp = NULL; int ret; - opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data; + rate /= 1000; + + for (freq = da850_freq_table; + freq->frequency != CPUFREQ_TABLE_END; freq++) { + /* rate is in Hz, freq->frequency is in KHz */ + if (freq->frequency == rate) { + opp = (struct da850_opp *)freq->driver_data; + break; + } + } + + if (!opp) + return -EINVAL; + prediv = opp->prediv; mult = opp->mult; postdiv = opp->postdiv; diff --git a/drivers/cpufreq/davinci-cpufreq.c b/drivers/cpufreq/davinci-cpufreq.c index b95a872800ec..d54a27c99121 100644 --- a/drivers/cpufreq/davinci-cpufreq.c +++ b/drivers/cpufreq/davinci-cpufreq.c @@ -55,7 +55,7 @@ static int davinci_target(struct cpufreq_policy *policy, unsigned int idx) return ret; } - ret = clk_set_rate(armclk, idx); + ret = clk_set_rate(armclk, new_freq * 1000); if (ret) return ret; -- cgit v1.2.1 From 430d7dd448f48f54e79614ca237f44cd543f73da Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 19 Dec 2016 10:58:11 +0100 Subject: bus: da850-mstpri: fix my e-mail address I noticed my e-mail address is wrong in this one. This patch fixes it. Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- drivers/bus/da8xx-mstpri.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/bus/da8xx-mstpri.c b/drivers/bus/da8xx-mstpri.c index 063397f2c0db..9af9bcc68059 100644 --- a/drivers/bus/da8xx-mstpri.c +++ b/drivers/bus/da8xx-mstpri.c @@ -4,7 +4,7 @@ * Copyright (C) 2016 BayLibre SAS * * Author: - * Bartosz Golaszewski + * Bartosz Golaszewski * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as -- cgit v1.2.1 From d97556c8012015901a3ce77f46960078139cd79d Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 5 Jan 2017 11:07:18 -0800 Subject: ARM: dts: Fix omap3 off mode pull defines We need to also have OFFPULLUDENABLE bit set to use the off mode pull values. Otherwise the line is pulled down internally if no external pull exists. This is has some documentation at: http://processors.wiki.ti.com/index.php/Optimizing_OMAP35x_and_AM/DM37x_OFF_mode_PAD_configuration Note that the value is still glitchy during off mode transitions as documented in spz319f.pdf "Advisory 1.45". It's best to use external pulls instead of relying on the internal ones for off mode and even then anything pulled up will get driven down momentarily on off mode restore for GPIO banks other than bank1. Signed-off-by: Tony Lindgren --- include/dt-bindings/pinctrl/omap.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h index effadd05695b..fbd6f7202476 100644 --- a/include/dt-bindings/pinctrl/omap.h +++ b/include/dt-bindings/pinctrl/omap.h @@ -45,8 +45,8 @@ #define PIN_OFF_NONE 0 #define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL) #define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN) -#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP) -#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN) +#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP) +#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN) #define PIN_OFF_WAKEUPENABLE WAKEUP_EN /* -- cgit v1.2.1 From 6e613ebf4405fc09e2a8c16ed193b47f80a3cbed Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 5 Jan 2017 11:08:20 -0800 Subject: ARM: OMAP2+: Fix init for multiple quirks for the same SoC It's possible that there are multiple quirks that need to be initialized for the same SoC. Fix the issue by not returning on the first match. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pdata-quirks.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 477910a48448..58d87a78cb90 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -599,7 +599,6 @@ static void pdata_quirks_check(struct pdata_init *quirks) if (of_machine_is_compatible(quirks->compatible)) { if (quirks->fn) quirks->fn(); - break; } quirks++; } -- cgit v1.2.1 From 1aa09df0854efe16b7a80358a18f0a0bebafd246 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 5 Jan 2017 11:10:40 -0800 Subject: ARM: dts: Fix am335x and dm814x scm syscon to probe children Without these changes children of the scn syscon won't probe. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx.dtsi | 3 ++- arch/arm/boot/dts/dm814x.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 64c8aa9057a3..8e80d979db2d 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -144,10 +144,11 @@ }; scm_conf: scm_conf@0 { - compatible = "syscon"; + compatible = "syscon", "simple-bus"; reg = <0x0 0x800>; #address-cells = <1>; #size-cells = <1>; + ranges = <0 0 0x800>; scm_clocks: clocks { #address-cells = <1>; diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi index 1facc5f12cef..3459eb14b99e 100644 --- a/arch/arm/boot/dts/dm814x.dtsi +++ b/arch/arm/boot/dts/dm814x.dtsi @@ -331,10 +331,11 @@ ranges = <0 0x140000 0x20000>; scm_conf: scm_conf@0 { - compatible = "syscon"; + compatible = "syscon", "simple-bus"; reg = <0x0 0x800>; #address-cells = <1>; #size-cells = <1>; + ranges = <0 0 0x800>; scm_clocks: clocks { #address-cells = <1>; -- cgit v1.2.1 From f62280efe8934a1275fd148ef302d1afec8cd3df Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 5 Jan 2017 11:17:30 -0800 Subject: ARM: dts: Fix compatible for ti81xx uarts for 8250 When using 8250_omap driver, we need to specify the right compatible value for the UART to work on dm814x and dm816x. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dm814x.dtsi | 6 +++--- arch/arm/boot/dts/dm816x.dtsi | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi index 3459eb14b99e..da423c72bac0 100644 --- a/arch/arm/boot/dts/dm814x.dtsi +++ b/arch/arm/boot/dts/dm814x.dtsi @@ -251,7 +251,7 @@ }; uart1: uart@20000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart1"; reg = <0x20000 0x2000>; clock-frequency = <48000000>; @@ -261,7 +261,7 @@ }; uart2: uart@22000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart2"; reg = <0x22000 0x2000>; clock-frequency = <48000000>; @@ -271,7 +271,7 @@ }; uart3: uart@24000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart3"; reg = <0x24000 0x2000>; clock-frequency = <48000000>; diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi index 61dd2f6b02bc..621c211a436c 100644 --- a/arch/arm/boot/dts/dm816x.dtsi +++ b/arch/arm/boot/dts/dm816x.dtsi @@ -372,7 +372,7 @@ }; uart1: uart@48020000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart1"; reg = <0x48020000 0x2000>; clock-frequency = <48000000>; @@ -382,7 +382,7 @@ }; uart2: uart@48022000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart2"; reg = <0x48022000 0x2000>; clock-frequency = <48000000>; @@ -392,7 +392,7 @@ }; uart3: uart@48024000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart3"; reg = <0x48024000 0x2000>; clock-frequency = <48000000>; -- cgit v1.2.1 From bd5e444bf1dcea50b89b3555e85e895843a82f32 Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Wed, 18 Jan 2017 17:18:07 +0530 Subject: ARM: OMAP5: Add HWMOD_SWSUP_SIDLE_ACT flag for UART According to the commit ca43ea345de9 ("ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in active"), UART IP needs the sidle mode to be controlled in SW only while they are active. Once inactive, the IP needs to be put back in HW control so they are also wakeup capable. The flag HWMOD_SWSUP_SIDLE takes care of this. So add this flag to all instances of UART. With this change, 8250 UART now gives out proper RX Timeout interrupts and is usable as console. Signed-off-by: Vignesh R Reviewed-by: Lokesh Vutla Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 8cdfd9b7ab4f..a2d763a4cc57 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -1748,6 +1748,7 @@ static struct omap_hwmod omap54xx_uart1_hwmod = { .name = "uart1", .class = &omap54xx_uart_hwmod_class, .clkdm_name = "l4per_clkdm", + .flags = HWMOD_SWSUP_SIDLE_ACT, .main_clk = "func_48m_fclk", .prcm = { .omap4 = { @@ -1763,6 +1764,7 @@ static struct omap_hwmod omap54xx_uart2_hwmod = { .name = "uart2", .class = &omap54xx_uart_hwmod_class, .clkdm_name = "l4per_clkdm", + .flags = HWMOD_SWSUP_SIDLE_ACT, .main_clk = "func_48m_fclk", .prcm = { .omap4 = { @@ -1778,7 +1780,7 @@ static struct omap_hwmod omap54xx_uart3_hwmod = { .name = "uart3", .class = &omap54xx_uart_hwmod_class, .clkdm_name = "l4per_clkdm", - .flags = DEBUG_OMAP4UART3_FLAGS, + .flags = DEBUG_OMAP4UART3_FLAGS | HWMOD_SWSUP_SIDLE_ACT, .main_clk = "func_48m_fclk", .prcm = { .omap4 = { @@ -1794,7 +1796,7 @@ static struct omap_hwmod omap54xx_uart4_hwmod = { .name = "uart4", .class = &omap54xx_uart_hwmod_class, .clkdm_name = "l4per_clkdm", - .flags = DEBUG_OMAP4UART4_FLAGS, + .flags = DEBUG_OMAP4UART4_FLAGS | HWMOD_SWSUP_SIDLE_ACT, .main_clk = "func_48m_fclk", .prcm = { .omap4 = { @@ -1810,6 +1812,7 @@ static struct omap_hwmod omap54xx_uart5_hwmod = { .name = "uart5", .class = &omap54xx_uart_hwmod_class, .clkdm_name = "l4per_clkdm", + .flags = HWMOD_SWSUP_SIDLE_ACT, .main_clk = "func_48m_fclk", .prcm = { .omap4 = { @@ -1825,6 +1828,7 @@ static struct omap_hwmod omap54xx_uart6_hwmod = { .name = "uart6", .class = &omap54xx_uart_hwmod_class, .clkdm_name = "l4per_clkdm", + .flags = HWMOD_SWSUP_SIDLE_ACT, .main_clk = "func_48m_fclk", .prcm = { .omap4 = { -- cgit v1.2.1 From 631af44c10f9430163296626c6134db16a4f51fb Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Fri, 20 Jan 2017 10:44:01 -0600 Subject: ARM: OMAP3: Fix SoC detection of OMAP36/37 Family The OMAP36/37 families are similar, but there are a few features sections that can help identify some of them. Let's add checks for 3630/3730, OMAP3621, DM3725, OMAP3615/DM3715, OMAP3611, and AM3703 all based on features similar to what was done for the OMAP34xx/35xx series The checkpatch flags some warnings for braces, but I kept the coding style to match the adjacent code for consistency. I don't have an OMAP36xx to test, but this was tested on both a DM3730 and AM3703. Signed-off-by: Adam Ford Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/id.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index cc6d9fa60924..e2274a162b74 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -223,7 +223,15 @@ static void __init omap3_cpuinfo(void) * and CPU class bits. */ if (soc_is_omap3630()) { - cpu_name = "OMAP3630"; + if (omap3_has_iva() && omap3_has_sgx()) { + cpu_name = (omap3_has_isp()) ? "OMAP3630/DM3730" : "OMAP3621"; + } else if (omap3_has_iva()) { + cpu_name = "DM3725"; + } else if (omap3_has_sgx()) { + cpu_name = "OMAP3615/AM3715"; + } else { + cpu_name = (omap3_has_isp()) ? "AM3703" : "OMAP3611"; + } } else if (soc_is_am35xx()) { cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; } else if (soc_is_ti816x()) { -- cgit v1.2.1 From 92f3e6ebf6e43fdd5e2f044fc26d973f341b7ef0 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Mon, 30 Jan 2017 09:52:01 +0100 Subject: firmware: arm_scpi: Add hardware dependencies With a name like that, I assume that the ARM SCPI protocol is only useful on the ARM architectures. Signed-off-by: Jean Delvare Acked-by: Sudeep Holla Cc: Jon Medhurst (Tixy) Signed-off-by: Olof Johansson --- drivers/firmware/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 1867f0d1389b..6e4ed5a9c6fd 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -21,6 +21,7 @@ config ARM_PSCI_CHECKER config ARM_SCPI_PROTOCOL tristate "ARM System Control and Power Interface (SCPI) Message Protocol" + depends on ARM || ARM64 || COMPILE_TEST depends on MAILBOX help System Control and Power Interface (SCPI) Message Protocol is -- cgit v1.2.1