From 88fd85892a55730878fc081eee62553eb18f1b9c Mon Sep 17 00:00:00 2001 From: David Daney Date: Wed, 4 Apr 2012 15:34:41 -0700 Subject: MIPS: OCTEON: Add support for cn68XX interrupt controller. The cn68XX has a new interrupt controller named CIU2, add support for this, and use it if cn68XX detected at runtime. Signed-off-by: David Daney --- arch/mips/include/asm/octeon/octeon.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/mips/include/asm/octeon/octeon.h') diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 1e2486e23573..e937e86e8538 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -254,4 +254,7 @@ extern uint64_t octeon_bootloader_entry_addr; extern void (*octeon_irq_setup_secondary)(void); +typedef void (*octeon_irq_ip4_handler_t)(void); +void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t); + #endif /* __ASM_OCTEON_OCTEON_H */ -- cgit v1.2.1