From b46b0b54dea200973ce380369beb192b136d8934 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Mon, 23 Apr 2012 17:41:36 +0530 Subject: ARM: dt: tegra: enable als and proximity sensor Add the device info for ALS and proximity sensor for tegra boards cardhu, ventana and seaboard. Signed-off-by: Laxman Dewangan [swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit description] Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-cardhu.dts | 8 ++++++++ arch/arm/boot/dts/tegra-seaboard.dts | 8 ++++++++ arch/arm/boot/dts/tegra-ventana.dts | 8 ++++++++ 3 files changed, 24 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index 0a9f34a2c3aa..8c81b4471261 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -84,6 +84,14 @@ i2c@7000c500 { clock-frequency = <100000>; + + /* ALS and Proximity sensor */ + isl29028@44 { + compatible = "isil,isl29028"; + reg = <0x44>; + interrupt-parent = <&gpio>; + interrupts = <88 0x04>; /*gpio PL0 */ + }; }; i2c@7000c700 { diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index ec33116f5df9..0f30fc9f2005 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -270,6 +270,14 @@ micdet-delay = <100>; gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; }; + + /* ALS and proximity sensor */ + isl29018@44 { + compatible = "isil,isl29018"; + reg = <0x44>; + interrupt-parent = <&gpio>; + interrupts = < 202 0x04 >; /* GPIO PZ2 */ + }; }; i2c@7000c400 { diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts index 71eb2e50a668..4ef84f43d788 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra-ventana.dts @@ -256,6 +256,14 @@ micdet-delay = <100>; gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; }; + + /* ALS and proximity sensor */ + isl29018@44 { + compatible = "isil,isl29018"; + reg = <0x44>; + interrupt-parent = <&gpio>; + interrupts = <202 0x04>; /*gpio PZ2 */ + }; }; i2c@7000c400 { -- cgit v1.2.1 From 22bd1f7ef40a1c0f2ba796ba7cd80013adcb835d Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 26 Apr 2012 11:19:03 -0600 Subject: ARM: dt: tegra seaboard: fix I2C2 SCL rate This I2C bus is used for EDID/DDC reads and other "slow" I2C devices. This requires a 100KHz SCL (clock) rate. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-seaboard.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index 0f30fc9f2005..11aea885c1bb 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -281,7 +281,7 @@ }; i2c@7000c400 { - clock-frequency = <400000>; + clock-frequency = <100000>; }; i2c@7000c500 { -- cgit v1.2.1 From 802a849948789b6059899d79a4c8e71db19a6029 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 26 Apr 2012 11:21:54 -0600 Subject: ARM: dt: tegra seaboard: configure I2C2 pinmux The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard actually uses this as an I2C bus mux, and devices are connected to both pingroups. This change statically assigns the I2C2 controller to pingroup PTA, so that on-board devices can be accessed. The DDC pingroup is used for EDID/DDC accesses which are not yet required, given the absence of any Tegra graphics support. I2C muxing will be supported later. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-seaboard.dts | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index 11aea885c1bb..60c94295e594 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -100,7 +100,7 @@ }; hdint { nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", - "lsck", "lsda", "pta"; + "lsck", "lsda"; nvidia,function = "hdmi"; }; i2cp { @@ -134,6 +134,10 @@ nvidia,pins = "pmc"; nvidia,function = "pwr_on"; }; + pta { + nvidia,pins = "pta"; + nvidia,function = "i2c2"; + }; rm { nvidia,pins = "rm"; nvidia,function = "i2c1"; -- cgit v1.2.1 From 45dbe9dd2cea5be9fe6997442aa703800ea145c8 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Thu, 22 Dec 2011 16:33:13 +0000 Subject: ARM: dt: tegra seaboard: add i2c devices Add the known i2c devices on seaboard to the i2c table. Also rename the temperature sensor device node, and mark it as a nct1008 instead of an adt7461 (which it is -- the chips are compatible though). Signed-off-by: Olof Johansson [swarren: Removed isl29018 from patch; it's already there now. Fixed interrupts properties now that Tegra GPIO is an interrupt controller. Moved smart-battery to the correct I2C bus.] Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-seaboard.dts | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index 60c94295e594..4e19dd174309 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -282,10 +282,24 @@ interrupt-parent = <&gpio>; interrupts = < 202 0x04 >; /* GPIO PZ2 */ }; + + gyrometer@68 { + compatible = "invn,mpu3050"; + reg = <0x68>; + interrupt-parent = <&gpio>; + interrupts = <204 0x04>; /* gpio PZ4 */ + }; }; i2c@7000c400 { clock-frequency = <100000>; + + smart-battery@b { + compatible = "ti,bq20z75", "smart-battery-1.1"; + reg = <0xb>; + ti,i2c-retry-count = <2>; + ti,poll-retry-count = <10>; + }; }; i2c@7000c500 { @@ -295,10 +309,17 @@ i2c@7000d000 { clock-frequency = <400000>; - adt7461@4c { - compatible = "adt7461"; + temperature-sensor@4c { + compatible = "nct1008"; reg = <0x4c>; }; + + magnetometer@c { + compatible = "ak8975"; + reg = <0xc>; + interrupt-parent = <&gpio>; + interrupts = <109 0x04>; /* gpio PN5 */ + }; }; i2s@70002a00 { -- cgit v1.2.1 From 081cc0a57c2f976359d4dcefec480bdd2f848513 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 27 Apr 2012 09:22:44 -0600 Subject: ARM: dt: tegra trimslice: add RTC I2C device According to the device's datasheet, it can support an interrupt too. However, the existing board file doesn't specify an interrupt, and I don't have the schematics, so I can't add an interrupts property. The current Linux driver doesn't support anyway. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-trimslice.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index 98efd5b0d7f9..3fe91a70bc2f 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -250,6 +250,11 @@ i2c@7000c500 { clock-frequency = <400000>; + + rtc@56 { + compatible = "emmicro,em3027"; + reg = <0x56>; + }; }; i2c@7000d000 { -- cgit v1.2.1 From c7bd632e88a84538eb966a1740bdc344a003b81f Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 27 Apr 2012 13:41:31 -0600 Subject: ARM: dt: tegra trimslice: enable SDHCI1 controller This is the micro-SD card slot. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-trimslice.dts | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index 3fe91a70bc2f..23e6472c5700 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -293,10 +293,6 @@ status = "disable"; }; - sdhci@c8000000 { - status = "disable"; - }; - sdhci@c8000200 { status = "disable"; }; -- cgit v1.2.1 From 22bfe102c0c39f0bac24950b875e7bfdeb329dd9 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 27 Apr 2012 13:24:03 -0600 Subject: ARM: dt: tegra trimslice: add support for audio * Add node for the audio codec * Enable Tegra's I2S1 controller and DAS * Add node for top-level sound complex Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-trimslice.dts | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index 23e6472c5700..6f8e26dab919 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -251,6 +251,11 @@ i2c@7000c500 { clock-frequency = <400000>; + codec: codec@1a { + compatible = "ti,tlv320aic23"; + reg = <0x1a>; + }; + rtc@56 { compatible = "emmicro,em3027"; reg = <0x56>; @@ -261,16 +266,14 @@ status = "disable"; }; - i2s@70002800 { - status = "disable"; - }; - i2s@70002a00 { status = "disable"; }; - das@70000c00 { - status = "disable"; + sound { + compatible = "nvidia,tegra-audio-trimslice"; + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&codec>; }; serial@70006000 { -- cgit v1.2.1 From a1e327e683ef4adbb74fbe56b5ca29a89f53088e Mon Sep 17 00:00:00 2001 From: "Ying-Chun Liu (PaulLiu)" Date: Fri, 30 Mar 2012 21:46:53 +0800 Subject: ARM: dts: imx6q: add anatop regulators Add anatop regulators to imx6q.dtsi for all imx6q platforms. Signed-off-by: Ying-Chun Liu (PaulLiu) Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 84 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 4905f51a106f..68f2e429416a 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -346,6 +346,90 @@ compatible = "fsl,imx6q-anatop"; reg = <0x020c8000 0x1000>; interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; + + regulator-1p1@110 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd1p1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1375000>; + regulator-always-on; + anatop-reg-offset = <0x110>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <4>; + anatop-min-voltage = <800000>; + anatop-max-voltage = <1375000>; + }; + + regulator-3p0@120 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3150000>; + regulator-always-on; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2625000>; + anatop-max-voltage = <3400000>; + }; + + regulator-2p5@130 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd2p5"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2750000>; + regulator-always-on; + anatop-reg-offset = <0x130>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2000000>; + anatop-max-voltage = <2750000>; + }; + + regulator-vddcore@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + regulator-vddpu@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <9>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + regulator-vddsoc@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <18>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; }; usbphy@020c9000 { /* USBPHY1 */ -- cgit v1.2.1 From 4592a96591f1659d910b46101d3f425263cfb0df Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 1 Apr 2012 13:54:13 -0300 Subject: ARM: dts: imx: Remove bootargs field Remove bootargs field as this information is retrieved from the bootloader. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx51-babbage.dts | 4 ---- arch/arm/boot/dts/imx53-ard.dts | 4 ---- arch/arm/boot/dts/imx53-evk.dts | 4 ---- arch/arm/boot/dts/imx53-qsb.dts | 4 ---- arch/arm/boot/dts/imx53-smd.dts | 4 ---- arch/arm/boot/dts/imx6q-arm2.dts | 4 ---- 6 files changed, 24 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index 9949e6060dee..fd729d459d9a 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -17,10 +17,6 @@ model = "Freescale i.MX51 Babbage Board"; compatible = "fsl,imx51-babbage", "fsl,imx51"; - chosen { - bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; - }; - memory { reg = <0x90000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts index 2dccce46ed81..4c61b7f98578 100644 --- a/arch/arm/boot/dts/imx53-ard.dts +++ b/arch/arm/boot/dts/imx53-ard.dts @@ -17,10 +17,6 @@ model = "Freescale i.MX53 Automotive Reference Design Board"; compatible = "fsl,imx53-ard", "fsl,imx53"; - chosen { - bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; - }; - memory { reg = <0x70000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts index 5bac4aa4800b..8ce5fe14a226 100644 --- a/arch/arm/boot/dts/imx53-evk.dts +++ b/arch/arm/boot/dts/imx53-evk.dts @@ -17,10 +17,6 @@ model = "Freescale i.MX53 Evaluation Kit"; compatible = "fsl,imx53-evk", "fsl,imx53"; - chosen { - bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; - }; - memory { reg = <0x70000000 0x80000000>; }; diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index 5c57c8672c36..de34a1740581 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -17,10 +17,6 @@ model = "Freescale i.MX53 Quick Start Board"; compatible = "fsl,imx53-qsb", "fsl,imx53"; - chosen { - bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; - }; - memory { reg = <0x70000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts index c7ee86c2dfb5..a984fa508a0c 100644 --- a/arch/arm/boot/dts/imx53-smd.dts +++ b/arch/arm/boot/dts/imx53-smd.dts @@ -17,10 +17,6 @@ model = "Freescale i.MX53 Smart Mobile Reference Design Board"; compatible = "fsl,imx53-smd", "fsl,imx53"; - chosen { - bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; - }; - memory { reg = <0x70000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index ce1c8238c897..1b2b64fd1205 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -17,10 +17,6 @@ model = "Freescale i.MX6 Quad Armadillo2 Board"; compatible = "fsl,imx6q-arm2", "fsl,imx6q"; - chosen { - bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; - }; - memory { reg = <0x10000000 0x80000000>; }; -- cgit v1.2.1 From 0c456cfa7ef3f02cb077a2883bd9f5ad1cde3761 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 2 Apr 2012 14:39:26 +0800 Subject: ARM: imx: rename uart and fec device tree nodes It has been pointed out by device tree maintainer for several times that the generic names 'serial' and 'ethernet' should be used for those devices per ePAPR. Renames imx uart and fec device tree nodes to stop them being bad examples. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer --- arch/arm/boot/dts/imx27-phytec-phycore.dts | 8 ++++---- arch/arm/boot/dts/imx27.dtsi | 14 +++++++------- arch/arm/boot/dts/imx51-babbage.dts | 8 ++++---- arch/arm/boot/dts/imx51.dtsi | 8 ++++---- arch/arm/boot/dts/imx53-ard.dts | 2 +- arch/arm/boot/dts/imx53-evk.dts | 4 ++-- arch/arm/boot/dts/imx53-qsb.dts | 4 ++-- arch/arm/boot/dts/imx53-smd.dts | 8 ++++---- arch/arm/boot/dts/imx53.dtsi | 12 ++++++------ arch/arm/boot/dts/imx6q-arm2.dts | 4 ++-- arch/arm/boot/dts/imx6q-sabrelite.dts | 4 ++-- arch/arm/boot/dts/imx6q.dtsi | 12 ++++++------ arch/arm/mach-imx/clk-imx6q.c | 22 +++++++++++----------- 13 files changed, 55 insertions(+), 55 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts index a51a08fc2af9..2b0ff60247a4 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts @@ -27,22 +27,22 @@ status = "okay"; }; - uart@1000a000 { + serial@1000a000 { fsl,uart-has-rtscts; status = "okay"; }; - uart@1000b000 { + serial@1000b000 { fsl,uart-has-rtscts; status = "okay"; }; - uart@1000c000 { + serial@1000c000 { fsl,uart-has-rtscts; status = "okay"; }; - fec@1002b000 { + ethernet@1002b000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index bc5e7d5ddd54..2b1a166d41f9 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -59,28 +59,28 @@ status = "disabled"; }; - uart1: uart@1000a000 { + uart1: serial@1000a000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000a000 0x1000>; interrupts = <20>; status = "disabled"; }; - uart2: uart@1000b000 { + uart2: serial@1000b000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000b000 0x1000>; interrupts = <19>; status = "disabled"; }; - uart3: uart@1000c000 { + uart3: serial@1000c000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000c000 0x1000>; interrupts = <18>; status = "disabled"; }; - uart4: uart@1000d000 { + uart4: serial@1000d000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000d000 0x1000>; interrupts = <17>; @@ -183,14 +183,14 @@ status = "disabled"; }; - uart5: uart@1001b000 { + uart5: serial@1001b000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1001b000 0x1000>; interrupts = <49>; status = "disabled"; }; - uart6: uart@1001c000 { + uart6: serial@1001c000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1001c000 0x1000>; interrupts = <48>; @@ -206,7 +206,7 @@ status = "disabled"; }; - fec: fec@1002b000 { + fec: ethernet@1002b000 { compatible = "fsl,imx27-fec"; reg = <0x1002b000 0x4000>; interrupts = <50>; diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index fd729d459d9a..d42a404c0cef 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -36,7 +36,7 @@ status = "okay"; }; - uart3: uart@7000c000 { + uart3: serial@7000c000 { fsl,uart-has-rtscts; status = "okay"; }; @@ -173,12 +173,12 @@ reg = <0x73fa8000 0x4000>; }; - uart1: uart@73fbc000 { + uart1: serial@73fbc000 { fsl,uart-has-rtscts; status = "okay"; }; - uart2: uart@73fc0000 { + uart2: serial@73fc0000 { status = "okay"; }; }; @@ -197,7 +197,7 @@ }; }; - fec@83fec000 { + ethernet@83fec000 { phy-mode = "mii"; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 6663986fe1c8..66f0ebd84174 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -86,7 +86,7 @@ status = "disabled"; }; - uart3: uart@7000c000 { + uart3: serial@7000c000 { compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x7000c000 0x4000>; interrupts = <33>; @@ -171,14 +171,14 @@ status = "disabled"; }; - uart1: uart@73fbc000 { + uart1: serial@73fbc000 { compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x73fbc000 0x4000>; interrupts = <31>; status = "disabled"; }; - uart2: uart@73fc0000 { + uart2: serial@73fc0000 { compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x73fc0000 0x4000>; interrupts = <32>; @@ -235,7 +235,7 @@ status = "disabled"; }; - fec@83fec000 { + ethernet@83fec000 { compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; interrupts = <87>; diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts index 4c61b7f98578..5b8eafcdbeec 100644 --- a/arch/arm/boot/dts/imx53-ard.dts +++ b/arch/arm/boot/dts/imx53-ard.dts @@ -40,7 +40,7 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts index 8ce5fe14a226..9c798034675e 100644 --- a/arch/arm/boot/dts/imx53-evk.dts +++ b/arch/arm/boot/dts/imx53-evk.dts @@ -71,7 +71,7 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; }; @@ -95,7 +95,7 @@ }; }; - fec@63fec000 { + ethernet@63fec000 { phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index de34a1740581..b08b5874da6e 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -45,7 +45,7 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; }; @@ -78,7 +78,7 @@ }; }; - fec@63fec000 { + ethernet@63fec000 { phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts index a984fa508a0c..a3529afc4d20 100644 --- a/arch/arm/boot/dts/imx53-smd.dts +++ b/arch/arm/boot/dts/imx53-smd.dts @@ -35,7 +35,7 @@ status = "okay"; }; - uart3: uart@5000c000 { + uart3: serial@5000c000 { fsl,uart-has-rtscts; status = "okay"; }; @@ -86,11 +86,11 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; - uart2: uart@53fc0000 { + uart2: serial@53fc0000 { status = "okay"; }; }; @@ -138,7 +138,7 @@ }; }; - fec@63fec000 { + ethernet@63fec000 { phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 5dd91b942c91..5188615b5170 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -88,7 +88,7 @@ status = "disabled"; }; - uart3: uart@5000c000 { + uart3: serial@5000c000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x5000c000 0x4000>; interrupts = <33>; @@ -173,14 +173,14 @@ status = "disabled"; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fbc000 0x4000>; interrupts = <31>; status = "disabled"; }; - uart2: uart@53fc0000 { + uart2: serial@53fc0000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fc0000 0x4000>; interrupts = <32>; @@ -226,7 +226,7 @@ status = "disabled"; }; - uart4: uart@53ff0000 { + uart4: serial@53ff0000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53ff0000 0x4000>; interrupts = <13>; @@ -241,7 +241,7 @@ reg = <0x60000000 0x10000000>; ranges; - uart5: uart@63f90000 { + uart5: serial@63f90000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x63f90000 0x4000>; interrupts = <86>; @@ -290,7 +290,7 @@ status = "disabled"; }; - fec@63fec000 { + ethernet@63fec000 { compatible = "fsl,imx53-fec", "fsl,imx25-fec"; reg = <0x63fec000 0x4000>; interrupts = <87>; diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index 1b2b64fd1205..9c468d2338f3 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -23,7 +23,7 @@ soc { aips-bus@02100000 { /* AIPS2 */ - enet@02188000 { + ethernet@02188000 { phy-mode = "rgmii"; local-mac-address = [00 04 9F 01 1B 61]; status = "okay"; @@ -42,7 +42,7 @@ status = "okay"; }; - uart4: uart@021f0000 { + uart4: serial@021f0000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 4663a4e5a285..a93c593fed8f 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -23,7 +23,7 @@ soc { aips-bus@02100000 { /* AIPS2 */ - enet@02188000 { + ethernet@02188000 { phy-mode = "rgmii"; phy-reset-gpios = <&gpio3 23 0>; status = "okay"; @@ -43,7 +43,7 @@ status = "okay"; }; - uart2: uart@021e8000 { + uart2: serial@021e8000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 68f2e429416a..56c5304e4cbc 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -165,7 +165,7 @@ status = "disabled"; }; - uart1: uart@02020000 { + uart1: serial@02020000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x02020000 0x4000>; interrupts = <0 26 0x04>; @@ -506,7 +506,7 @@ reg = <0x0217c000 0x4000>; }; - enet@02188000 { + ethernet@02188000 { compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; @@ -627,28 +627,28 @@ interrupts = <0 18 0x04>; }; - uart2: uart@021e8000 { + uart2: serial@021e8000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021e8000 0x4000>; interrupts = <0 27 0x04>; status = "disabled"; }; - uart3: uart@021ec000 { + uart3: serial@021ec000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021ec000 0x4000>; interrupts = <0 28 0x04>; status = "disabled"; }; - uart4: uart@021f0000 { + uart4: serial@021f0000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f0000 0x4000>; interrupts = <0 29 0x04>; status = "disabled"; }; - uart5: uart@021f4000 { + uart5: serial@021f4000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f4000 0x4000>; interrupts = <0 30 0x04>; diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index f40a35da2e5c..b37ad4bc203a 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -392,17 +392,17 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); clk_register_clkdev(clk[twd], NULL, "smp_twd"); clk_register_clkdev(clk[usboh3], NULL, "usboh3"); - clk_register_clkdev(clk[uart_serial], "per", "2020000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21e8000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21ec000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21f0000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21f4000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.uart"); - clk_register_clkdev(clk[enet], NULL, "2188000.enet"); + clk_register_clkdev(clk[uart_serial], "per", "2020000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21ec000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21f0000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21f4000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.serial"); + clk_register_clkdev(clk[enet], NULL, "2188000.ethernet"); clk_register_clkdev(clk[usdhc1], NULL, "2190000.usdhc"); clk_register_clkdev(clk[usdhc2], NULL, "2194000.usdhc"); clk_register_clkdev(clk[usdhc3], NULL, "2198000.usdhc"); -- cgit v1.2.1 From 4e692101aba53ba068142a2c76e3b278682be2e3 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 11 Apr 2012 16:07:35 -0300 Subject: ARM: imx6q-arm2: Remove hardcoded mac address Do not hardcode the local mac address. Let bootloader retrieve it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-arm2.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index 9c468d2338f3..3fabe921f7b4 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -25,7 +25,6 @@ aips-bus@02100000 { /* AIPS2 */ ethernet@02188000 { phy-mode = "rgmii"; - local-mac-address = [00 04 9F 01 1B 61]; status = "okay"; }; -- cgit v1.2.1 From 691d26408734e7a41ebdadd19c10f6c0949ecd4a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 21 Apr 2012 14:07:08 -0300 Subject: ARM: dts: Add basic support for imx6q-sabresd Add basic support for imx6q-sabresd. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabresd.dts | 53 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/Makefile.boot | 3 ++- arch/arm/mach-imx/mach-imx6q.c | 1 + 3 files changed, 56 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/imx6q-sabresd.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts new file mode 100644 index 000000000000..07509a181178 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-sabresd.dts @@ -0,0 +1,53 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx6q.dtsi" + +/ { + model = "Freescale i.MX6Q SABRE Smart Device Board"; + compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x40000000>; + }; + + soc { + + aips-bus@02000000 { /* AIPS1 */ + spba-bus@02000000 { + uart1: serial@02020000 { + status = "okay"; + }; + }; + }; + + aips-bus@02100000 { /* AIPS2 */ + ethernet@02188000 { + phy-mode = "rgmii"; + status = "okay"; + }; + + usdhc@02194000 { /* uSDHC2 */ + cd-gpios = <&gpio2 2 0>; + wp-gpios = <&gpio2 3 0>; + status = "okay"; + }; + + usdhc@02198000 { /* uSDHC3 */ + cd-gpios = <&gpio2 0 0>; + wp-gpios = <&gpio2 1 0>; + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot index 3851d8a27875..05541cf4a878 100644 --- a/arch/arm/mach-imx/Makefile.boot +++ b/arch/arm/mach-imx/Makefile.boot @@ -42,4 +42,5 @@ dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb dtb-$(CONFIG_MACH_IMX53_DT) += imx53-ard.dtb imx53-evk.dtb \ imx53-qsb.dtb imx53-smd.dtb dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \ - imx6q-sabrelite.dtb + imx6q-sabrelite.dtb \ + imx6q-sabresd.dtb \ diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index da6c1d9af768..512c18da6b9c 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -132,6 +132,7 @@ static struct sys_timer imx6q_timer = { static const char *imx6q_dt_compat[] __initdata = { "fsl,imx6q-arm2", "fsl,imx6q-sabrelite", + "fsl,imx6q-sabresd", "fsl,imx6q", NULL, }; -- cgit v1.2.1 From f07439c43252c3c2e669a5ee3762f4559179828d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 24 Apr 2012 20:35:36 -0300 Subject: ARM: dts: imx6q-sabrelite: Add SPI NOR support mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1. Add support for it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabrelite.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index a93c593fed8f..1ca9b3ecb882 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -22,6 +22,23 @@ }; soc { + aips-bus@02000000 { /* AIPS1 */ + spba-bus@02000000 { + ecspi@02008000 { /* eCSPI1 */ + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio3 19 0>; + status = "okay"; + + flash: m25p80@0 { + compatible = "sst,sst25vf016b"; + spi-max-frequency = <20000000>; + reg = <0>; + }; + }; + }; + + }; + aips-bus@02100000 { /* AIPS2 */ ethernet@02188000 { phy-mode = "rgmii"; -- cgit v1.2.1 From 071dea508f72e879041bd68b56aad41befb2dd45 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Fri, 27 Apr 2012 15:02:59 +0800 Subject: ARM: imx6q: move imx6q_sabrelite specific code to a dedicated function It'll be easier to add other board specific code. Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-imx6q.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 512c18da6b9c..706e45c2a839 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -75,11 +75,16 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev) return 0; } +static void __init imx6q_sabrelite_init(void) +{ + phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, + ksz9021rn_phy_fixup); +} + static void __init imx6q_init_machine(void) { if (of_machine_is_compatible("fsl,imx6q-sabrelite")) - phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, - ksz9021rn_phy_fixup); + imx6q_sabrelite_init(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -- cgit v1.2.1 From ef44180680aafb29f50654f3325cf7791fa5433d Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 8 May 2012 21:39:33 +0800 Subject: ARM: imx6q: register phy fixup only when CONFIG_PHYLIB is enabled It fixes the following compile error with network disabled in imx_v6_v7_defconfig. arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup': imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write' arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine': imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid' make: *** [.tmp_vmlinux1] Error 1 Reported-by: Artem Bityutskiy Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-imx6q.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 706e45c2a839..e0cc3dac3bec 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -63,21 +63,24 @@ soft: /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ static int ksz9021rn_phy_fixup(struct phy_device *phydev) { - /* min rx data delay */ - phy_write(phydev, 0x0b, 0x8105); - phy_write(phydev, 0x0c, 0x0000); + if (IS_ENABLED(CONFIG_PHYLIB)) { + /* min rx data delay */ + phy_write(phydev, 0x0b, 0x8105); + phy_write(phydev, 0x0c, 0x0000); - /* max rx/tx clock delay, min rx/tx control delay */ - phy_write(phydev, 0x0b, 0x8104); - phy_write(phydev, 0x0c, 0xf0f0); - phy_write(phydev, 0x0b, 0x104); + /* max rx/tx clock delay, min rx/tx control delay */ + phy_write(phydev, 0x0b, 0x8104); + phy_write(phydev, 0x0c, 0xf0f0); + phy_write(phydev, 0x0b, 0x104); + } return 0; } static void __init imx6q_sabrelite_init(void) { - phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, + if (IS_ENABLED(CONFIG_PHYLIB)) + phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); } -- cgit v1.2.1 From 785d7fab3eb0c39bcd8086055e7bd144c48158e4 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Fri, 27 Apr 2012 10:15:45 +0200 Subject: ARM: imx6: Add UART2 for low-level debug To be able to enable early debugging on boards using the UART2 for the console, add the option for early debugging on UART2. Signed-off-by: Dirk Behme Signed-off-by: Shawn Guo --- arch/arm/Kconfig.debug | 8 ++++++++ arch/arm/mach-imx/lluart.c | 6 ++++++ arch/arm/plat-mxc/include/mach/debug-macro.S | 2 ++ arch/arm/plat-mxc/include/mach/mx6q.h | 2 ++ 4 files changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 85348a09d655..0f876c20bb1e 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -180,6 +180,14 @@ choice Say Y here if you want kernel low-level debugging support on i.MX50 or i.MX53. + config DEBUG_IMX6Q_UART2 + bool "i.MX6Q Debug UART2" + depends on SOC_IMX6Q + help + Say Y here if you want kernel low-level debugging support + on i.MX6Q UART2. This is correct for e.g. the SabreLite + board. + config DEBUG_IMX6Q_UART4 bool "i.MX6Q Debug UART4" depends on SOC_IMX6Q diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c index 0213f8dcee81..c40a34c00489 100644 --- a/arch/arm/mach-imx/lluart.c +++ b/arch/arm/mach-imx/lluart.c @@ -17,6 +17,12 @@ #include static struct map_desc imx_lluart_desc = { +#ifdef CONFIG_DEBUG_IMX6Q_UART2 + .virtual = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR), + .pfn = __phys_to_pfn(MX6Q_UART2_BASE_ADDR), + .length = MX6Q_UART2_SIZE, + .type = MT_DEVICE, +#endif #ifdef CONFIG_DEBUG_IMX6Q_UART4 .virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR), .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 8ddda365f1a0..761e45f9456f 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -24,6 +24,8 @@ #define UART_PADDR MX51_UART1_BASE_ADDR #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) #define UART_PADDR MX53_UART1_BASE_ADDR +#elif defined (CONFIG_DEBUG_IMX6Q_UART2) +#define UART_PADDR MX6Q_UART2_BASE_ADDR #elif defined (CONFIG_DEBUG_IMX6Q_UART4) #define UART_PADDR MX6Q_UART4_BASE_ADDR #endif diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h index 254a561a2799..f7e7dbac8f4b 100644 --- a/arch/arm/plat-mxc/include/mach/mx6q.h +++ b/arch/arm/plat-mxc/include/mach/mx6q.h @@ -27,6 +27,8 @@ #define MX6Q_CCM_SIZE 0x4000 #define MX6Q_ANATOP_BASE_ADDR 0x020c8000 #define MX6Q_ANATOP_SIZE 0x1000 +#define MX6Q_UART2_BASE_ADDR 0x021e8000 +#define MX6Q_UART2_SIZE 0x4000 #define MX6Q_UART4_BASE_ADDR 0x021f0000 #define MX6Q_UART4_SIZE 0x4000 -- cgit v1.2.1 From 551fd208f204780bac1ca5bce1748ba7a6f7ee6e Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Fri, 11 May 2012 14:58:00 +0800 Subject: ARM: dts: imx6q-arm2: add pinctrl state for usdhc Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-arm2.dts | 4 ++++ arch/arm/boot/dts/imx6q.dtsi | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index 3fabe921f7b4..97893f5cab92 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -32,12 +32,16 @@ cd-gpios = <&gpio6 11 0>; wp-gpios = <&gpio6 14 0>; vmmc-supply = <®_3p3v>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3_1>; status = "okay"; }; usdhc@0219c000 { /* uSDHC4 */ fsl,card-wired; vmmc-supply = <®_3p3v>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4_1>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 56c5304e4cbc..72ccd1d21cd9 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -470,7 +470,39 @@ }; iomuxc@020e0000 { + compatible = "fsl,imx6q-iomuxc"; reg = <0x020e0000 0x4000>; + + /* shared pinctrl settings */ + usdhc3 { + pinctrl_usdhc3_1: usdhc3grp-1 { + fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */ + 1281 0x10059 /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */ + 1289 0x17059 /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */ + 1297 0x17059 /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */ + 1305 0x17059 /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */ + 1312 0x17059 /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */ + 1265 0x17059 /* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */ + 1257 0x17059 /* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */ + 1249 0x17059 /* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */ + 1241 0x17059>; /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */ + }; + }; + + usdhc4 { + pinctrl_usdhc4_1: usdhc4grp-1 { + fsl,pins = <1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */ + 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */ + 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */ + 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */ + 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */ + 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */ + 1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */ + 1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */ + 1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */ + 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */ + }; + }; }; dcic@020e4000 { /* DCIC1 */ -- cgit v1.2.1 From b1a5da8eb37bd44d66e93a6133e33616b5de3d24 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 2 May 2012 10:29:10 +0800 Subject: ARM: dts: imx6q-sabrelite: add ssi device Signed-off-by: Richard Zhao Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabrelite.dts | 5 +++++ arch/arm/boot/dts/imx6q.dtsi | 18 +++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 1ca9b3ecb882..1aebefe21571 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -35,6 +35,11 @@ reg = <0>; }; }; + + ssi1: ssi@02028000 { + fsl,mode = "i2s-slave"; + status = "okay"; + }; }; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 72ccd1d21cd9..760ca335a9f8 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -177,19 +177,31 @@ interrupts = <0 51 0x04>; }; - ssi@02028000 { /* SSI1 */ + ssi1: ssi@02028000 { + compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x02028000 0x4000>; interrupts = <0 46 0x04>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <38 37>; + status = "disabled"; }; - ssi@0202c000 { /* SSI2 */ + ssi2: ssi@0202c000 { + compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x0202c000 0x4000>; interrupts = <0 47 0x04>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <42 41>; + status = "disabled"; }; - ssi@02030000 { /* SSI3 */ + ssi3: ssi@02030000 { + compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x02030000 0x4000>; interrupts = <0 48 0x04>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <46 45>; + status = "disabled"; }; asrc@02034000 { -- cgit v1.2.1 From f965cd55e29ee582dd58531c7afd5fc061e0b7e4 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 2 May 2012 10:32:26 +0800 Subject: ARM: dts: imx6q-sabrelite: add audmux device Signed-off-by: Richard Zhao Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabrelite.dts | 4 ++++ arch/arm/boot/dts/imx6q.dtsi | 2 ++ 2 files changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 1aebefe21571..2f631f25fffe 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -65,6 +65,10 @@ status = "okay"; }; + audmux@021d8000 { + status = "okay"; + }; + uart2: serial@021e8000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 760ca335a9f8..b5a15c4c2fdc 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -655,7 +655,9 @@ }; audmux@021d8000 { + compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; reg = <0x021d8000 0x4000>; + status = "disabled"; }; mipi@021dc000 { /* MIPI-CSI */ -- cgit v1.2.1 From d99a79fcf4cbbc4dc6dc1e21e6860b97357269ea Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 9 May 2012 10:47:20 +0800 Subject: ARM: dts: imx6q-sabrelite: add i2c1 pinctrl support Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabrelite.dts | 2 ++ arch/arm/boot/dts/imx6q.dtsi | 7 +++++++ 2 files changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 2f631f25fffe..85b7c6c1ecf2 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -76,6 +76,8 @@ i2c@021a0000 { /* I2C1 */ status = "okay"; clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_1>; codec: sgtl5000@0a { compatible = "fsl,sgtl5000"; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index b5a15c4c2fdc..32ea8998c72e 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -486,6 +486,13 @@ reg = <0x020e0000 0x4000>; /* shared pinctrl settings */ + i2c1 { + pinctrl_i2c1_1: i2c1grp-1 { + fsl,pins = <137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */ + 196 0x4001b8b1>; /* MX6Q_PAD_EIM_D28__I2C1_SDA */ + }; + }; + usdhc3 { pinctrl_usdhc3_1: usdhc3grp-1 { fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */ -- cgit v1.2.1 From 5ca65c18830f997ba3df0e8e913c72492b40d6ba Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 9 May 2012 11:21:11 +0800 Subject: ARM: dts: imx6q-sabrelite: add audmux pinctrl support Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabrelite.dts | 2 ++ arch/arm/boot/dts/imx6q.dtsi | 9 +++++++++ 2 files changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 85b7c6c1ecf2..5b51deb80881 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -67,6 +67,8 @@ audmux@021d8000 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux_1>; }; uart2: serial@021e8000 { diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 32ea8998c72e..3f560250fd3d 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -486,6 +486,15 @@ reg = <0x020e0000 0x4000>; /* shared pinctrl settings */ + audmux { + pinctrl_audmux_1: audmux-1 { + fsl,pins = <18 0x80000000 /* MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD */ + 1586 0x80000000 /* MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC */ + 11 0x80000000 /* MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD */ + 3 0x80000000>; /* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */ + }; + }; + i2c1 { pinctrl_i2c1_1: i2c1grp-1 { fsl,pins = <137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */ -- cgit v1.2.1 From 0987b598eadfbb16297e8a8d4be2002b2ea32a63 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Mon, 23 Apr 2012 15:42:16 +0800 Subject: ARM: imx6q: add ssi1_ipg clk_lookup It's used by audio drivers. Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index b37ad4bc203a..f80d18b3f053 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -155,7 +155,8 @@ enum mx6q_clks { gpmi_bch_apb, gpmi_bch, gpmi_io, gpmi_apb, sata, sdma, spba, ssi1, ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3, usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg, - pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, clk_max + pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg, + ssi2_ipg, ssi3_ipg, clk_max }; static struct clk *clk[clk_max]; @@ -367,9 +368,9 @@ int __init mx6q_clocks_init(void) clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4); clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6); clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12); - clk[ssi1] = imx_clk_gate2("ssi1", "ssi1_podf", base + 0x7c, 18); - clk[ssi2] = imx_clk_gate2("ssi2", "ssi2_podf", base + 0x7c, 20); - clk[ssi3] = imx_clk_gate2("ssi3", "ssi3_podf", base + 0x7c, 22); + clk[ssi1_ipg] = imx_clk_gate2("ssi1_ipg", "ipg", base + 0x7c, 18); + clk[ssi2_ipg] = imx_clk_gate2("ssi2_ipg", "ipg", base + 0x7c, 20); + clk[ssi3_ipg] = imx_clk_gate2("ssi3_ipg", "ipg", base + 0x7c, 22); clk[uart_ipg] = imx_clk_gate2("uart_ipg", "ipg", base + 0x7c, 24); clk[uart_serial] = imx_clk_gate2("uart_serial", "uart_serial_podf", base + 0x7c, 26); clk[usboh3] = imx_clk_gate2("usboh3", "ipg", base + 0x80, 0); @@ -418,6 +419,7 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[sdma], NULL, "20ec000.sdma"); clk_register_clkdev(clk[dummy], NULL, "20bc000.wdog"); clk_register_clkdev(clk[dummy], NULL, "20c0000.wdog"); + clk_register_clkdev(clk[ssi1_ipg], NULL, "2028000.ssi"); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) { c = clk_get_sys(clks_init_on[i], NULL); -- cgit v1.2.1 From a258561df107a88a042121ea2b950a716691fca6 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Tue, 24 Apr 2012 14:19:13 +0800 Subject: ARM: imx6q_sabrelite: clk_register_clkdev cko1 for sgtl5000 Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 3 +++ arch/arm/mach-imx/mach-imx6q.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index f80d18b3f053..cab02d0a15d6 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -420,6 +420,9 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[dummy], NULL, "20bc000.wdog"); clk_register_clkdev(clk[dummy], NULL, "20c0000.wdog"); clk_register_clkdev(clk[ssi1_ipg], NULL, "2028000.ssi"); + clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); + clk_register_clkdev(clk[ahb], "ahb", NULL); + clk_register_clkdev(clk[cko1], "cko1", NULL); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) { c = clk_get_sys(clks_init_on[i], NULL); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index e0cc3dac3bec..095c5c5de7bc 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -10,6 +10,8 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include +#include #include #include #include @@ -77,11 +79,37 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev) return 0; } +static void __init imx6q_sabrelite_cko1_setup(void) +{ + struct clk *cko1_sel, *ahb, *cko1; + unsigned long rate; + + cko1_sel = clk_get_sys(NULL, "cko1_sel"); + ahb = clk_get_sys(NULL, "ahb"); + cko1 = clk_get_sys(NULL, "cko1"); + if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) { + pr_err("cko1 setup failed!\n"); + goto put_clk; + } + clk_set_parent(cko1_sel, ahb); + rate = clk_round_rate(cko1, 16000000); + clk_set_rate(cko1, rate); + clk_register_clkdev(cko1, NULL, "0-000a"); +put_clk: + if (!IS_ERR(cko1_sel)) + clk_put(cko1_sel); + if (!IS_ERR(ahb)) + clk_put(ahb); + if (!IS_ERR(cko1)) + clk_put(cko1); +} + static void __init imx6q_sabrelite_init(void) { if (IS_ENABLED(CONFIG_PHYLIB)) phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); + imx6q_sabrelite_cko1_setup(); } static void __init imx6q_init_machine(void) -- cgit v1.2.1 From b7879fe6dad97ce08e8df0bf8d408942c436d358 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 9 May 2012 14:15:45 +0800 Subject: ARM: dts: imx6q-sabrelite: add sound device imx6q-sabrelite-sgtl5000 Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabrelite.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 5b51deb80881..5a35bfdfc6a9 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -110,4 +110,18 @@ regulator-always-on; }; }; + + sound { + compatible = "fsl,imx6q-sabrelite-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx6q-sabrelite-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&codec>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <4>; + }; }; -- cgit v1.2.1 From c3001b2a63f613e0b530bfd6dd27974d2f846928 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 9 May 2012 14:44:47 +0800 Subject: ARM: dts: imx6q-sabrelite: add serial2 pinctrl support Signed-off-by: Richard Zhao Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-sabrelite.dts | 2 ++ arch/arm/boot/dts/imx6q.dtsi | 7 +++++++ 2 files changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 5a35bfdfc6a9..e0ec92973e7e 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -73,6 +73,8 @@ uart2: serial@021e8000 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial2_1>; }; i2c@021a0000 { /* I2C1 */ diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 3f560250fd3d..8c90cbac945f 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -502,6 +502,13 @@ }; }; + serial2 { + pinctrl_serial2_1: serial2grp-1 { + fsl,pins = <183 0x1b0b1 /* MX6Q_PAD_EIM_D26__UART2_TXD */ + 191 0x1b0b1>; /* MX6Q_PAD_EIM_D27__UART2_RXD */ + }; + }; + usdhc3 { pinctrl_usdhc3_1: usdhc3grp-1 { fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */ -- cgit v1.2.1 From 41a0d3aa50b8304beb12d4d488431f0b938e9732 Mon Sep 17 00:00:00 2001 From: "Ying-Chun Liu (PaulLiu)" Date: Wed, 9 May 2012 02:06:27 +0800 Subject: ARM: dts: imx53-qsb: Add Dialog DA9053 PMIC support Add Dialog DA9053 regulators support for imx53-qsb (Loco board) Cc: Sascha Hauer Cc: Mark Brown Cc: Amit Kucheria Cc: Arnaud Patard (Rtp) Cc: Russell King - ARM Linux Signed-off-by: Ying-Chun Liu (PaulLiu) Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53-qsb.dts | 74 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 73 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index b08b5874da6e..393e90d9526d 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -73,8 +73,80 @@ }; pmic: dialog@48 { - compatible = "dialog,da9053", "dialog,da9052"; + compatible = "dlg,da9053-aa", "dlg,da9052"; reg = <0x48>; + + regulators { + buck0 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck1 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck2 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + + buck3 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + + ldo4 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + }; + + ldo5 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + }; + + ldo6 { + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + }; + + ldo7 { + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + }; + + ldo8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + }; + + ldo9 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + }; + + ldo10 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + }; + + ldo11 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + }; + + ldo12 { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <3650000>; + }; + + ldo13 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + }; + }; }; }; -- cgit v1.2.1 From 13b3a07a26986f9a7bab2e14ad1e7faf701aa2de Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 3 May 2012 20:15:57 +0800 Subject: ARM: imx: add more imx5 ssi clocks Add more imx5 ssi clocks and lookup for device tree probe. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx51-imx53.c | 40 +++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index b8a382defb23..fcd94f3b0f0e 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -31,6 +31,11 @@ static const char *per_lp_apm_sel[] = { "main_bus", "lp_apm", }; static const char *per_root_sel[] = { "per_podf", "ipg", }; static const char *esdhc_c_sel[] = { "esdhc_a_podf", "esdhc_b_podf", }; static const char *esdhc_d_sel[] = { "esdhc_a_podf", "esdhc_b_podf", }; +static const char *ssi_apm_sels[] = { "ckih1", "lp_amp", "ckih2", }; +static const char *ssi_clk_sels[] = { "pll1_sw", "pll2_sw", "pll3_sw", "ssi_apm", }; +static const char *ssi3_clk_sels[] = { "ssi1_root_gate", "ssi2_root_gate", }; +static const char *ssi_ext1_com_sels[] = { "ssi_ext1_podf", "ssi1_root_gate", }; +static const char *ssi_ext2_com_sels[] = { "ssi_ext2_podf", "ssi2_root_gate", }; static const char *emi_slow_sel[] = { "main_bus", "ahb", }; static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", }; static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", }; @@ -71,6 +76,11 @@ enum imx5_clks { pll3_sw, ipu_di0_sel, ipu_di1_sel, tve_ext_sel, mx51_mipi, pll4_sw, ldb_di1_sel, di_pll4_podf, ldb_di0_sel, ldb_di0_gate, usb_phy1_gate, usb_phy2_gate, per_lp_apm, per_pred1, per_pred2, per_podf, per_root, + ssi_apm, ssi1_root_sel, ssi2_root_sel, ssi3_root_sel, ssi_ext1_sel, + ssi_ext2_sel, ssi_ext1_com_sel, ssi_ext2_com_sel, ssi1_root_pred, + ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred, + ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate, + ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate, clk_max }; @@ -195,6 +205,28 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk[uart5_per_gate] = imx_clk_gate2("uart5_per_gate", "uart_root", MXC_CCM_CCGR7, 14); clk[gpc_dvfs] = imx_clk_gate2("gpc_dvfs", "dummy", MXC_CCM_CCGR5, 24); + clk[ssi_apm] = imx_clk_mux("ssi_apm", MXC_CCM_CSCMR1, 8, 2, ssi_apm_sels, ARRAY_SIZE(ssi_apm_sels)); + clk[ssi1_root_sel] = imx_clk_mux("ssi1_root_sel", MXC_CCM_CSCMR1, 14, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels)); + clk[ssi2_root_sel] = imx_clk_mux("ssi2_root_sel", MXC_CCM_CSCMR1, 12, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels)); + clk[ssi3_root_sel] = imx_clk_mux("ssi3_root_sel", MXC_CCM_CSCMR1, 11, 1, ssi3_clk_sels, ARRAY_SIZE(ssi3_clk_sels)); + clk[ssi_ext1_sel] = imx_clk_mux("ssi_ext1_sel", MXC_CCM_CSCMR1, 28, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels)); + clk[ssi_ext2_sel] = imx_clk_mux("ssi_ext2_sel", MXC_CCM_CSCMR1, 30, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels)); + clk[ssi_ext1_com_sel] = imx_clk_mux("ssi_ext1_com_sel", MXC_CCM_CSCMR1, 0, 1, ssi_ext1_com_sels, ARRAY_SIZE(ssi_ext1_com_sels)); + clk[ssi_ext2_com_sel] = imx_clk_mux("ssi_ext2_com_sel", MXC_CCM_CSCMR1, 1, 1, ssi_ext2_com_sels, ARRAY_SIZE(ssi_ext2_com_sels)); + clk[ssi1_root_pred] = imx_clk_divider("ssi1_root_pred", "ssi1_root_sel", MXC_CCM_CS1CDR, 6, 3); + clk[ssi1_root_podf] = imx_clk_divider("ssi1_root_podf", "ssi1_root_pred", MXC_CCM_CS1CDR, 0, 6); + clk[ssi2_root_pred] = imx_clk_divider("ssi2_root_pred", "ssi2_root_sel", MXC_CCM_CS2CDR, 6, 3); + clk[ssi2_root_podf] = imx_clk_divider("ssi2_root_podf", "ssi2_root_pred", MXC_CCM_CS2CDR, 0, 6); + clk[ssi_ext1_pred] = imx_clk_divider("ssi_ext1_pred", "ssi_ext1_sel", MXC_CCM_CS1CDR, 22, 3); + clk[ssi_ext1_podf] = imx_clk_divider("ssi_ext1_podf", "ssi_ext1_pred", MXC_CCM_CS1CDR, 16, 6); + clk[ssi_ext2_pred] = imx_clk_divider("ssi_ext2_pred", "ssi_ext2_sel", MXC_CCM_CS2CDR, 22, 3); + clk[ssi_ext2_podf] = imx_clk_divider("ssi_ext2_podf", "ssi_ext2_pred", MXC_CCM_CS2CDR, 16, 6); + clk[ssi1_root_gate] = imx_clk_gate2("ssi1_root_gate", "ssi1_root_podf", MXC_CCM_CCGR3, 18); + clk[ssi2_root_gate] = imx_clk_gate2("ssi2_root_gate", "ssi2_root_podf", MXC_CCM_CCGR3, 22); + clk[ssi3_root_gate] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26); + clk[ssi_ext1_gate] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28); + clk[ssi_ext2_gate] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30); + for (i = 0; i < ARRAY_SIZE(clk); i++) if (IS_ERR(clk[i])) pr_err("i.MX5 clk %d: register failed with %ld\n", @@ -237,6 +269,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2"); + clk_register_clkdev(clk[ssi_ext1_gate], "ssi_ext1", NULL); + clk_register_clkdev(clk[ssi_ext2_gate], "ssi_ext2", NULL); clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); clk_register_clkdev(clk[cpu_podf], "cpu", NULL); clk_register_clkdev(clk[iim_gate], "iim", NULL); @@ -320,6 +354,9 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3"); clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3"); clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3"); + clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi"); + clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi"); + clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi"); /* set the usboh3 parent to pll2_sw */ clk_set_parent(clk[usboh3_sel], clk[pll2_sw]); @@ -406,6 +443,9 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx53.3"); clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.3"); clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx53.3"); + clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi"); + clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi"); + clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000); -- cgit v1.2.1 From bf22e530d5a9a1c869c02f5ee3f92f334f145802 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 11 May 2012 13:05:43 +0800 Subject: ARM: imx: add audmux pad setting for imx51-babbage Before i.MX51 Pinctrl support is available, we have to reply on the iomux initialization in non-DT board file to set iomux up for DT boot. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-mx51_babbage.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c index e4b822e9f719..517672ebcbc5 100644 --- a/arch/arm/mach-imx/mach-mx51_babbage.c +++ b/arch/arm/mach-imx/mach-mx51_babbage.c @@ -163,6 +163,12 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, MX51_PAD_CSPI1_SS0__GPIO4_24, MX51_PAD_CSPI1_SS1__GPIO4_25, + + /* Audio */ + MX51_PAD_AUD3_BB_TXD__AUD3_TXD, + MX51_PAD_AUD3_BB_RXD__AUD3_RXD, + MX51_PAD_AUD3_BB_CK__AUD3_TXC, + MX51_PAD_AUD3_BB_FS__AUD3_TXFS, }; /* Serial ports */ -- cgit v1.2.1 From 394025ef422bc4a6c4e5040abb41260749e662be Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 11 May 2012 13:09:45 +0800 Subject: ARM: imx: add audio codec clk lookup for imx53-qsb On imx53-qsb board, the clk ssi_ext.0 is used as the clock input to audio codec sgtl5000. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/imx53-dt.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c index 4172279b3900..8b002fcd10e7 100644 --- a/arch/arm/mach-imx/imx53-dt.c +++ b/arch/arm/mach-imx/imx53-dt.c @@ -10,6 +10,9 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include +#include +#include #include #include #include @@ -80,6 +83,19 @@ static const struct of_device_id imx53_iomuxc_of_match[] __initconst = { { /* sentinel */ } }; +static void __init imx53_qsb_init(void) +{ + struct clk *clk; + + clk = clk_get_sys(NULL, "ssi_ext1"); + if (IS_ERR(clk)) { + pr_err("failed to get clk ssi_ext1\n"); + return; + } + + clk_register_clkdev(clk, NULL, "0-000a"); +} + static void __init imx53_dt_init(void) { struct device_node *node; @@ -96,6 +112,9 @@ static void __init imx53_dt_init(void) of_node_put(node); } + if (of_machine_is_compatible("fsl,imx53-qsb")) + imx53_qsb_init(); + of_platform_populate(NULL, of_default_bus_match_table, imx53_auxdata_lookup, NULL); } -- cgit v1.2.1 From a15d9f8986a3984255f8ea75e8e03cc771855e7e Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 11 May 2012 13:08:46 +0800 Subject: ARM: dts: imx51-babbage: enable audio support Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx51-babbage.dts | 28 +++++++++++++++++++++++++++- arch/arm/boot/dts/imx51.dtsi | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index d42a404c0cef..de065b5976e6 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -162,6 +162,11 @@ }; }; }; + + ssi2: ssi@70014000 { + fsl,mode = "i2s-slave"; + status = "okay"; + }; }; wdog@73f98000 { /* WDOG1 */ @@ -191,12 +196,19 @@ i2c@83fc4000 { /* I2C2 */ status = "okay"; - codec: sgtl5000@0a { + sgtl5000: codec@0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + clock-frequency = <26000000>; + VDDA-supply = <&vdig_reg>; + VDDIO-supply = <&vvideo_reg>; }; }; + audmux@83fd0000 { + status = "okay"; + }; + ethernet@83fec000 { phy-mode = "mii"; status = "okay"; @@ -214,4 +226,18 @@ gpio-key,wakeup; }; }; + + sound { + compatible = "fsl,imx51-babbage-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx51-babbage-sgtl5000"; + ssi-controller = <&ssi2>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <2>; + mux-ext-port = <3>; + }; }; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 66f0ebd84174..bfa65abe8ef2 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -102,6 +102,15 @@ status = "disabled"; }; + ssi2: ssi@70014000 { + compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; + reg = <0x70014000 0x4000>; + interrupts = <30>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + esdhc@70020000 { /* ESDHC3 */ compatible = "fsl,imx51-esdhc"; reg = <0x70020000 0x4000>; @@ -235,6 +244,30 @@ status = "disabled"; }; + ssi1: ssi@83fcc000 { + compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; + reg = <0x83fcc000 0x4000>; + interrupts = <29>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + + audmux@83fd0000 { + compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; + reg = <0x83fd0000 0x4000>; + status = "disabled"; + }; + + ssi3: ssi@83fe8000 { + compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; + reg = <0x83fe8000 0x4000>; + interrupts = <96>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + ethernet@83fec000 { compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; -- cgit v1.2.1 From ffc505c0b99d6caf5b10d813f9a0ce3576f68996 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 11 May 2012 13:12:01 +0800 Subject: ARM: dts: imx53-qsb: enable audio support Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53-qsb.dts | 39 ++++++++++++++++++++++++++++++++++++++- arch/arm/boot/dts/imx53.dtsi | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index 393e90d9526d..2d803a9a6949 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -29,6 +29,11 @@ status = "okay"; }; + ssi2: ssi@50014000 { + fsl,mode = "i2s-slave"; + status = "okay"; + }; + esdhc@50020000 { /* ESDHC3 */ cd-gpios = <&gpio3 11 0>; wp-gpios = <&gpio3 12 0>; @@ -58,9 +63,11 @@ i2c@63fc4000 { /* I2C2 */ status = "okay"; - codec: sgtl5000@0a { + sgtl5000: codec@0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + VDDA-supply = <®_3p2v>; + VDDIO-supply = <®_3p2v>; }; }; @@ -150,6 +157,10 @@ }; }; + audmux@63fd0000 { + status = "okay"; + }; + ethernet@63fec000 { phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 0>; @@ -190,4 +201,30 @@ linux,default-trigger = "heartbeat"; }; }; + + regulators { + compatible = "simple-bus"; + + reg_3p2v: 3p2v { + compatible = "regulator-fixed"; + regulator-name = "3P2V"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; + }; + }; + + sound { + compatible = "fsl,imx53-qsb-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx53-qsb-sgtl5000"; + ssi-controller = <&ssi2>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <2>; + mux-ext-port = <5>; + }; }; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 5188615b5170..e3e869470cd3 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -104,6 +104,15 @@ status = "disabled"; }; + ssi2: ssi@50014000 { + compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + reg = <0x50014000 0x4000>; + interrupts = <30>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + esdhc@50020000 { /* ESDHC3 */ compatible = "fsl,imx53-esdhc"; reg = <0x50020000 0x4000>; @@ -290,6 +299,30 @@ status = "disabled"; }; + ssi1: ssi@63fcc000 { + compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + reg = <0x63fcc000 0x4000>; + interrupts = <29>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + + audmux@63fd0000 { + compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; + reg = <0x63fd0000 0x4000>; + status = "disabled"; + }; + + ssi3: ssi@63fe8000 { + compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + reg = <0x63fe8000 0x4000>; + interrupts = <96>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + ethernet@63fec000 { compatible = "fsl,imx53-fec", "fsl,imx25-fec"; reg = <0x63fec000 0x4000>; -- cgit v1.2.1 From bc3a59c1b7b1c367fec615b872bdb89ac232f62e Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Sat, 31 Mar 2012 21:26:57 +0800 Subject: ARM: mxs: add initial device tree support for imx28-evk board This patch includes basic dt support which can boot via nfs rootfs. Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Marek Vasut --- arch/arm/boot/dts/imx28-evk.dts | 48 +++++ arch/arm/boot/dts/imx28.dtsi | 382 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-mxs/Kconfig | 10 + arch/arm/mach-mxs/Makefile | 1 + arch/arm/mach-mxs/devices/Kconfig | 1 - arch/arm/mach-mxs/mach-mxs.c | 85 +++++++++ 6 files changed, 526 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/imx28-evk.dts create mode 100644 arch/arm/boot/dts/imx28.dtsi create mode 100644 arch/arm/mach-mxs/mach-mxs.c (limited to 'arch') diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts new file mode 100644 index 000000000000..5aee8ed4c3ce --- /dev/null +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -0,0 +1,48 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx28.dtsi" + +/ { + model = "Freescale i.MX28 Evaluation Kit"; + compatible = "fsl,imx28-evk", "fsl,imx28"; + + memory { + reg = <0x40000000 0x08000000>; + }; + + apb@80000000 { + apbx@80040000 { + duart: serial@80074000 { + pinctrl-names = "default"; + pinctrl-0 = <&duart_pins_a>; + status = "okay"; + }; + }; + }; + + ahb@80080000 { + mac0: ethernet@800f0000 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&mac0_pins_a>; + status = "okay"; + }; + + mac1: ethernet@800f4000 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&mac1_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi new file mode 100644 index 000000000000..5daf757992e0 --- /dev/null +++ b/arch/arm/boot/dts/imx28.dtsi @@ -0,0 +1,382 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "skeleton.dtsi" + +/ { + interrupt-parent = <&icoll>; + + cpus { + cpu@0 { + compatible = "arm,arm926ejs"; + }; + }; + + apb@80000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80000000 0x80000>; + ranges; + + apbh@80000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80000000 0x3c900>; + ranges; + + icoll: interrupt-controller@80000000 { + compatible = "fsl,imx28-icoll", "fsl,mxs-icoll"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x80000000 0x2000>; + }; + + hsadc@80002000 { + reg = <0x80002000 2000>; + interrupts = <13 87>; + status = "disabled"; + }; + + dma-apbh@80004000 { + reg = <0x80004000 2000>; + status = "disabled"; + }; + + perfmon@80006000 { + reg = <0x80006000 800>; + interrupts = <27>; + status = "disabled"; + }; + + bch@8000a000 { + reg = <0x8000a000 2000>; + interrupts = <41>; + status = "disabled"; + }; + + gpmi@8000c000 { + reg = <0x8000c000 2000>; + interrupts = <42 88>; + status = "disabled"; + }; + + ssp0: ssp@80010000 { + reg = <0x80010000 2000>; + interrupts = <96 82>; + status = "disabled"; + }; + + ssp1: ssp@80012000 { + reg = <0x80012000 2000>; + interrupts = <97 83>; + status = "disabled"; + }; + + ssp2: ssp@80014000 { + reg = <0x80014000 2000>; + interrupts = <98 84>; + status = "disabled"; + }; + + ssp3: ssp@80016000 { + reg = <0x80016000 2000>; + interrupts = <99 85>; + status = "disabled"; + }; + + pinctrl@80018000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx28-pinctrl"; + reg = <0x80018000 2000>; + + duart_pins_a: duart@0 { + reg = <0>; + fsl,pinmux-ids = <0x3102 0x3112>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + mac0_pins_a: mac0@0 { + reg = <0>; + fsl,pinmux-ids = <0x4000 0x4010 0x4020 + 0x4030 0x4040 0x4060 0x4070 + 0x4080 0x4100>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + mac1_pins_a: mac1@0 { + reg = <0>; + fsl,pinmux-ids = <0x40f1 0x4091 0x40a1 + 0x40e1 0x40b1 0x40c1>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + }; + + digctl@8001c000 { + reg = <0x8001c000 2000>; + interrupts = <89>; + status = "disabled"; + }; + + etm@80022000 { + reg = <0x80022000 2000>; + status = "disabled"; + }; + + dma-apbx@80024000 { + reg = <0x80024000 2000>; + status = "disabled"; + }; + + dcp@80028000 { + reg = <0x80028000 2000>; + interrupts = <52 53 54>; + status = "disabled"; + }; + + pxp@8002a000 { + reg = <0x8002a000 2000>; + interrupts = <39>; + status = "disabled"; + }; + + ocotp@8002c000 { + reg = <0x8002c000 2000>; + status = "disabled"; + }; + + axi-ahb@8002e000 { + reg = <0x8002e000 2000>; + status = "disabled"; + }; + + lcdif@80030000 { + reg = <0x80030000 2000>; + interrupts = <38 86>; + status = "disabled"; + }; + + can0: can@80032000 { + reg = <0x80032000 2000>; + interrupts = <8>; + status = "disabled"; + }; + + can1: can@80034000 { + reg = <0x80034000 2000>; + interrupts = <9>; + status = "disabled"; + }; + + simdbg@8003c000 { + reg = <0x8003c000 200>; + status = "disabled"; + }; + + simgpmisel@8003c200 { + reg = <0x8003c200 100>; + status = "disabled"; + }; + + simsspsel@8003c300 { + reg = <0x8003c300 100>; + status = "disabled"; + }; + + simmemsel@8003c400 { + reg = <0x8003c400 100>; + status = "disabled"; + }; + + gpiomon@8003c500 { + reg = <0x8003c500 100>; + status = "disabled"; + }; + + simenet@8003c700 { + reg = <0x8003c700 100>; + status = "disabled"; + }; + + armjtag@8003c800 { + reg = <0x8003c800 100>; + status = "disabled"; + }; + }; + + apbx@80040000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80040000 0x40000>; + ranges; + + clkctl@80040000 { + reg = <0x80040000 2000>; + status = "disabled"; + }; + + saif0: saif@80042000 { + reg = <0x80042000 2000>; + interrupts = <59 80>; + status = "disabled"; + }; + + power@80044000 { + reg = <0x80044000 2000>; + status = "disabled"; + }; + + saif1: saif@80046000 { + reg = <0x80046000 2000>; + interrupts = <58 81>; + status = "disabled"; + }; + + lradc@80050000 { + reg = <0x80050000 2000>; + status = "disabled"; + }; + + spdif@80054000 { + reg = <0x80054000 2000>; + interrupts = <45 66>; + status = "disabled"; + }; + + rtc@80056000 { + reg = <0x80056000 2000>; + interrupts = <28 29>; + status = "disabled"; + }; + + i2c0: i2c@80058000 { + reg = <0x80058000 2000>; + interrupts = <111 68>; + status = "disabled"; + }; + + i2c1: i2c@8005a000 { + reg = <0x8005a000 2000>; + interrupts = <110 69>; + status = "disabled"; + }; + + pwm@80064000 { + reg = <0x80064000 2000>; + status = "disabled"; + }; + + timrot@80068000 { + reg = <0x80068000 2000>; + status = "disabled"; + }; + + auart0: serial@8006a000 { + reg = <0x8006a000 0x2000>; + interrupts = <112 70 71>; + status = "disabled"; + }; + + auart1: serial@8006c000 { + reg = <0x8006c000 0x2000>; + interrupts = <113 72 73>; + status = "disabled"; + }; + + auart2: serial@8006e000 { + reg = <0x8006e000 0x2000>; + interrupts = <114 74 75>; + status = "disabled"; + }; + + auart3: serial@80070000 { + reg = <0x80070000 0x2000>; + interrupts = <115 76 77>; + status = "disabled"; + }; + + auart4: serial@80072000 { + reg = <0x80072000 0x2000>; + interrupts = <116 78 79>; + status = "disabled"; + }; + + duart: serial@80074000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x80074000 0x1000>; + interrupts = <47>; + status = "disabled"; + }; + + usbphy0: usbphy@8007c000 { + reg = <0x8007c000 0x2000>; + status = "disabled"; + }; + + usbphy1: usbphy@8007e000 { + reg = <0x8007e000 0x2000>; + status = "disabled"; + }; + }; + }; + + ahb@80080000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80080000 0x80000>; + ranges; + + usbctrl0: usbctrl@80080000 { + reg = <0x80080000 0x10000>; + status = "disabled"; + }; + + usbctrl1: usbctrl@80090000 { + reg = <0x80090000 0x10000>; + status = "disabled"; + }; + + dflpt@800c0000 { + reg = <0x800c0000 0x10000>; + status = "disabled"; + }; + + mac0: ethernet@800f0000 { + compatible = "fsl,imx28-fec"; + reg = <0x800f0000 0x4000>; + interrupts = <101>; + status = "disabled"; + }; + + mac1: ethernet@800f4000 { + compatible = "fsl,imx28-fec"; + reg = <0x800f4000 0x4000>; + interrupts = <102>; + status = "disabled"; + }; + + switch@800f8000 { + reg = <0x800f8000 0x8000>; + status = "disabled"; + }; + + }; +}; diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 07d5383d68ee..15bb4e211a27 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -7,18 +7,28 @@ config MXS_OCOTP config SOC_IMX23 bool + select ARM_AMBA select CPU_ARM926T select HAVE_PWM select PINCTRL_IMX23 config SOC_IMX28 bool + select ARM_AMBA select CPU_ARM926T select HAVE_PWM select PINCTRL_IMX28 comment "MXS platforms:" +config MACH_MXS_DT + bool "Support MXS platforms from device tree" + select SOC_IMX28 + select USE_OF + help + Include support for Freescale MXS platforms(i.MX23 and i.MX28) + using the device tree for discovery + config MACH_STMP378X_DEVB bool "Support STMP378x_devb Platform" select SOC_IMX23 diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 6ce21a26412e..e41590ccb437 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -4,6 +4,7 @@ obj-y := devices.o icoll.o iomux.o system.o timer.o mm.o obj-$(CONFIG_MXS_OCOTP) += ocotp.o obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig index b8913df4cfa2..19659de1c4e8 100644 --- a/arch/arm/mach-mxs/devices/Kconfig +++ b/arch/arm/mach-mxs/devices/Kconfig @@ -1,6 +1,5 @@ config MXS_HAVE_AMBA_DUART bool - select ARM_AMBA config MXS_HAVE_PLATFORM_AUART bool diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c new file mode 100644 index 000000000000..5d81a23943c6 --- /dev/null +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -0,0 +1,85 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2012 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int __init mxs_icoll_add_irq_domain(struct device_node *np, + struct device_node *interrupt_parent) +{ + irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL); + + return 0; +} + +static const struct of_device_id mxs_irq_match[] __initconst = { + { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, }, + { /* sentinel */ } +}; + +static void __init mxs_dt_init_irq(void) +{ + icoll_init_irq(); + of_irq_init(mxs_irq_match); +} + +static void __init imx28_timer_init(void) +{ + mx28_clocks_init(); +} + +static struct sys_timer imx28_timer = { + .init = imx28_timer_init, +}; + +static void __init imx28_evk_init(void) +{ + struct clk *clk; + + /* Enable fec phy clock */ + clk = clk_get_sys("enet_out", NULL); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); +} + +static void __init mxs_machine_init(void) +{ + if (of_machine_is_compatible("fsl,imx28-evk")) + imx28_evk_init(); + + of_platform_populate(NULL, of_default_bus_match_table, + NULL, NULL); +} + +static const char *imx28_dt_compat[] __initdata = { + "fsl,imx28-evk", + "fsl,imx28", + NULL, +}; + +DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") + .map_io = mx28_map_io, + .init_irq = mxs_dt_init_irq, + .timer = &imx28_timer, + .init_machine = mxs_machine_init, + .dt_compat = imx28_dt_compat, + .restart = mxs_restart, +MACHINE_END -- cgit v1.2.1 From 2954ff395bcf69cb31dbe500bec20ce0944ea19e Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 4 May 2012 21:33:42 +0800 Subject: ARM: mxs: add initial device tree support for imx23-evk board It adds initial device tree support for imx23-evk board, and only serial console is enabled. Signed-off-by: Shawn Guo Acked-by: Marek Vasut --- arch/arm/boot/dts/imx23-evk.dts | 32 ++++++ arch/arm/boot/dts/imx23.dtsi | 243 ++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-mxs/Kconfig | 1 + arch/arm/mach-mxs/mach-mxs.c | 24 ++++ 4 files changed, 300 insertions(+) create mode 100644 arch/arm/boot/dts/imx23-evk.dts create mode 100644 arch/arm/boot/dts/imx23.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts new file mode 100644 index 000000000000..8cad51ee6f89 --- /dev/null +++ b/arch/arm/boot/dts/imx23-evk.dts @@ -0,0 +1,32 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx23.dtsi" + +/ { + model = "Freescale i.MX23 Evaluation Kit"; + compatible = "fsl,imx23-evk", "fsl,imx23"; + + memory { + reg = <0x40000000 0x08000000>; + }; + + apb@80000000 { + apbx@80040000 { + duart: serial@80070000 { + pinctrl-names = "default"; + pinctrl-0 = <&duart_pins_a>; + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi new file mode 100644 index 000000000000..fb09ccd02189 --- /dev/null +++ b/arch/arm/boot/dts/imx23.dtsi @@ -0,0 +1,243 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "skeleton.dtsi" + +/ { + interrupt-parent = <&icoll>; + + cpus { + cpu@0 { + compatible = "arm,arm926ejs"; + }; + }; + + apb@80000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80000000 0x80000>; + ranges; + + apbh@80000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80000000 0x40000>; + ranges; + + icoll: interrupt-controller@80000000 { + compatible = "fsl,imx23-icoll", "fsl,mxs-icoll"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x80000000 0x2000>; + }; + + dma-apbh@80004000 { + reg = <0x80004000 2000>; + status = "disabled"; + }; + + ecc@80008000 { + reg = <0x80008000 2000>; + status = "disabled"; + }; + + bch@8000a000 { + reg = <0x8000a000 2000>; + status = "disabled"; + }; + + gpmi@8000c000 { + reg = <0x8000c000 2000>; + status = "disabled"; + }; + + ssp0: ssp@80010000 { + reg = <0x80010000 2000>; + status = "disabled"; + }; + + etm@80014000 { + reg = <0x80014000 2000>; + status = "disabled"; + }; + + pinctrl@80018000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx23-pinctrl"; + reg = <0x80018000 2000>; + + duart_pins_a: duart@0 { + reg = <0>; + fsl,pinmux-ids = <0x11a2 0x11b2>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + }; + + digctl@8001c000 { + reg = <0x8001c000 2000>; + status = "disabled"; + }; + + emi@80020000 { + reg = <0x80020000 2000>; + status = "disabled"; + }; + + dma-apbx@80024000 { + reg = <0x80024000 2000>; + status = "disabled"; + }; + + dcp@80028000 { + reg = <0x80028000 2000>; + status = "disabled"; + }; + + pxp@8002a000 { + reg = <0x8002a000 2000>; + status = "disabled"; + }; + + ocotp@8002c000 { + reg = <0x8002c000 2000>; + status = "disabled"; + }; + + axi-ahb@8002e000 { + reg = <0x8002e000 2000>; + status = "disabled"; + }; + + lcdif@80030000 { + reg = <0x80030000 2000>; + status = "disabled"; + }; + + ssp1: ssp@80034000 { + reg = <0x80034000 2000>; + status = "disabled"; + }; + + tvenc@80038000 { + reg = <0x80038000 2000>; + status = "disabled"; + }; + }; + + apbx@80040000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80040000 0x40000>; + ranges; + + clkctl@80040000 { + reg = <0x80040000 2000>; + status = "disabled"; + }; + + saif0: saif@80042000 { + reg = <0x80042000 2000>; + status = "disabled"; + }; + + power@80044000 { + reg = <0x80044000 2000>; + status = "disabled"; + }; + + saif1: saif@80046000 { + reg = <0x80046000 2000>; + status = "disabled"; + }; + + audio-out@80048000 { + reg = <0x80048000 2000>; + status = "disabled"; + }; + + audio-in@8004c000 { + reg = <0x8004c000 2000>; + status = "disabled"; + }; + + lradc@80050000 { + reg = <0x80050000 2000>; + status = "disabled"; + }; + + spdif@80054000 { + reg = <0x80054000 2000>; + status = "disabled"; + }; + + i2c@80058000 { + reg = <0x80058000 2000>; + status = "disabled"; + }; + + rtc@8005c000 { + reg = <0x8005c000 2000>; + status = "disabled"; + }; + + pwm@80064000 { + reg = <0x80064000 2000>; + status = "disabled"; + }; + + timrot@80068000 { + reg = <0x80068000 2000>; + status = "disabled"; + }; + + auart0: serial@8006c000 { + reg = <0x8006c000 0x2000>; + status = "disabled"; + }; + + auart1: serial@8006e000 { + reg = <0x8006e000 0x2000>; + status = "disabled"; + }; + + duart: serial@80070000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x80070000 0x2000>; + interrupts = <0>; + status = "disabled"; + }; + + usbphy@8007c000 { + reg = <0x8007c000 0x2000>; + status = "disabled"; + }; + }; + }; + + ahb@80080000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80080000 0x80000>; + ranges; + + usbctrl@80080000 { + reg = <0x80080000 0x10000>; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 15bb4e211a27..8138a13e23cf 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -23,6 +23,7 @@ comment "MXS platforms:" config MACH_MXS_DT bool "Support MXS platforms from device tree" + select SOC_IMX23 select SOC_IMX28 select USE_OF help diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 5d81a23943c6..182ea7529d28 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -41,6 +41,15 @@ static void __init mxs_dt_init_irq(void) of_irq_init(mxs_irq_match); } +static void __init imx23_timer_init(void) +{ + mx23_clocks_init(); +} + +static struct sys_timer imx23_timer = { + .init = imx23_timer_init, +}; + static void __init imx28_timer_init(void) { mx28_clocks_init(); @@ -69,12 +78,27 @@ static void __init mxs_machine_init(void) NULL, NULL); } +static const char *imx23_dt_compat[] __initdata = { + "fsl,imx23-evk", + "fsl,imx23", + NULL, +}; + static const char *imx28_dt_compat[] __initdata = { "fsl,imx28-evk", "fsl,imx28", NULL, }; +DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") + .map_io = mx23_map_io, + .init_irq = mxs_dt_init_irq, + .timer = &imx23_timer, + .init_machine = mxs_machine_init, + .dt_compat = imx23_dt_compat, + .restart = mxs_restart, +MACHINE_END + DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") .map_io = mx28_map_io, .init_irq = mxs_dt_init_irq, -- cgit v1.2.1 From 6c4d4efb9d19017f0eef3893912f3dec513ef8e9 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 4 May 2012 21:42:41 +0800 Subject: ARM: mxs: always build in device tree support As the ultimate for mxs platform is to convert over to device tree, let's start always building in device tree support for the platform. Signed-off-by: Shawn Guo Acked-by: Marek Vasut --- arch/arm/Kconfig | 1 + arch/arm/configs/mxs_defconfig | 1 + arch/arm/mach-mxs/Kconfig | 1 - 3 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ae5c251cd251..1f1a4fa6db58 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -471,6 +471,7 @@ config ARCH_MXS select COMMON_CLK select HAVE_CLK_PREPARE select PINCTRL + select USE_OF help Support for Freescale MXS-based family of processors diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 1ebbf451c48d..5406c23a02e3 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig @@ -22,6 +22,7 @@ CONFIG_BLK_DEV_INTEGRITY=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_MXS=y +CONFIG_MACH_MXS_DT=y CONFIG_MACH_MX23EVK=y CONFIG_MACH_MX28EVK=y CONFIG_MACH_STMP378X_DEVB=y diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 8138a13e23cf..91cf0625819c 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -25,7 +25,6 @@ config MACH_MXS_DT bool "Support MXS platforms from device tree" select SOC_IMX23 select SOC_IMX28 - select USE_OF help Include support for Freescale MXS platforms(i.MX23 and i.MX28) using the device tree for discovery -- cgit v1.2.1 From 8c92013643f5c40633d61ae331cef49c1069af10 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 10 May 2012 06:23:26 +0800 Subject: dma: mxs-dma: make platform_device_id more generic Rewrite mxs_dma_is_apbh and mxs_dma_is_apbx in order to support other SoCs like imx6q and reform the platform_device_id for the better further dt support. Cc: Dan Williams Cc: Sascha Hauer Cc: Huang Shijie Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Vinod Koul --- arch/arm/mach-mxs/devices/platform-dma.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mxs/devices/platform-dma.c b/arch/arm/mach-mxs/devices/platform-dma.c index 6a0202b1016c..aff481360212 100644 --- a/arch/arm/mach-mxs/devices/platform-dma.c +++ b/arch/arm/mach-mxs/devices/platform-dma.c @@ -32,17 +32,19 @@ static struct platform_device *__init mxs_add_dma(const char *devid, static int __init mxs_add_mxs_dma(void) { - char *apbh = "mxs-dma-apbh"; - char *apbx = "mxs-dma-apbx"; + char *mx23_apbh = "imx23-dma-apbh"; + char *mx23_apbx = "imx23-dma-apbx"; + char *mx28_apbh = "imx28-dma-apbh"; + char *mx28_apbx = "imx28-dma-apbx"; if (cpu_is_mx23()) { - mxs_add_dma(apbh, MX23_APBH_DMA_BASE_ADDR); - mxs_add_dma(apbx, MX23_APBX_DMA_BASE_ADDR); + mxs_add_dma(mx23_apbh, MX23_APBH_DMA_BASE_ADDR); + mxs_add_dma(mx23_apbx, MX23_APBX_DMA_BASE_ADDR); } if (cpu_is_mx28()) { - mxs_add_dma(apbh, MX28_APBH_DMA_BASE_ADDR); - mxs_add_dma(apbx, MX28_APBX_DMA_BASE_ADDR); + mxs_add_dma(mx28_apbh, MX28_APBH_DMA_BASE_ADDR); + mxs_add_dma(mx28_apbx, MX28_APBX_DMA_BASE_ADDR); } return 0; -- cgit v1.2.1 From cb1be3c73d273bfe74bd5a6fe80e6e84181283af Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Fri, 4 May 2012 20:12:18 +0800 Subject: ARM: mxs: do not add dma device by default This will cause conflict when dt is enabled. So let each platform add dma devices respectively. Cc: Sascha Hauer Cc: Huang Shijie Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Vinod Koul --- arch/arm/mach-mxs/devices/platform-dma.c | 23 +---------------------- arch/arm/mach-mxs/include/mach/common.h | 3 +++ arch/arm/mach-mxs/mm.c | 6 ++++++ 3 files changed, 10 insertions(+), 22 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mxs/devices/platform-dma.c b/arch/arm/mach-mxs/devices/platform-dma.c index aff481360212..46824501de00 100644 --- a/arch/arm/mach-mxs/devices/platform-dma.c +++ b/arch/arm/mach-mxs/devices/platform-dma.c @@ -14,7 +14,7 @@ #include #include -static struct platform_device *__init mxs_add_dma(const char *devid, +struct platform_device *__init mxs_add_dma(const char *devid, resource_size_t base) { struct resource res[] = { @@ -29,24 +29,3 @@ static struct platform_device *__init mxs_add_dma(const char *devid, res, ARRAY_SIZE(res), NULL, 0, DMA_BIT_MASK(32)); } - -static int __init mxs_add_mxs_dma(void) -{ - char *mx23_apbh = "imx23-dma-apbh"; - char *mx23_apbx = "imx23-dma-apbx"; - char *mx28_apbh = "imx28-dma-apbh"; - char *mx28_apbx = "imx28-dma-apbx"; - - if (cpu_is_mx23()) { - mxs_add_dma(mx23_apbh, MX23_APBH_DMA_BASE_ADDR); - mxs_add_dma(mx23_apbx, MX23_APBX_DMA_BASE_ADDR); - } - - if (cpu_is_mx28()) { - mxs_add_dma(mx28_apbh, MX28_APBH_DMA_BASE_ADDR); - mxs_add_dma(mx28_apbx, MX28_APBX_DMA_BASE_ADDR); - } - - return 0; -} -arch_initcall(mxs_add_mxs_dma); diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index 84af61cf6a62..5f9a3583266c 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -31,4 +31,7 @@ extern void mx28_init_irq(void); extern void icoll_init_irq(void); +extern struct platform_device *mxs_add_dma(const char *devid, + resource_size_t base); + #endif /* __MACH_MXS_COMMON_H__ */ diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c index 67a384edcf5b..6af4371ec829 100644 --- a/arch/arm/mach-mxs/mm.c +++ b/arch/arm/mach-mxs/mm.c @@ -66,9 +66,15 @@ void __init mx28_init_irq(void) void __init mx23_soc_init(void) { pinctrl_provide_dummies(); + + mxs_add_dma("imx23-dma-apbh", MX23_APBH_DMA_BASE_ADDR); + mxs_add_dma("imx23-dma-apbx", MX23_APBX_DMA_BASE_ADDR); } void __init mx28_soc_init(void) { pinctrl_provide_dummies(); + + mxs_add_dma("imx28-dma-apbh", MX23_APBH_DMA_BASE_ADDR); + mxs_add_dma("imx28-dma-apbx", MX23_APBX_DMA_BASE_ADDR); } -- cgit v1.2.1 From 84f3570a96c4632cb2d3958ff7542f66b49c33cd Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Fri, 4 May 2012 20:12:19 +0800 Subject: ARM: mxs: add mxs-dma dt support Cc: Grant Likely Cc: Rob Herring Cc: Sascha Hauer Cc: Huang Shijie Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Vinod Koul --- arch/arm/boot/dts/imx23.dtsi | 4 ++-- arch/arm/boot/dts/imx28.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index fb09ccd02189..a85ef5514747 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -42,8 +42,8 @@ }; dma-apbh@80004000 { + compatible = "fsl,imx23-dma-apbh"; reg = <0x80004000 2000>; - status = "disabled"; }; ecc@80008000 { @@ -97,8 +97,8 @@ }; dma-apbx@80024000 { + compatible = "fsl,imx23-dma-apbx"; reg = <0x80024000 2000>; - status = "disabled"; }; dcp@80028000 { diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 5daf757992e0..a17fbfcb2f83 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -48,8 +48,8 @@ }; dma-apbh@80004000 { + compatible = "fsl,imx28-dma-apbh"; reg = <0x80004000 2000>; - status = "disabled"; }; perfmon@80006000 { @@ -140,8 +140,8 @@ }; dma-apbx@80024000 { + compatible = "fsl,imx28-dma-apbx"; reg = <0x80024000 2000>; - status = "disabled"; }; dcp@80028000 { -- cgit v1.2.1 From 164387d2b4ae206f6275f5f6857aee74654918c4 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 3 May 2012 23:32:52 +0800 Subject: gpio/mxs: get rid of the use of cpu_is_xxx It removes the use of cpu_is_xxx from gpio-mxs driver and instead use platform_device_id to identify the device. Accordingly, mxs platform code is changed to register gpio device with different names, and the registeration are done in soc specific initialization functions now, so postcore_initcall(mxs_add_mxs_gpio) gets removed. Signed-off-by: Shawn Guo Acked-by: Linus Walleij --- arch/arm/mach-mxs/devices/platform-gpio-mxs.c | 24 ++---------------------- arch/arm/mach-mxs/include/mach/common.h | 4 ++-- arch/arm/mach-mxs/mm.c | 10 ++++++++++ 3 files changed, 14 insertions(+), 24 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c index ed0885e414e0..cd99f19ec637 100644 --- a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c +++ b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c @@ -14,7 +14,7 @@ #include struct platform_device *__init mxs_add_gpio( - int id, resource_size_t iobase, int irq) + char *name, int id, resource_size_t iobase, int irq) { struct resource res[] = { { @@ -29,25 +29,5 @@ struct platform_device *__init mxs_add_gpio( }; return platform_device_register_resndata(&mxs_apbh_bus, - "gpio-mxs", id, res, ARRAY_SIZE(res), NULL, 0); + name, id, res, ARRAY_SIZE(res), NULL, 0); } - -static int __init mxs_add_mxs_gpio(void) -{ - if (cpu_is_mx23()) { - mxs_add_gpio(0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0); - mxs_add_gpio(1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1); - mxs_add_gpio(2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2); - } - - if (cpu_is_mx28()) { - mxs_add_gpio(0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0); - mxs_add_gpio(1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1); - mxs_add_gpio(2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2); - mxs_add_gpio(3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3); - mxs_add_gpio(4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4); - } - - return 0; -} -postcore_initcall(mxs_add_mxs_gpio); diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index 5f9a3583266c..de6c7ba42544 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -18,13 +18,11 @@ extern void mxs_restart(char, const char *); extern int mxs_saif_clkmux_select(unsigned int clkmux); extern void mx23_soc_init(void); -extern int mx23_register_gpios(void); extern int mx23_clocks_init(void); extern void mx23_map_io(void); extern void mx23_init_irq(void); extern void mx28_soc_init(void); -extern int mx28_register_gpios(void); extern int mx28_clocks_init(void); extern void mx28_map_io(void); extern void mx28_init_irq(void); @@ -33,5 +31,7 @@ extern void icoll_init_irq(void); extern struct platform_device *mxs_add_dma(const char *devid, resource_size_t base); +extern struct platform_device *mxs_add_gpio(char *name, int id, + resource_size_t iobase, int irq); #endif /* __MACH_MXS_COMMON_H__ */ diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c index 6af4371ec829..dccb67a9e7c4 100644 --- a/arch/arm/mach-mxs/mm.c +++ b/arch/arm/mach-mxs/mm.c @@ -69,6 +69,10 @@ void __init mx23_soc_init(void) mxs_add_dma("imx23-dma-apbh", MX23_APBH_DMA_BASE_ADDR); mxs_add_dma("imx23-dma-apbx", MX23_APBX_DMA_BASE_ADDR); + + mxs_add_gpio("imx23-gpio", 0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0); + mxs_add_gpio("imx23-gpio", 1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1); + mxs_add_gpio("imx23-gpio", 2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2); } void __init mx28_soc_init(void) @@ -77,4 +81,10 @@ void __init mx28_soc_init(void) mxs_add_dma("imx28-dma-apbh", MX23_APBH_DMA_BASE_ADDR); mxs_add_dma("imx28-dma-apbx", MX23_APBX_DMA_BASE_ADDR); + + mxs_add_gpio("imx28-gpio", 0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0); + mxs_add_gpio("imx28-gpio", 1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1); + mxs_add_gpio("imx28-gpio", 2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2); + mxs_add_gpio("imx28-gpio", 3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3); + mxs_add_gpio("imx28-gpio", 4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4); } -- cgit v1.2.1 From ce4c6f9b5987ac9402788c518bc5bd8b8572aa1e Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 4 May 2012 14:32:35 +0800 Subject: ARM: mxs: add gpio support for device tree boot It adds gpio support for device tree boot. Signed-off-by: Shawn Guo Acked-by: Linus Walleij --- arch/arm/boot/dts/imx23.dtsi | 35 +++++++++++++++++++++++++++- arch/arm/boot/dts/imx28.dtsi | 55 +++++++++++++++++++++++++++++++++++++++++++- arch/arm/mach-mxs/mach-mxs.c | 12 ++++++++++ 3 files changed, 100 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index a85ef5514747..26220550f2f8 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -14,6 +14,12 @@ / { interrupt-parent = <&icoll>; + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + }; + cpus { cpu@0 { compatible = "arm,arm926ejs"; @@ -74,9 +80,36 @@ pinctrl@80018000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx23-pinctrl"; + compatible = "fsl,imx23-pinctrl", "simple-bus"; reg = <0x80018000 2000>; + gpio0: gpio@0 { + compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; + interrupts = <16>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@1 { + compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; + interrupts = <17>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@2 { + compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; + interrupts = <18>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + duart_pins_a: duart@0 { reg = <0>; fsl,pinmux-ids = <0x11a2 0x11b2>; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index a17fbfcb2f83..1abd9b37691c 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -14,6 +14,14 @@ / { interrupt-parent = <&icoll>; + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + }; + cpus { cpu@0 { compatible = "arm,arm926ejs"; @@ -97,9 +105,54 @@ pinctrl@80018000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx28-pinctrl"; + compatible = "fsl,imx28-pinctrl", "simple-bus"; reg = <0x80018000 2000>; + gpio0: gpio@0 { + compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + interrupts = <127>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@1 { + compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + interrupts = <126>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@2 { + compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + interrupts = <125>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@3 { + compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + interrupts = <124>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@4 { + compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + interrupts = <123>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + duart_pins_a: duart@0 { reg = <0>; fsl,pinmux-ids = <0x3102 0x3112>; diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 182ea7529d28..8cac94b33020 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -30,8 +30,20 @@ static int __init mxs_icoll_add_irq_domain(struct device_node *np, return 0; } +static int __init mxs_gpio_add_irq_domain(struct device_node *np, + struct device_node *interrupt_parent) +{ + static int gpio_irq_base = MXS_GPIO_IRQ_START; + + irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL); + gpio_irq_base += 32; + + return 0; +} + static const struct of_device_id mxs_irq_match[] __initconst = { { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, }, + { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, }, { /* sentinel */ } }; -- cgit v1.2.1 From ef9b4d3996624f65ffa928bd7767f0e186687c15 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sat, 5 May 2012 20:24:01 +0800 Subject: mmc: mxs-mmc: get rid of the use of cpu_is_xxx The register HW_SSP_VERSION is broken for ssp version detection, as the address of the register is different between imx23 and imx28. Let's use platform_device_id to detect the device, so that the use of cpu_is_xxx can be removed. Signed-off-by: Shawn Guo Acked-by: Chris Ball --- arch/arm/mach-mxs/devices/platform-mxs-mmc.c | 21 +++++++++++---------- arch/arm/mach-mxs/include/mach/devices-common.h | 1 + 2 files changed, 12 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c index bef9d923f54e..b33c9d05c552 100644 --- a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c +++ b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c @@ -17,8 +17,9 @@ #include #include -#define mxs_mxs_mmc_data_entry_single(soc, _id, hwid) \ +#define mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid) \ { \ + .devid = _devid, \ .id = _id, \ .iobase = soc ## _SSP ## hwid ## _BASE_ADDR, \ .dma = soc ## _DMA_SSP ## hwid, \ @@ -26,23 +27,23 @@ .irq_dma = soc ## _INT_SSP ## hwid ## _DMA, \ } -#define mxs_mxs_mmc_data_entry(soc, _id, hwid) \ - [_id] = mxs_mxs_mmc_data_entry_single(soc, _id, hwid) +#define mxs_mxs_mmc_data_entry(soc, _devid, _id, hwid) \ + [_id] = mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid) #ifdef CONFIG_SOC_IMX23 const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = { - mxs_mxs_mmc_data_entry(MX23, 0, 1), - mxs_mxs_mmc_data_entry(MX23, 1, 2), + mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 0, 1), + mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 1, 2), }; #endif #ifdef CONFIG_SOC_IMX28 const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = { - mxs_mxs_mmc_data_entry(MX28, 0, 0), - mxs_mxs_mmc_data_entry(MX28, 1, 1), - mxs_mxs_mmc_data_entry(MX28, 2, 2), - mxs_mxs_mmc_data_entry(MX28, 3, 3), + mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 0, 0), + mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 1, 1), + mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 2, 2), + mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 3, 3), }; #endif @@ -70,6 +71,6 @@ struct platform_device *__init mxs_add_mxs_mmc( }, }; - return mxs_add_platform_device("mxs-mmc", data->id, + return mxs_add_platform_device(data->devid, data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h index f2e383955d88..2b37689c74ee 100644 --- a/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/arch/arm/mach-mxs/include/mach/devices-common.h @@ -89,6 +89,7 @@ struct platform_device * __init mxs_add_mxs_i2c( /* mmc */ #include struct mxs_mxs_mmc_data { + const char *devid; int id; resource_size_t iobase; resource_size_t dma; -- cgit v1.2.1 From 81f38ee8e6a9472193337da248c30963a9741a30 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 10:04:23 +0800 Subject: mmc: mxs-mmc: move header from mach into linux folder Rename arch/arm/mach-mxs/include/mach/mmc.h to include/linux/mmc/mxs-mmc.h, so that mxs-mmc driver becomes inclusion free. Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Chris Ball --- arch/arm/mach-mxs/include/mach/devices-common.h | 2 +- arch/arm/mach-mxs/include/mach/mmc.h | 18 ------------------ 2 files changed, 1 insertion(+), 19 deletions(-) delete mode 100644 arch/arm/mach-mxs/include/mach/mmc.h (limited to 'arch') diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h index 2b37689c74ee..6fc060151979 100644 --- a/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/arch/arm/mach-mxs/include/mach/devices-common.h @@ -87,7 +87,7 @@ struct platform_device * __init mxs_add_mxs_i2c( const struct mxs_mxs_i2c_data *data); /* mmc */ -#include +#include struct mxs_mxs_mmc_data { const char *devid; int id; diff --git a/arch/arm/mach-mxs/include/mach/mmc.h b/arch/arm/mach-mxs/include/mach/mmc.h deleted file mode 100644 index 211547a05564..000000000000 --- a/arch/arm/mach-mxs/include/mach/mmc.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __MACH_MXS_MMC_H__ -#define __MACH_MXS_MMC_H__ - -struct mxs_mmc_platform_data { - int wp_gpio; /* write protect pin */ - unsigned int flags; -#define SLOTF_4_BIT_CAPABLE (1 << 0) -#define SLOTF_8_BIT_CAPABLE (1 << 1) -}; -#endif /* __MACH_MXS_MMC_H__ */ -- cgit v1.2.1 From be1ce30869b0bbdc3c807fc25a9dc6bfec8471a4 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 16:29:36 +0800 Subject: ARM: dts: enable mmc for imx23-evk Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23-evk.dts | 11 +++++++++++ arch/arm/boot/dts/imx23.dtsi | 19 +++++++++++++++++++ 2 files changed, 30 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts index 8cad51ee6f89..70bffa929b65 100644 --- a/arch/arm/boot/dts/imx23-evk.dts +++ b/arch/arm/boot/dts/imx23-evk.dts @@ -21,6 +21,17 @@ }; apb@80000000 { + apbh@80000000 { + ssp0: ssp@80010000 { + compatible = "fsl,imx23-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_8bit_pins_a &mmc0_pins_fixup>; + bus-width = <8>; + wp-gpios = <&gpio1 30 0>; + status = "okay"; + }; + }; + apbx@80040000 { duart: serial@80070000 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 26220550f2f8..8c5f9994f3fc 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -69,6 +69,8 @@ ssp0: ssp@80010000 { reg = <0x80010000 2000>; + interrupts = <15 14>; + fsl,ssp-dma-channel = <1>; status = "disabled"; }; @@ -117,6 +119,21 @@ fsl,voltage = <1>; fsl,pull-up = <0>; }; + + mmc0_8bit_pins_a: mmc0-8bit@0 { + reg = <0>; + fsl,pinmux-ids = <0x2020 0x2030 0x2040 + 0x2050 0x0082 0x0092 0x00a2 + 0x00b2 0x2000 0x2010 0x2060>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + mmc0_pins_fixup: mmc0-pins-fixup { + fsl,pinmux-ids = <0x2010 0x2060>; + fsl,pull-up = <0>; + }; }; digctl@8001c000 { @@ -161,6 +178,8 @@ ssp1: ssp@80034000 { reg = <0x80034000 2000>; + interrupts = <2 20>; + fsl,ssp-dma-channel = <2>; status = "disabled"; }; -- cgit v1.2.1 From 35d23047f8ba1b7cc9a067b9506352fd257c8df5 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 16:33:34 +0800 Subject: ARM: dts: enable mmc for imx28-evk Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx28-evk.dts | 19 +++++++++++++++++++ arch/arm/boot/dts/imx28.dtsi | 25 +++++++++++++++++++++++++ 2 files changed, 44 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index 5aee8ed4c3ce..2b7c68e52e64 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -21,6 +21,25 @@ }; apb@80000000 { + apbh@80000000 { + ssp0: ssp@80010000 { + compatible = "fsl,imx28-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_8bit_pins_a + &mmc0_cd_cfg &mmc0_sck_cfg>; + bus-width = <8>; + wp-gpios = <&gpio2 12 0>; + status = "okay"; + }; + + ssp1: ssp@80012000 { + compatible = "fsl,imx28-mmc"; + bus-width = <8>; + wp-gpios = <&gpio0 28 0>; + status = "okay"; + }; + }; + apbx@80040000 { duart: serial@80074000 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 1abd9b37691c..8596bdf9c19e 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -81,24 +81,28 @@ ssp0: ssp@80010000 { reg = <0x80010000 2000>; interrupts = <96 82>; + fsl,ssp-dma-channel = <0>; status = "disabled"; }; ssp1: ssp@80012000 { reg = <0x80012000 2000>; interrupts = <97 83>; + fsl,ssp-dma-channel = <1>; status = "disabled"; }; ssp2: ssp@80014000 { reg = <0x80014000 2000>; interrupts = <98 84>; + fsl,ssp-dma-channel = <2>; status = "disabled"; }; ssp3: ssp@80016000 { reg = <0x80016000 2000>; interrupts = <99 85>; + fsl,ssp-dma-channel = <3>; status = "disabled"; }; @@ -179,6 +183,27 @@ fsl,voltage = <1>; fsl,pull-up = <1>; }; + + mmc0_8bit_pins_a: mmc0-8bit@0 { + reg = <0>; + fsl,pinmux-ids = <0x2000 0x2010 0x2020 + 0x2030 0x2040 0x2050 0x2060 + 0x2070 0x2080 0x2090 0x20a0>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + mmc0_cd_cfg: mmc0-cd-cfg { + fsl,pinmux-ids = <0x2090>; + fsl,pull-up = <0>; + }; + + mmc0_sck_cfg: mmc0-sck-cfg { + fsl,pinmux-ids = <0x20a0>; + fsl,drive-strength = <2>; + fsl,pull-up = <0>; + }; }; digctl@8001c000 { -- cgit v1.2.1 From 2a96e3912b8d79f0bde45a5d657d48595cc7261c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 10 May 2012 15:02:10 +0800 Subject: ARM: dts: enable i2c device for imx28-evk Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx28-evk.dts | 6 ++++++ arch/arm/boot/dts/imx28.dtsi | 14 ++++++++++++++ 2 files changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index 2b7c68e52e64..0b8eeb559906 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -41,6 +41,12 @@ }; apbx@80040000 { + i2c0: i2c@80058000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + }; + duart: serial@80074000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_a>; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 8596bdf9c19e..fd73fc24e26e 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -204,6 +204,14 @@ fsl,drive-strength = <2>; fsl,pull-up = <0>; }; + + i2c0_pins_a: i2c0@0 { + reg = <0>; + fsl,pinmux-ids = <0x3180 0x3190>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; }; digctl@8001c000 { @@ -345,12 +353,18 @@ }; i2c0: i2c@80058000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx28-i2c"; reg = <0x80058000 2000>; interrupts = <111 68>; status = "disabled"; }; i2c1: i2c@8005a000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx28-i2c"; reg = <0x8005a000 2000>; interrupts = <110 69>; status = "disabled"; -- cgit v1.2.1 From 530f1d416091212243b341e0022b2967886b30e4 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 10 May 2012 15:03:16 +0800 Subject: ARM: dts: enable audio support for imx28-evk Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx28-evk.dts | 41 +++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/imx28.dtsi | 23 +++++++++++++++++++++++ 2 files changed, 64 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index 0b8eeb559906..ee520a529cb4 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -41,10 +41,31 @@ }; apbx@80040000 { + saif0: saif@80042000 { + pinctrl-names = "default"; + pinctrl-0 = <&saif0_pins_a>; + status = "okay"; + }; + + saif1: saif@80046000 { + pinctrl-names = "default"; + pinctrl-0 = <&saif1_pins_a>; + fsl,saif-master = <&saif0>; + status = "okay"; + }; + i2c0: i2c@80058000 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; status = "okay"; + + sgtl5000: codec@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + + }; }; duart: serial@80074000 { @@ -70,4 +91,24 @@ status = "okay"; }; }; + + regulators { + compatible = "simple-bus"; + + reg_3p3v: 3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + + sound { + compatible = "fsl,imx28-evk-sgtl5000", + "fsl,mxs-audio-sgtl5000"; + model = "imx28-evk-sgtl5000"; + saif-controllers = <&saif0 &saif1>; + audio-codec = <&sgtl5000>; + }; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index fd73fc24e26e..4634cb861a59 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -20,6 +20,8 @@ gpio2 = &gpio2; gpio3 = &gpio3; gpio4 = &gpio4; + saif0 = &saif0; + saif1 = &saif1; }; cpus { @@ -212,6 +214,23 @@ fsl,voltage = <1>; fsl,pull-up = <1>; }; + + saif0_pins_a: saif0@0 { + reg = <0>; + fsl,pinmux-ids = + <0x3140 0x3150 0x3160 0x3170>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + saif1_pins_a: saif1@0 { + reg = <0>; + fsl,pinmux-ids = <0x31a0>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; }; digctl@8001c000 { @@ -319,8 +338,10 @@ }; saif0: saif@80042000 { + compatible = "fsl,imx28-saif"; reg = <0x80042000 2000>; interrupts = <59 80>; + fsl,saif-dma-channel = <4>; status = "disabled"; }; @@ -330,8 +351,10 @@ }; saif1: saif@80046000 { + compatible = "fsl,imx28-saif"; reg = <0x80046000 2000>; interrupts = <58 81>; + fsl,saif-dma-channel = <5>; status = "disabled"; }; -- cgit v1.2.1 From 7868a9bcac7d98d7437e10eca649d787e2c80d2c Mon Sep 17 00:00:00 2001 From: Hiroshi DOYU Date: Mon, 7 May 2012 09:43:47 +0300 Subject: ARM: dt: tegra: Add device tree support for AHB Add AHB entry for tegra20/30. Signed-off-by: Hiroshi DOYU Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20.dtsi | 5 +++++ arch/arm/boot/dts/tegra30.dtsi | 5 +++++ 2 files changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 108e894a8926..24129fb507a5 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -206,5 +206,10 @@ interrupts = < 0 97 0x04 >; phy_type = "utmi"; }; + + ahb: ahb@6000c004 { + compatible = "nvidia,tegra20-ahb"; + reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ + }; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 15200a949a81..9d650fb07e45 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -224,4 +224,9 @@ nvidia,ahub-cif-ids = <8 8>; }; }; + + ahb: ahb@6000c004 { + compatible = "nvidia,tegra30-ahb"; + reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ + }; }; -- cgit v1.2.1 From 4a82f2b38ee2d8b185a6d5ee2d5783e8a4c8c53d Mon Sep 17 00:00:00 2001 From: "hdoyu@nvidia.com" Date: Wed, 9 May 2012 21:42:31 +0000 Subject: ARM: dt: tegra20.dtsi: Add Memory Controller(MC) nodes Add Tegra MC(Memory Controller) nodes for tegra20.dtsi. Signed-off-by: Hiroshi DOYU Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 24129fb507a5..548b42eebd53 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -211,5 +211,12 @@ compatible = "nvidia,tegra20-ahb"; reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ }; + + mc { + compatible = "nvidia,tegra20-mc"; + reg = <0x7000f000 0x024 + 0x7000f03c 0x3c4>; + interrupts = <0 77 0x04>; + }; }; -- cgit v1.2.1 From ecf43742735d7c1edfd03e8c3cc30f52268138fc Mon Sep 17 00:00:00 2001 From: "hdoyu@nvidia.com" Date: Wed, 9 May 2012 21:42:33 +0000 Subject: ARM: dt: tegra30.dtsi: Add Memory Controller(MC) nodes Add Tegra MC(Memory Controller) nodes for tegra30.dtsi. Signed-off-by: Hiroshi DOYU Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra30.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 9d650fb07e45..167ccbcd9b86 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -229,4 +229,13 @@ compatible = "nvidia,tegra30-ahb"; reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ }; + + mc { + compatible = "nvidia,tegra30-mc"; + reg = <0x7000f000 0x010 + 0x7000f03c 0x1b4 + 0x7000f200 0x028 + 0x7000f284 0x17c>; + interrupts = <0 77 0x04>; + }; }; -- cgit v1.2.1 From 6a943e0e13900881ff6b980441233e10a6642904 Mon Sep 17 00:00:00 2001 From: "hdoyu@nvidia.com" Date: Wed, 9 May 2012 21:45:33 +0000 Subject: ARM: dt: tegra20.dtsi: Add GART node Add a node for the Tegra20 GART Signed-off-by: Hiroshi DOYU Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 548b42eebd53..a76c8a85020a 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -218,5 +218,11 @@ 0x7000f03c 0x3c4>; interrupts = <0 77 0x04>; }; + + gart { + compatible = "nvidia,tegra20-gart"; + reg = <0x7000f024 0x00000018 /* controller registers */ + 0x58000000 0x02000000>; /* GART aperture */ + }; }; -- cgit v1.2.1 From 54174a33da64536d6840ffa5ae9edc71cb9bf3a1 Mon Sep 17 00:00:00 2001 From: "hdoyu@nvidia.com" Date: Wed, 9 May 2012 21:50:21 +0000 Subject: ARM: dt: tegra30.dtsi: Add SMMU node Add a node for the Tegra30 SMMU Signed-off-by: Hiroshi DOYU Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra30.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 167ccbcd9b86..e9792ac03635 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -238,4 +238,14 @@ 0x7000f284 0x17c>; interrupts = <0 77 0x04>; }; + + smmu { + compatible = "nvidia,tegra30-smmu"; + reg = <0x7000f010 0x02c + 0x7000f1f0 0x010 + 0x7000f228 0x05c>; + nvidia,#asids = <4>; /* # of ASIDs */ + dma-window = <0 0x40000000>; /* IOVA start & length */ + nvidia,ahb = <&ahb>; + }; }; -- cgit v1.2.1 From 331da58ca179d036a4e03353067f782ae54879e7 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Thu, 10 May 2012 20:38:45 +0000 Subject: ARM: dt: tegra: cardhu: register core regulator tps62361 Add device info for the core regulator tps62360 in tegra-cardhu dts file. Signed-off-by: Laxman Dewangan [swarren: fixed node name to reflect actual device type] Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-cardhu.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index facb950c4bec..c45775685f72 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -123,6 +123,19 @@ micdet-delay = <100>; gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; }; + + tps62361 { + compatible = "ti,tps62361"; + reg = <0x60>; + + regulator-name = "tps62361-vout"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + regulator-always-on; + ti,vsel0-state-high; + ti,vsel1-state-high; + }; }; sdhci@78000000 { -- cgit v1.2.1 From 1dfebb426cfd16e2080f8c95e00ca2462f2325d4 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 18:01:38 -0600 Subject: ARM: dt: tegra cardhu: fix typo in SDHCI node name Cardhu's eMMC controller is on sdhci@78000600, not sdhci@78000400. Fix the typo. This roughly doubles the IO performance, since the support-8bit property actually takes effect. Signed-off-by: Stephen Warren Cc: stable@kernel.org # v3.4 --- arch/arm/boot/dts/tegra-cardhu.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index c45775685f72..74d1ca4fc1b4 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -152,7 +152,7 @@ status = "disable"; }; - sdhci@78000400 { + sdhci@78000600 { support-8bit; }; -- cgit v1.2.1 From 95decf84742d712a5875bb655cd7440f6d7c1184 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 16:11:38 -0600 Subject: ARM: dt: tegra: whitespace cleanup Consistently don't place a space after < or before >. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-cardhu.dts | 4 +- arch/arm/boot/dts/tegra-harmony.dts | 8 +-- arch/arm/boot/dts/tegra-seaboard.dts | 26 ++++---- arch/arm/boot/dts/tegra-trimslice.dts | 4 +- arch/arm/boot/dts/tegra-ventana.dts | 8 +-- arch/arm/boot/dts/tegra20.dtsi | 101 ++++++++++++++-------------- arch/arm/boot/dts/tegra30.dtsi | 120 +++++++++++++++++----------------- 7 files changed, 135 insertions(+), 136 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index 74d1ca4fc1b4..378b65e186e8 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -7,7 +7,7 @@ compatible = "nvidia,cardhu", "nvidia,tegra30"; memory { - reg = < 0x80000000 0x40000000 >; + reg = <0x80000000 0x40000000>; }; pinmux@70000000 { @@ -64,7 +64,7 @@ }; serial@70006000 { - clock-frequency = < 408000000 >; + clock-frequency = <408000000>; }; serial@70006040 { diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts index 6857cec8382d..04647b3175db 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra-harmony.dts @@ -7,7 +7,7 @@ compatible = "nvidia,harmony", "nvidia,tegra20"; memory@0 { - reg = < 0x00000000 0x40000000 >; + reg = <0x00000000 0x40000000>; }; pinmux@70000000 { @@ -245,14 +245,14 @@ compatible = "wlf,wm8903"; reg = <0x1a>; interrupt-parent = <&gpio>; - interrupts = < 187 0x04 >; + interrupts = <187 0x04>; gpio-controller; #gpio-cells = <2>; micdet-cfg = <0>; micdet-delay = <100>; - gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; }; }; @@ -309,7 +309,7 @@ }; serial@70006300 { - clock-frequency = < 216000000 >; + clock-frequency = <216000000>; }; serial@70006400 { diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index c4d171ec9ee4..d4cbd8054c07 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -8,7 +8,7 @@ memory { device_type = "memory"; - reg = < 0x00000000 0x40000000 >; + reg = <0x00000000 0x40000000>; }; pinmux@70000000 { @@ -265,14 +265,14 @@ compatible = "wlf,wm8903"; reg = <0x1a>; interrupt-parent = <&gpio>; - interrupts = < 187 0x04 >; + interrupts = <187 0x04>; gpio-controller; #gpio-cells = <2>; micdet-cfg = <0>; micdet-delay = <100>; - gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; }; /* ALS and proximity sensor */ @@ -280,7 +280,7 @@ compatible = "isil,isl29018"; reg = <0x44>; interrupt-parent = <&gpio>; - interrupts = < 202 0x04 >; /* GPIO PZ2 */ + interrupts = <202 0x04>; /* GPIO PZ2 */ }; gyrometer@68 { @@ -361,7 +361,7 @@ }; serial@70006300 { - clock-frequency = < 216000000 >; + clock-frequency = <216000000>; }; serial@70006400 { @@ -413,10 +413,10 @@ emc@7000f400 { emc-table@190000 { - reg = < 190000 >; + reg = <190000>; compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 190000 >; - nvidia,emc-registers = < 0x0000000c 0x00000026 + clock-frequency = <190000>; + nvidia,emc-registers = <0x0000000c 0x00000026 0x00000009 0x00000003 0x00000004 0x00000004 0x00000002 0x0000000c 0x00000003 0x00000003 0x00000002 0x00000001 0x00000004 0x00000005 @@ -427,14 +427,14 @@ 0x00000002 0x00000000 0x00000000 0x00000002 0x00000000 0x00000000 0x00000083 0xa06204ae 0x007dc010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 >; + 0x00000000 0x00000000 0x00000000 0x00000000>; }; emc-table@380000 { - reg = < 380000 >; + reg = <380000>; compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 380000 >; - nvidia,emc-registers = < 0x00000017 0x0000004b + clock-frequency = <380000>; + nvidia,emc-registers = <0x00000017 0x0000004b 0x00000012 0x00000006 0x00000004 0x00000005 0x00000003 0x0000000c 0x00000006 0x00000006 0x00000003 0x00000001 0x00000004 0x00000005 @@ -445,7 +445,7 @@ 0x00000002 0x00000000 0x00000000 0x00000002 0x00000000 0x00000000 0x00000083 0xe044048b 0x007d8010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 >; + 0x00000000 0x00000000 0x00000000 0x00000000>; }; }; diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index ead93657dd06..7181a5e9e48b 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -7,7 +7,7 @@ compatible = "compulab,trimslice", "nvidia,tegra20"; memory@0 { - reg = < 0x00000000 0x40000000 >; + reg = <0x00000000 0x40000000>; }; pinmux@70000000 { @@ -277,7 +277,7 @@ }; serial@70006000 { - clock-frequency = < 216000000 >; + clock-frequency = <216000000>; }; serial@70006040 { diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts index c20d5e93f9c9..9d2bc270b35b 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra-ventana.dts @@ -7,7 +7,7 @@ compatible = "nvidia,ventana", "nvidia,tegra20"; memory { - reg = < 0x00000000 0x40000000 >; + reg = <0x00000000 0x40000000>; }; pinmux@70000000 { @@ -247,14 +247,14 @@ compatible = "wlf,wm8903"; reg = <0x1a>; interrupt-parent = <&gpio>; - interrupts = < 187 0x04 >; + interrupts = <187 0x04>; gpio-controller; #gpio-cells = <2>; micdet-cfg = <0>; micdet-delay = <100>; - gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; }; /* ALS and proximity sensor */ @@ -319,7 +319,7 @@ }; serial@70006300 { - clock-frequency = < 216000000 >; + clock-frequency = <216000000>; }; serial@70006400 { diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index a76c8a85020a..f98be33da708 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -13,8 +13,8 @@ compatible = "arm,cortex-a9-gic"; interrupt-controller; #interrupt-cells = <3>; - reg = < 0x50041000 0x1000 >, - < 0x50040100 0x0100 >; + reg = <0x50041000 0x1000>, + <0x50040100 0x0100>; }; pmu { @@ -26,22 +26,22 @@ apbdma: dma@6000a000 { compatible = "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1200>; - interrupts = < 0 104 0x04 - 0 105 0x04 - 0 106 0x04 - 0 107 0x04 - 0 108 0x04 - 0 109 0x04 - 0 110 0x04 - 0 111 0x04 - 0 112 0x04 - 0 113 0x04 - 0 114 0x04 - 0 115 0x04 - 0 116 0x04 - 0 117 0x04 - 0 118 0x04 - 0 119 0x04 >; + interrupts = <0 104 0x04 + 0 105 0x04 + 0 106 0x04 + 0 107 0x04 + 0 108 0x04 + 0 109 0x04 + 0 110 0x04 + 0 111 0x04 + 0 112 0x04 + 0 113 0x04 + 0 114 0x04 + 0 115 0x04 + 0 116 0x04 + 0 117 0x04 + 0 118 0x04 + 0 119 0x04>; }; i2c@7000c000 { @@ -49,7 +49,7 @@ #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; reg = <0x7000C000 0x100>; - interrupts = < 0 38 0x04 >; + interrupts = <0 38 0x04>; }; i2c@7000c400 { @@ -57,7 +57,7 @@ #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; reg = <0x7000C400 0x100>; - interrupts = < 0 84 0x04 >; + interrupts = <0 84 0x04>; }; i2c@7000c500 { @@ -65,7 +65,7 @@ #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; reg = <0x7000C500 0x100>; - interrupts = < 0 92 0x04 >; + interrupts = <0 92 0x04>; }; i2c@7000d000 { @@ -73,21 +73,21 @@ #size-cells = <0>; compatible = "nvidia,tegra20-i2c-dvc"; reg = <0x7000D000 0x200>; - interrupts = < 0 53 0x04 >; + interrupts = <0 53 0x04>; }; tegra_i2s1: i2s@70002800 { compatible = "nvidia,tegra20-i2s"; reg = <0x70002800 0x200>; - interrupts = < 0 13 0x04 >; - nvidia,dma-request-selector = < &apbdma 2 >; + interrupts = <0 13 0x04>; + nvidia,dma-request-selector = <&apbdma 2>; }; tegra_i2s2: i2s@70002a00 { compatible = "nvidia,tegra20-i2s"; reg = <0x70002a00 0x200>; - interrupts = < 0 3 0x04 >; - nvidia,dma-request-selector = < &apbdma 1 >; + interrupts = <0 3 0x04>; + nvidia,dma-request-selector = <&apbdma 1>; }; das@70000c00 { @@ -97,14 +97,14 @@ gpio: gpio@6000d000 { compatible = "nvidia,tegra20-gpio"; - reg = < 0x6000d000 0x1000 >; - interrupts = < 0 32 0x04 - 0 33 0x04 - 0 34 0x04 - 0 35 0x04 - 0 55 0x04 - 0 87 0x04 - 0 89 0x04 >; + reg = <0x6000d000 0x1000>; + interrupts = <0 32 0x04 + 0 33 0x04 + 0 34 0x04 + 0 35 0x04 + 0 55 0x04 + 0 87 0x04 + 0 89 0x04>; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; @@ -113,45 +113,45 @@ pinmux: pinmux@70000000 { compatible = "nvidia,tegra20-pinmux"; - reg = < 0x70000014 0x10 /* Tri-state registers */ - 0x70000080 0x20 /* Mux registers */ - 0x700000a0 0x14 /* Pull-up/down registers */ - 0x70000868 0xa8 >; /* Pad control registers */ + reg = <0x70000014 0x10 /* Tri-state registers */ + 0x70000080 0x20 /* Mux registers */ + 0x700000a0 0x14 /* Pull-up/down registers */ + 0x70000868 0xa8>; /* Pad control registers */ }; serial@70006000 { compatible = "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; reg-shift = <2>; - interrupts = < 0 36 0x04 >; + interrupts = <0 36 0x04>; }; serial@70006040 { compatible = "nvidia,tegra20-uart"; reg = <0x70006040 0x40>; reg-shift = <2>; - interrupts = < 0 37 0x04 >; + interrupts = <0 37 0x04>; }; serial@70006200 { compatible = "nvidia,tegra20-uart"; reg = <0x70006200 0x100>; reg-shift = <2>; - interrupts = < 0 46 0x04 >; + interrupts = <0 46 0x04>; }; serial@70006300 { compatible = "nvidia,tegra20-uart"; reg = <0x70006300 0x100>; reg-shift = <2>; - interrupts = < 0 90 0x04 >; + interrupts = <0 90 0x04>; }; serial@70006400 { compatible = "nvidia,tegra20-uart"; reg = <0x70006400 0x100>; reg-shift = <2>; - interrupts = < 0 91 0x04 >; + interrupts = <0 91 0x04>; }; emc@7000f400 { @@ -164,31 +164,31 @@ sdhci@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; - interrupts = < 0 14 0x04 >; + interrupts = <0 14 0x04>; }; sdhci@c8000200 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000200 0x200>; - interrupts = < 0 15 0x04 >; + interrupts = <0 15 0x04>; }; sdhci@c8000400 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000400 0x200>; - interrupts = < 0 19 0x04 >; + interrupts = <0 19 0x04>; }; sdhci@c8000600 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000600 0x200>; - interrupts = < 0 31 0x04 >; + interrupts = <0 31 0x04>; }; usb@c5000000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5000000 0x4000>; - interrupts = < 0 20 0x04 >; + interrupts = <0 20 0x04>; phy_type = "utmi"; nvidia,has-legacy-mode; }; @@ -196,14 +196,14 @@ usb@c5004000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5004000 0x4000>; - interrupts = < 0 21 0x04 >; + interrupts = <0 21 0x04>; phy_type = "ulpi"; }; usb@c5008000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5008000 0x4000>; - interrupts = < 0 97 0x04 >; + interrupts = <0 97 0x04>; phy_type = "utmi"; }; @@ -225,4 +225,3 @@ 0x58000000 0x02000000>; /* GART aperture */ }; }; - diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index e9792ac03635..5dd6556fce01 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -13,8 +13,8 @@ compatible = "arm,cortex-a9-gic"; interrupt-controller; #interrupt-cells = <3>; - reg = < 0x50041000 0x1000 >, - < 0x50040100 0x0100 >; + reg = <0x50041000 0x1000>, + <0x50040100 0x0100>; }; pmu { @@ -28,38 +28,38 @@ apbdma: dma@6000a000 { compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1400>; - interrupts = < 0 104 0x04 - 0 105 0x04 - 0 106 0x04 - 0 107 0x04 - 0 108 0x04 - 0 109 0x04 - 0 110 0x04 - 0 111 0x04 - 0 112 0x04 - 0 113 0x04 - 0 114 0x04 - 0 115 0x04 - 0 116 0x04 - 0 117 0x04 - 0 118 0x04 - 0 119 0x04 - 0 128 0x04 - 0 129 0x04 - 0 130 0x04 - 0 131 0x04 - 0 132 0x04 - 0 133 0x04 - 0 134 0x04 - 0 135 0x04 - 0 136 0x04 - 0 137 0x04 - 0 138 0x04 - 0 139 0x04 - 0 140 0x04 - 0 141 0x04 - 0 142 0x04 - 0 143 0x04 >; + interrupts = <0 104 0x04 + 0 105 0x04 + 0 106 0x04 + 0 107 0x04 + 0 108 0x04 + 0 109 0x04 + 0 110 0x04 + 0 111 0x04 + 0 112 0x04 + 0 113 0x04 + 0 114 0x04 + 0 115 0x04 + 0 116 0x04 + 0 117 0x04 + 0 118 0x04 + 0 119 0x04 + 0 128 0x04 + 0 129 0x04 + 0 130 0x04 + 0 131 0x04 + 0 132 0x04 + 0 133 0x04 + 0 134 0x04 + 0 135 0x04 + 0 136 0x04 + 0 137 0x04 + 0 138 0x04 + 0 139 0x04 + 0 140 0x04 + 0 141 0x04 + 0 142 0x04 + 0 143 0x04>; }; i2c@7000c000 { @@ -67,7 +67,7 @@ #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000C000 0x100>; - interrupts = < 0 38 0x04 >; + interrupts = <0 38 0x04>; }; i2c@7000c400 { @@ -75,7 +75,7 @@ #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000C400 0x100>; - interrupts = < 0 84 0x04 >; + interrupts = <0 84 0x04>; }; i2c@7000c500 { @@ -83,7 +83,7 @@ #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000C500 0x100>; - interrupts = < 0 92 0x04 >; + interrupts = <0 92 0x04>; }; i2c@7000c700 { @@ -91,7 +91,7 @@ #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c700 0x100>; - interrupts = < 0 120 0x04 >; + interrupts = <0 120 0x04>; }; i2c@7000d000 { @@ -99,20 +99,20 @@ #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000D000 0x100>; - interrupts = < 0 53 0x04 >; + interrupts = <0 53 0x04>; }; gpio: gpio@6000d000 { compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; - reg = < 0x6000d000 0x1000 >; - interrupts = < 0 32 0x04 - 0 33 0x04 - 0 34 0x04 - 0 35 0x04 - 0 55 0x04 - 0 87 0x04 - 0 89 0x04 - 0 125 0x04 >; + reg = <0x6000d000 0x1000>; + interrupts = <0 32 0x04 + 0 33 0x04 + 0 34 0x04 + 0 35 0x04 + 0 55 0x04 + 0 87 0x04 + 0 89 0x04 + 0 125 0x04>; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; @@ -123,71 +123,71 @@ compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; reg-shift = <2>; - interrupts = < 0 36 0x04 >; + interrupts = <0 36 0x04>; }; serial@70006040 { compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; reg = <0x70006040 0x40>; reg-shift = <2>; - interrupts = < 0 37 0x04 >; + interrupts = <0 37 0x04>; }; serial@70006200 { compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; reg = <0x70006200 0x100>; reg-shift = <2>; - interrupts = < 0 46 0x04 >; + interrupts = <0 46 0x04>; }; serial@70006300 { compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; reg = <0x70006300 0x100>; reg-shift = <2>; - interrupts = < 0 90 0x04 >; + interrupts = <0 90 0x04>; }; serial@70006400 { compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; reg = <0x70006400 0x100>; reg-shift = <2>; - interrupts = < 0 91 0x04 >; + interrupts = <0 91 0x04>; }; sdhci@78000000 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000000 0x200>; - interrupts = < 0 14 0x04 >; + interrupts = <0 14 0x04>; }; sdhci@78000200 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000200 0x200>; - interrupts = < 0 15 0x04 >; + interrupts = <0 15 0x04>; }; sdhci@78000400 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000400 0x200>; - interrupts = < 0 19 0x04 >; + interrupts = <0 19 0x04>; }; sdhci@78000600 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000600 0x200>; - interrupts = < 0 31 0x04 >; + interrupts = <0 31 0x04>; }; pinmux: pinmux@70000000 { compatible = "nvidia,tegra30-pinmux"; - reg = < 0x70000868 0xd0 /* Pad control registers */ - 0x70003000 0x3e0 >; /* Mux registers */ + reg = <0x70000868 0xd0 /* Pad control registers */ + 0x70003000 0x3e0>; /* Mux registers */ }; ahub { compatible = "nvidia,tegra30-ahub"; reg = <0x70080000 0x200 0x70080200 0x100>; - interrupts = < 0 103 0x04 >; + interrupts = <0 103 0x04>; nvidia,dma-request-selector = <&apbdma 1>; ranges; -- cgit v1.2.1 From f9eb26a4e11c63bba2fb71b58dff5ed6f33091f9 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 16:17:47 -0600 Subject: ARM: dt: tegra: remove unnecessary unit addresses DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-cardhu.dts | 4 ++-- arch/arm/boot/dts/tegra-harmony.dts | 6 +++--- arch/arm/boot/dts/tegra-paz00.dts | 6 +++--- arch/arm/boot/dts/tegra-seaboard.dts | 4 ++-- arch/arm/boot/dts/tegra-trimslice.dts | 4 ++-- arch/arm/boot/dts/tegra-ventana.dts | 2 +- arch/arm/boot/dts/tegra20.dtsi | 16 ++++++++-------- arch/arm/boot/dts/tegra30.dtsi | 12 ++++++------ 8 files changed, 27 insertions(+), 27 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index 378b65e186e8..653d62891791 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -10,7 +10,7 @@ reg = <0x80000000 0x40000000>; }; - pinmux@70000000 { + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -156,7 +156,7 @@ support-8bit; }; - ahub@70080000 { + ahub { i2s@70080300 { status = "disable"; }; diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts index 04647b3175db..759e289e7f87 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra-harmony.dts @@ -6,11 +6,11 @@ model = "NVIDIA Tegra2 Harmony evaluation board"; compatible = "nvidia,harmony", "nvidia,tegra20"; - memory@0 { + memory { reg = <0x00000000 0x40000000>; }; - pinmux@70000000 { + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -234,7 +234,7 @@ }; }; - pmc@7000f400 { + pmc { nvidia,invert-interrupt; }; diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index 34a917710e09..4983ef116831 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -6,11 +6,11 @@ model = "Toshiba AC100 / Dynabook AZ"; compatible = "compal,paz00", "nvidia,tegra20"; - memory@0 { + memory { reg = <0x00000000 0x20000000>; }; - pinmux@70000000 { + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -245,7 +245,7 @@ status = "disable"; }; - nvec@7000c500 { + nvec { #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,nvec"; diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index d4cbd8054c07..ea93332ef9a0 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -11,7 +11,7 @@ reg = <0x00000000 0x40000000>; }; - pinmux@70000000 { + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -411,7 +411,7 @@ }; }; - emc@7000f400 { + emc { emc-table@190000 { reg = <190000>; compatible = "nvidia,tegra20-emc-table"; diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index 7181a5e9e48b..4436b42be4a2 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -6,11 +6,11 @@ model = "Compulab TrimSlice board"; compatible = "compulab,trimslice", "nvidia,tegra20"; - memory@0 { + memory { reg = <0x00000000 0x40000000>; }; - pinmux@70000000 { + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts index 9d2bc270b35b..0c8d30d9c2fa 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra-ventana.dts @@ -10,7 +10,7 @@ reg = <0x00000000 0x40000000>; }; - pinmux@70000000 { + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index f98be33da708..a6b135164ae0 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -4,12 +4,12 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&intc>; - pmc@7000f400 { + pmc { compatible = "nvidia,tegra20-pmc"; reg = <0x7000e400 0x400>; }; - intc: interrupt-controller@50041000 { + intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; interrupt-controller; #interrupt-cells = <3>; @@ -23,7 +23,7 @@ 0 57 0x04>; }; - apbdma: dma@6000a000 { + apbdma: dma { compatible = "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1200>; interrupts = <0 104 0x04 @@ -90,12 +90,12 @@ nvidia,dma-request-selector = <&apbdma 1>; }; - das@70000c00 { + das { compatible = "nvidia,tegra20-das"; reg = <0x70000c00 0x80>; }; - gpio: gpio@6000d000 { + gpio: gpio { compatible = "nvidia,tegra20-gpio"; reg = <0x6000d000 0x1000>; interrupts = <0 32 0x04 @@ -111,7 +111,7 @@ interrupt-controller; }; - pinmux: pinmux@70000000 { + pinmux: pinmux { compatible = "nvidia,tegra20-pinmux"; reg = <0x70000014 0x10 /* Tri-state registers */ 0x70000080 0x20 /* Mux registers */ @@ -154,7 +154,7 @@ interrupts = <0 91 0x04>; }; - emc@7000f400 { + emc { #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra20-emc"; @@ -207,7 +207,7 @@ phy_type = "utmi"; }; - ahb: ahb@6000c004 { + ahb { compatible = "nvidia,tegra20-ahb"; reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 5dd6556fce01..45547ad82972 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -4,12 +4,12 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; - pmc@7000f400 { + pmc { compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; reg = <0x7000e400 0x400>; }; - intc: interrupt-controller@50041000 { + intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; interrupt-controller; #interrupt-cells = <3>; @@ -25,7 +25,7 @@ 0 147 0x04>; }; - apbdma: dma@6000a000 { + apbdma: dma { compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1400>; interrupts = <0 104 0x04 @@ -102,7 +102,7 @@ interrupts = <0 53 0x04>; }; - gpio: gpio@6000d000 { + gpio: gpio { compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; reg = <0x6000d000 0x1000>; interrupts = <0 32 0x04 @@ -178,7 +178,7 @@ interrupts = <0 31 0x04>; }; - pinmux: pinmux@70000000 { + pinmux: pinmux { compatible = "nvidia,tegra30-pinmux"; reg = <0x70000868 0xd0 /* Pad control registers */ 0x70003000 0x3e0>; /* Mux registers */ @@ -225,7 +225,7 @@ }; }; - ahb: ahb@6000c004 { + ahb: ahb { compatible = "nvidia,tegra30-ahb"; reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ }; -- cgit v1.2.1 From c44e438a7ff53b14d0fc433258b93948e1884f22 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 16:21:10 -0600 Subject: ARM: dt: tegra: gpio comment cleanup Ensure that all Tegraa GPIO specifiers contain a comment indicating which GPIO name the number refers to. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-paz00.dts | 4 ++-- arch/arm/boot/dts/tegra-trimslice.dts | 4 ++-- arch/arm/boot/dts/tegra-ventana.dts | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index 4983ef116831..03b2e65c4278 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -252,7 +252,7 @@ reg = <0x7000C500 0x100>; interrupts = <0 92 0x04>; clock-frequency = <80000>; - request-gpios = <&gpio 170 0>; + request-gpios = <&gpio 170 0>; /* gpio PV2 */ slave-addr = <138>; }; @@ -343,7 +343,7 @@ wifi { label = "wifi-led"; - gpios = <&gpio 24 0>; + gpios = <&gpio 24 0>; /* gpio PD0 */ linux,default-trigger = "rfkill0"; }; }; diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index 4436b42be4a2..eebcf504d12d 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -305,8 +305,8 @@ }; sdhci@c8000600 { - cd-gpios = <&gpio 121 0>; - wp-gpios = <&gpio 122 0>; + cd-gpios = <&gpio 121 0>; /* gpio PP1 */ + wp-gpios = <&gpio 122 0>; /* gpio PP2 */ }; usb@c5004000 { diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts index 0c8d30d9c2fa..e64318d595d5 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra-ventana.dts @@ -302,7 +302,7 @@ nvidia,spkr-en-gpios = <&wm8903 2 0>; nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ - nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ + nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */ nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ }; -- cgit v1.2.1 From 5ff488875b982f5a1acc02ba74b23d2802d2613a Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 16:26:03 -0600 Subject: ARM: dt: tegra: format regs properties consistently Place each reg "entry" on its own line, and wrap the whole list in <> rather than each individual entry. The convention chosen here is slightly arbitrary, but is not consistent throughout all Tegra files. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra20.dtsi | 4 ++-- arch/arm/boot/dts/tegra30.dtsi | 7 ++++--- 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index a6b135164ae0..7f718bd03452 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -13,8 +13,8 @@ compatible = "arm,cortex-a9-gic"; interrupt-controller; #interrupt-cells = <3>; - reg = <0x50041000 0x1000>, - <0x50040100 0x0100>; + reg = <0x50041000 0x1000 + 0x50040100 0x0100>; }; pmu { diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 45547ad82972..b52378a06fb3 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -13,8 +13,8 @@ compatible = "arm,cortex-a9-gic"; interrupt-controller; #interrupt-cells = <3>; - reg = <0x50041000 0x1000>, - <0x50040100 0x0100>; + reg = <0x50041000 0x1000 + 0x50040100 0x0100>; }; pmu { @@ -186,7 +186,8 @@ ahub { compatible = "nvidia,tegra30-ahub"; - reg = <0x70080000 0x200 0x70080200 0x100>; + reg = <0x70080000 0x200 + 0x70080200 0x100>; interrupts = <0 103 0x04>; nvidia,dma-request-selector = <&apbdma 1>; -- cgit v1.2.1 From ba04c289bc9bae0f381797f58615c7b3989c5e8c Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 16:28:59 -0600 Subject: ARM: dt: tegra: consistenly use lower-case for hex constants Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-paz00.dts | 2 +- arch/arm/boot/dts/tegra20.dtsi | 8 ++++---- arch/arm/boot/dts/tegra30.dtsi | 8 ++++---- 3 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index 03b2e65c4278..d469322afbb8 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -249,7 +249,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,nvec"; - reg = <0x7000C500 0x100>; + reg = <0x7000c500 0x100>; interrupts = <0 92 0x04>; clock-frequency = <80000>; request-gpios = <&gpio 170 0>; /* gpio PV2 */ diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 7f718bd03452..5f9110af43b1 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -48,7 +48,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; - reg = <0x7000C000 0x100>; + reg = <0x7000c000 0x100>; interrupts = <0 38 0x04>; }; @@ -56,7 +56,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; - reg = <0x7000C400 0x100>; + reg = <0x7000c400 0x100>; interrupts = <0 84 0x04>; }; @@ -64,7 +64,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; - reg = <0x7000C500 0x100>; + reg = <0x7000c500 0x100>; interrupts = <0 92 0x04>; }; @@ -72,7 +72,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra20-i2c-dvc"; - reg = <0x7000D000 0x200>; + reg = <0x7000d000 0x200>; interrupts = <0 53 0x04>; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index b52378a06fb3..ea829f5bae01 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -66,7 +66,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000C000 0x100>; + reg = <0x7000c000 0x100>; interrupts = <0 38 0x04>; }; @@ -74,7 +74,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000C400 0x100>; + reg = <0x7000c400 0x100>; interrupts = <0 84 0x04>; }; @@ -82,7 +82,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000C500 0x100>; + reg = <0x7000c500 0x100>; interrupts = <0 92 0x04>; }; @@ -98,7 +98,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000D000 0x100>; + reg = <0x7000d000 0x100>; interrupts = <0 53 0x04>; }; -- cgit v1.2.1 From 2f32b1faa8c75e2e987c5b714ae25491d8477da5 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 17:06:44 -0600 Subject: ARM: dt: tegra: remove duplicate device_type property It's already specified in skeleton.dtsi, included via tegra20.dtsi. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-seaboard.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index ea93332ef9a0..c935a2871846 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -7,7 +7,6 @@ compatible = "nvidia,seaboard", "nvidia,tegra20"; memory { - device_type = "memory"; reg = <0x00000000 0x40000000>; }; -- cgit v1.2.1 From c04abb3a07b56db4756b6f970609e65a8624b0a3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 17:03:26 -0600 Subject: ARM: dt: tegra: sort nodes based on bus order Sort the nodes according to the following rules: * First, any overrides for properties or nodes created by included files, in the order they appeared in the include file. * Second, any nodes with a reg property, in numerical order. * Third, any nodes without a reg property, in alphabetical order of node name. The second sorting rule at least will probably help if/when we need to explicitly insert nodes for the various busses in Tegra; that will just be an indentation change rather than also a node re-ordering. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-cardhu.dts | 36 +++---- arch/arm/boot/dts/tegra-harmony.dts | 96 +++++++++--------- arch/arm/boot/dts/tegra-paz00.dts | 88 ++++++++-------- arch/arm/boot/dts/tegra-seaboard.dts | 164 +++++++++++++++--------------- arch/arm/boot/dts/tegra-trimslice.dts | 60 +++++------ arch/arm/boot/dts/tegra-ventana.dts | 86 ++++++++-------- arch/arm/boot/dts/tegra20.dtsi | 182 +++++++++++++++++----------------- arch/arm/boot/dts/tegra30.dtsi | 178 ++++++++++++++++----------------- 8 files changed, 445 insertions(+), 445 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index 653d62891791..3b5cd7b07553 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -138,24 +138,6 @@ }; }; - sdhci@78000000 { - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ - wp-gpios = <&gpio 155 0>; /* gpio PT3 */ - power-gpios = <&gpio 31 0>; /* gpio PD7 */ - }; - - sdhci@78000200 { - status = "disable"; - }; - - sdhci@78000400 { - status = "disable"; - }; - - sdhci@78000600 { - support-8bit; - }; - ahub { i2s@70080300 { status = "disable"; @@ -174,6 +156,24 @@ }; }; + sdhci@78000000 { + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 155 0>; /* gpio PT3 */ + power-gpios = <&gpio 31 0>; /* gpio PD7 */ + }; + + sdhci@78000200 { + status = "disable"; + }; + + sdhci@78000400 { + status = "disable"; + }; + + sdhci@78000600 { + support-8bit; + }; + sound { compatible = "nvidia,tegra-audio-wm8903-cardhu", "nvidia,tegra-audio-wm8903"; diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts index 759e289e7f87..f18385d36dde 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra-harmony.dts @@ -234,8 +234,28 @@ }; }; - pmc { - nvidia,invert-interrupt; + i2s@70002a00 { + status = "disable"; + }; + + serial@70006000 { + status = "disable"; + }; + + serial@70006040 { + status = "disable"; + }; + + serial@70006200 { + status = "disable"; + }; + + serial@70006300 { + clock-frequency = <216000000>; + }; + + serial@70006400 { + status = "disable"; }; i2c@7000c000 { @@ -268,52 +288,12 @@ clock-frequency = <400000>; }; - i2s@70002a00 { - status = "disable"; - }; - - sound { - compatible = "nvidia,tegra-audio-wm8903-harmony", - "nvidia,tegra-audio-wm8903"; - nvidia,model = "NVIDIA Tegra Harmony"; - - nvidia,audio-routing = - "Headphone Jack", "HPOUTR", - "Headphone Jack", "HPOUTL", - "Int Spk", "ROP", - "Int Spk", "RON", - "Int Spk", "LOP", - "Int Spk", "LON", - "Mic Jack", "MICBIAS", - "IN1L", "Mic Jack"; - - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&wm8903>; - - nvidia,spkr-en-gpios = <&wm8903 2 0>; - nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ - nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ - nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ - }; - - serial@70006000 { - status = "disable"; - }; - - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; - }; - - serial@70006300 { - clock-frequency = <216000000>; + pmc { + nvidia,invert-interrupt; }; - serial@70006400 { - status = "disable"; + usb@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ }; sdhci@c8000000 { @@ -337,7 +317,27 @@ support-8bit; }; - usb@c5004000 { - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + sound { + compatible = "nvidia,tegra-audio-wm8903-harmony", + "nvidia,tegra-audio-wm8903"; + nvidia,model = "NVIDIA Tegra Harmony"; + + nvidia,audio-routing = + "Headphone Jack", "HPOUTR", + "Headphone Jack", "HPOUTL", + "Int Spk", "ROP", + "Int Spk", "RON", + "Int Spk", "LOP", + "Int Spk", "LON", + "Mic Jack", "MICBIAS", + "IN1L", "Mic Jack"; + + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 0>; + nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ + nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ }; }; diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index d469322afbb8..b500212cc01c 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -226,6 +226,30 @@ }; }; + i2s@70002a00 { + status = "disable"; + }; + + serial@70006000 { + clock-frequency = <216000000>; + }; + + serial@70006040 { + status = "disable"; + }; + + serial@70006200 { + clock-frequency = <216000000>; + }; + + serial@70006300 { + status = "disable"; + }; + + serial@70006400 { + status = "disable"; + }; + i2c@7000c000 { clock-frequency = <400000>; @@ -265,48 +289,8 @@ }; }; - i2s@70002a00 { - status = "disable"; - }; - - sound { - compatible = "nvidia,tegra-audio-alc5632-paz00", - "nvidia,tegra-audio-alc5632"; - - nvidia,model = "Compal PAZ00"; - - nvidia,audio-routing = - "Int Spk", "SPKOUT", - "Int Spk", "SPKOUTN", - "Headset Mic", "MICBIAS1", - "MIC1", "Headset Mic", - "Headset Stereophone", "HPR", - "Headset Stereophone", "HPL", - "DMICDAT", "Digital Mic"; - - nvidia,audio-codec = <&alc5632>; - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ - }; - - serial@70006000 { - clock-frequency = <216000000>; - }; - - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - clock-frequency = <216000000>; - }; - - serial@70006300 { - status = "disable"; - }; - - serial@70006400 { - status = "disable"; + usb@c5004000 { + nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ }; sdhci@c8000000 { @@ -348,7 +332,23 @@ }; }; - usb@c5004000 { - nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ + sound { + compatible = "nvidia,tegra-audio-alc5632-paz00", + "nvidia,tegra-audio-alc5632"; + + nvidia,model = "Compal PAZ00"; + + nvidia,audio-routing = + "Int Spk", "SPKOUT", + "Int Spk", "SPKOUTN", + "Headset Mic", "MICBIAS1", + "MIC1", "Headset Mic", + "Headset Stereophone", "HPR", + "Headset Stereophone", "HPL", + "DMICDAT", "Digital Mic"; + + nvidia,audio-codec = <&alc5632>; + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ }; }; diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index c935a2871846..88f3b8e0c8c0 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -257,6 +257,30 @@ }; }; + i2s@70002a00 { + status = "disable"; + }; + + serial@70006000 { + status = "disable"; + }; + + serial@70006040 { + status = "disable"; + }; + + serial@70006200 { + status = "disable"; + }; + + serial@70006300 { + clock-frequency = <216000000>; + }; + + serial@70006400 { + status = "disable"; + }; + i2c@7000c000 { clock-frequency = <400000>; @@ -321,50 +345,51 @@ }; }; - i2s@70002a00 { - status = "disable"; - }; - - sound { - compatible = "nvidia,tegra-audio-wm8903-seaboard", - "nvidia,tegra-audio-wm8903"; - nvidia,model = "NVIDIA Tegra Seaboard"; - - nvidia,audio-routing = - "Headphone Jack", "HPOUTR", - "Headphone Jack", "HPOUTL", - "Int Spk", "ROP", - "Int Spk", "RON", - "Int Spk", "LOP", - "Int Spk", "LON", - "Mic Jack", "MICBIAS", - "IN1R", "Mic Jack"; - - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&wm8903>; - - nvidia,spkr-en-gpios = <&wm8903 2 0>; - nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ - }; - - serial@70006000 { - status = "disable"; - }; - - serial@70006040 { - status = "disable"; - }; + emc { + emc-table@190000 { + reg = <190000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <190000>; + nvidia,emc-registers = <0x0000000c 0x00000026 + 0x00000009 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000c 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x0000059f + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x0000000b 0x000000c8 + 0x00000003 0x00000007 0x00000004 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xa06204ae + 0x007dc010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; - serial@70006200 { - status = "disable"; + emc-table@380000 { + reg = <380000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <380000>; + nvidia,emc-registers = <0x00000017 0x0000004b + 0x00000012 0x00000006 0x00000004 0x00000005 + 0x00000003 0x0000000c 0x00000006 0x00000006 + 0x00000003 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x00000b5f + 0x00000000 0x00000003 0x00000003 0x00000006 + 0x00000006 0x00000001 0x00000011 0x000000c8 + 0x00000003 0x0000000e 0x00000007 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xe044048b + 0x007d8010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; }; - serial@70006300 { - clock-frequency = <216000000>; + usb@c5000000 { + nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ + dr_mode = "otg"; }; - serial@70006400 { - status = "disable"; + usb@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ }; sdhci@c8000000 { @@ -385,11 +410,6 @@ support-8bit; }; - usb@c5000000 { - nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ - dr_mode = "otg"; - }; - gpio-keys { compatible = "gpio-keys"; @@ -410,45 +430,25 @@ }; }; - emc { - emc-table@190000 { - reg = <190000>; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = <190000>; - nvidia,emc-registers = <0x0000000c 0x00000026 - 0x00000009 0x00000003 0x00000004 0x00000004 - 0x00000002 0x0000000c 0x00000003 0x00000003 - 0x00000002 0x00000001 0x00000004 0x00000005 - 0x00000004 0x00000009 0x0000000d 0x0000059f - 0x00000000 0x00000003 0x00000003 0x00000003 - 0x00000003 0x00000001 0x0000000b 0x000000c8 - 0x00000003 0x00000007 0x00000004 0x0000000f - 0x00000002 0x00000000 0x00000000 0x00000002 - 0x00000000 0x00000000 0x00000083 0xa06204ae - 0x007dc010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000>; - }; + sound { + compatible = "nvidia,tegra-audio-wm8903-seaboard", + "nvidia,tegra-audio-wm8903"; + nvidia,model = "NVIDIA Tegra Seaboard"; - emc-table@380000 { - reg = <380000>; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = <380000>; - nvidia,emc-registers = <0x00000017 0x0000004b - 0x00000012 0x00000006 0x00000004 0x00000005 - 0x00000003 0x0000000c 0x00000006 0x00000006 - 0x00000003 0x00000001 0x00000004 0x00000005 - 0x00000004 0x00000009 0x0000000d 0x00000b5f - 0x00000000 0x00000003 0x00000003 0x00000006 - 0x00000006 0x00000001 0x00000011 0x000000c8 - 0x00000003 0x0000000e 0x00000007 0x0000000f - 0x00000002 0x00000000 0x00000000 0x00000002 - 0x00000000 0x00000000 0x00000083 0xe044048b - 0x007d8010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000>; - }; - }; + nvidia,audio-routing = + "Headphone Jack", "HPOUTR", + "Headphone Jack", "HPOUTL", + "Int Spk", "ROP", + "Int Spk", "RON", + "Int Spk", "LOP", + "Int Spk", "LON", + "Mic Jack", "MICBIAS", + "IN1R", "Mic Jack"; - usb@c5004000 { - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 0>; + nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ }; }; diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index eebcf504d12d..1dea6cc68dde 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -240,6 +240,30 @@ }; }; + i2s@70002a00 { + status = "disable"; + }; + + serial@70006000 { + clock-frequency = <216000000>; + }; + + serial@70006040 { + status = "disable"; + }; + + serial@70006200 { + status = "disable"; + }; + + serial@70006300 { + status = "disable"; + }; + + serial@70006400 { + status = "disable"; + }; + i2c@7000c000 { clock-frequency = <400000>; }; @@ -266,34 +290,8 @@ status = "disable"; }; - i2s@70002a00 { - status = "disable"; - }; - - sound { - compatible = "nvidia,tegra-audio-trimslice"; - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&codec>; - }; - - serial@70006000 { - clock-frequency = <216000000>; - }; - - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; - }; - - serial@70006300 { - status = "disable"; - }; - - serial@70006400 { - status = "disable"; + usb@c5004000 { + nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ }; sdhci@c8000200 { @@ -309,7 +307,9 @@ wp-gpios = <&gpio 122 0>; /* gpio PP2 */ }; - usb@c5004000 { - nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ + sound { + compatible = "nvidia,tegra-audio-trimslice"; + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&codec>; }; }; diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts index e64318d595d5..6de4c106024f 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra-ventana.dts @@ -240,6 +240,30 @@ }; }; + i2s@70002a00 { + status = "disable"; + }; + + serial@70006000 { + status = "disable"; + }; + + serial@70006040 { + status = "disable"; + }; + + serial@70006200 { + status = "disable"; + }; + + serial@70006300 { + clock-frequency = <216000000>; + }; + + serial@70006400 { + status = "disable"; + }; + i2c@7000c000 { clock-frequency = <400000>; @@ -278,10 +302,28 @@ clock-frequency = <400000>; }; - i2s@70002a00 { + usb@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + }; + + sdhci@c8000000 { status = "disable"; }; + sdhci@c8000200 { + status = "disable"; + }; + + sdhci@c8000400 { + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + }; + + sdhci@c8000600 { + support-8bit; + }; + sound { compatible = "nvidia,tegra-audio-wm8903-ventana", "nvidia,tegra-audio-wm8903"; @@ -305,46 +347,4 @@ nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */ nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ }; - - serial@70006000 { - status = "disable"; - }; - - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; - }; - - serial@70006300 { - clock-frequency = <216000000>; - }; - - serial@70006400 { - status = "disable"; - }; - - sdhci@c8000000 { - status = "disable"; - }; - - sdhci@c8000200 { - status = "disable"; - }; - - sdhci@c8000400 { - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ - wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 70 0>; /* gpio PI6 */ - }; - - sdhci@c8000600 { - support-8bit; - }; - - usb@c5004000 { - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ - }; }; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 5f9110af43b1..0e371f92d1d2 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -4,11 +4,6 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&intc>; - pmc { - compatible = "nvidia,tegra20-pmc"; - reg = <0x7000e400 0x400>; - }; - intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; interrupt-controller; @@ -17,12 +12,6 @@ 0x50040100 0x0100>; }; - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupts = <0 56 0x04 - 0 57 0x04>; - }; - apbdma: dma { compatible = "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1200>; @@ -44,55 +33,9 @@ 0 119 0x04>; }; - i2c@7000c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra20-i2c"; - reg = <0x7000c000 0x100>; - interrupts = <0 38 0x04>; - }; - - i2c@7000c400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra20-i2c"; - reg = <0x7000c400 0x100>; - interrupts = <0 84 0x04>; - }; - - i2c@7000c500 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra20-i2c"; - reg = <0x7000c500 0x100>; - interrupts = <0 92 0x04>; - }; - - i2c@7000d000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra20-i2c-dvc"; - reg = <0x7000d000 0x200>; - interrupts = <0 53 0x04>; - }; - - tegra_i2s1: i2s@70002800 { - compatible = "nvidia,tegra20-i2s"; - reg = <0x70002800 0x200>; - interrupts = <0 13 0x04>; - nvidia,dma-request-selector = <&apbdma 2>; - }; - - tegra_i2s2: i2s@70002a00 { - compatible = "nvidia,tegra20-i2s"; - reg = <0x70002a00 0x200>; - interrupts = <0 3 0x04>; - nvidia,dma-request-selector = <&apbdma 1>; - }; - - das { - compatible = "nvidia,tegra20-das"; - reg = <0x70000c00 0x80>; + ahb { + compatible = "nvidia,tegra20-ahb"; + reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ }; gpio: gpio { @@ -119,6 +62,25 @@ 0x70000868 0xa8>; /* Pad control registers */ }; + das { + compatible = "nvidia,tegra20-das"; + reg = <0x70000c00 0x80>; + }; + + tegra_i2s1: i2s@70002800 { + compatible = "nvidia,tegra20-i2s"; + reg = <0x70002800 0x200>; + interrupts = <0 13 0x04>; + nvidia,dma-request-selector = <&apbdma 2>; + }; + + tegra_i2s2: i2s@70002a00 { + compatible = "nvidia,tegra20-i2s"; + reg = <0x70002a00 0x200>; + interrupts = <0 3 0x04>; + nvidia,dma-request-selector = <&apbdma 1>; + }; + serial@70006000 { compatible = "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; @@ -154,35 +116,61 @@ interrupts = <0 91 0x04>; }; - emc { + i2c@7000c000 { #address-cells = <1>; #size-cells = <0>; - compatible = "nvidia,tegra20-emc"; - reg = <0x7000f400 0x200>; + compatible = "nvidia,tegra20-i2c"; + reg = <0x7000c000 0x100>; + interrupts = <0 38 0x04>; }; - sdhci@c8000000 { - compatible = "nvidia,tegra20-sdhci"; - reg = <0xc8000000 0x200>; - interrupts = <0 14 0x04>; + i2c@7000c400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra20-i2c"; + reg = <0x7000c400 0x100>; + interrupts = <0 84 0x04>; }; - sdhci@c8000200 { - compatible = "nvidia,tegra20-sdhci"; - reg = <0xc8000200 0x200>; - interrupts = <0 15 0x04>; + i2c@7000c500 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra20-i2c"; + reg = <0x7000c500 0x100>; + interrupts = <0 92 0x04>; }; - sdhci@c8000400 { - compatible = "nvidia,tegra20-sdhci"; - reg = <0xc8000400 0x200>; - interrupts = <0 19 0x04>; + i2c@7000d000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra20-i2c-dvc"; + reg = <0x7000d000 0x200>; + interrupts = <0 53 0x04>; }; - sdhci@c8000600 { - compatible = "nvidia,tegra20-sdhci"; - reg = <0xc8000600 0x200>; - interrupts = <0 31 0x04>; + pmc { + compatible = "nvidia,tegra20-pmc"; + reg = <0x7000e400 0x400>; + }; + + mc { + compatible = "nvidia,tegra20-mc"; + reg = <0x7000f000 0x024 + 0x7000f03c 0x3c4>; + interrupts = <0 77 0x04>; + }; + + gart { + compatible = "nvidia,tegra20-gart"; + reg = <0x7000f024 0x00000018 /* controller registers */ + 0x58000000 0x02000000>; /* GART aperture */ + }; + + emc { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra20-emc"; + reg = <0x7000f400 0x200>; }; usb@c5000000 { @@ -207,21 +195,33 @@ phy_type = "utmi"; }; - ahb { - compatible = "nvidia,tegra20-ahb"; - reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ + sdhci@c8000000 { + compatible = "nvidia,tegra20-sdhci"; + reg = <0xc8000000 0x200>; + interrupts = <0 14 0x04>; }; - mc { - compatible = "nvidia,tegra20-mc"; - reg = <0x7000f000 0x024 - 0x7000f03c 0x3c4>; - interrupts = <0 77 0x04>; + sdhci@c8000200 { + compatible = "nvidia,tegra20-sdhci"; + reg = <0xc8000200 0x200>; + interrupts = <0 15 0x04>; }; - gart { - compatible = "nvidia,tegra20-gart"; - reg = <0x7000f024 0x00000018 /* controller registers */ - 0x58000000 0x02000000>; /* GART aperture */ + sdhci@c8000400 { + compatible = "nvidia,tegra20-sdhci"; + reg = <0xc8000400 0x200>; + interrupts = <0 19 0x04>; + }; + + sdhci@c8000600 { + compatible = "nvidia,tegra20-sdhci"; + reg = <0xc8000600 0x200>; + interrupts = <0 31 0x04>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 56 0x04 + 0 57 0x04>; }; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index ea829f5bae01..9fb47adc935d 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -4,11 +4,6 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; - pmc { - compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; - reg = <0x7000e400 0x400>; - }; - intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; interrupt-controller; @@ -17,14 +12,6 @@ 0x50040100 0x0100>; }; - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupts = <0 144 0x04 - 0 145 0x04 - 0 146 0x04 - 0 147 0x04>; - }; - apbdma: dma { compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1400>; @@ -62,44 +49,9 @@ 0 143 0x04>; }; - i2c@7000c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000c000 0x100>; - interrupts = <0 38 0x04>; - }; - - i2c@7000c400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000c400 0x100>; - interrupts = <0 84 0x04>; - }; - - i2c@7000c500 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000c500 0x100>; - interrupts = <0 92 0x04>; - }; - - i2c@7000c700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000c700 0x100>; - interrupts = <0 120 0x04>; - }; - - i2c@7000d000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; - reg = <0x7000d000 0x100>; - interrupts = <0 53 0x04>; + ahb: ahb { + compatible = "nvidia,tegra30-ahb"; + reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ }; gpio: gpio { @@ -119,6 +71,12 @@ interrupt-controller; }; + pinmux: pinmux { + compatible = "nvidia,tegra30-pinmux"; + reg = <0x70000868 0xd0 /* Pad control registers */ + 0x70003000 0x3e0>; /* Mux registers */ + }; + serial@70006000 { compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; @@ -154,34 +112,68 @@ interrupts = <0 91 0x04>; }; - sdhci@78000000 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; - reg = <0x78000000 0x200>; - interrupts = <0 14 0x04>; + i2c@7000c000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; + reg = <0x7000c000 0x100>; + interrupts = <0 38 0x04>; }; - sdhci@78000200 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; - reg = <0x78000200 0x200>; - interrupts = <0 15 0x04>; + i2c@7000c400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; + reg = <0x7000c400 0x100>; + interrupts = <0 84 0x04>; }; - sdhci@78000400 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; - reg = <0x78000400 0x200>; - interrupts = <0 19 0x04>; + i2c@7000c500 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; + reg = <0x7000c500 0x100>; + interrupts = <0 92 0x04>; }; - sdhci@78000600 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; - reg = <0x78000600 0x200>; - interrupts = <0 31 0x04>; + i2c@7000c700 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; + reg = <0x7000c700 0x100>; + interrupts = <0 120 0x04>; }; - pinmux: pinmux { - compatible = "nvidia,tegra30-pinmux"; - reg = <0x70000868 0xd0 /* Pad control registers */ - 0x70003000 0x3e0>; /* Mux registers */ + i2c@7000d000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; + reg = <0x7000d000 0x100>; + interrupts = <0 53 0x04>; + }; + + pmc { + compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; + reg = <0x7000e400 0x400>; + }; + + mc { + compatible = "nvidia,tegra30-mc"; + reg = <0x7000f000 0x010 + 0x7000f03c 0x1b4 + 0x7000f200 0x028 + 0x7000f284 0x17c>; + interrupts = <0 77 0x04>; + }; + + smmu { + compatible = "nvidia,tegra30-smmu"; + reg = <0x7000f010 0x02c + 0x7000f1f0 0x010 + 0x7000f228 0x05c>; + nvidia,#asids = <4>; /* # of ASIDs */ + dma-window = <0 0x40000000>; /* IOVA start & length */ + nvidia,ahb = <&ahb>; }; ahub { @@ -226,27 +218,35 @@ }; }; - ahb: ahb { - compatible = "nvidia,tegra30-ahb"; - reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ + sdhci@78000000 { + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + reg = <0x78000000 0x200>; + interrupts = <0 14 0x04>; }; - mc { - compatible = "nvidia,tegra30-mc"; - reg = <0x7000f000 0x010 - 0x7000f03c 0x1b4 - 0x7000f200 0x028 - 0x7000f284 0x17c>; - interrupts = <0 77 0x04>; + sdhci@78000200 { + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + reg = <0x78000200 0x200>; + interrupts = <0 15 0x04>; }; - smmu { - compatible = "nvidia,tegra30-smmu"; - reg = <0x7000f010 0x02c - 0x7000f1f0 0x010 - 0x7000f228 0x05c>; - nvidia,#asids = <4>; /* # of ASIDs */ - dma-window = <0 0x40000000>; /* IOVA start & length */ - nvidia,ahb = <&ahb>; + sdhci@78000400 { + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + reg = <0x78000400 0x200>; + interrupts = <0 19 0x04>; + }; + + sdhci@78000600 { + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + reg = <0x78000600 0x200>; + interrupts = <0 31 0x04>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 144 0x04 + 0 145 0x04 + 0 146 0x04 + 0 147 0x04>; }; }; -- cgit v1.2.1 From 2eaab06ea6cc2d686fd1a6de62b1094bedc4cfca Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 17:12:52 -0600 Subject: ARM: dt: tegra: consistent basic property ordering Put properties in order compatible, reg, interrupts, then anything else the node has. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-paz00.dts | 4 ++-- arch/arm/boot/dts/tegra20.dtsi | 24 ++++++++++++------------ arch/arm/boot/dts/tegra30.dtsi | 24 ++++++++++++------------ 3 files changed, 26 insertions(+), 26 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index b500212cc01c..6539e8934802 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -270,11 +270,11 @@ }; nvec { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,nvec"; reg = <0x7000c500 0x100>; interrupts = <0 92 0x04>; + #address-cells = <1>; + #size-cells = <0>; clock-frequency = <80000>; request-gpios = <&gpio 170 0>; /* gpio PV2 */ slave-addr = <138>; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 0e371f92d1d2..df34defe1bbd 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -6,10 +6,10 @@ intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; - interrupt-controller; - #interrupt-cells = <3>; reg = <0x50041000 0x1000 0x50040100 0x0100>; + interrupt-controller; + #interrupt-cells = <3>; }; apbdma: dma { @@ -117,35 +117,35 @@ }; i2c@7000c000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; reg = <0x7000c000 0x100>; interrupts = <0 38 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; i2c@7000c400 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; reg = <0x7000c400 0x100>; interrupts = <0 84 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; i2c@7000c500 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra20-i2c"; reg = <0x7000c500 0x100>; interrupts = <0 92 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; i2c@7000d000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra20-i2c-dvc"; reg = <0x7000d000 0x200>; interrupts = <0 53 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; pmc { @@ -167,10 +167,10 @@ }; emc { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra20-emc"; reg = <0x7000f400 0x200>; + #address-cells = <1>; + #size-cells = <0>; }; usb@c5000000 { diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 9fb47adc935d..5a1c85fbf0f0 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -6,10 +6,10 @@ intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; - interrupt-controller; - #interrupt-cells = <3>; reg = <0x50041000 0x1000 0x50040100 0x0100>; + interrupt-controller; + #interrupt-cells = <3>; }; apbdma: dma { @@ -113,43 +113,43 @@ }; i2c@7000c000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c000 0x100>; interrupts = <0 38 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; i2c@7000c400 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c400 0x100>; interrupts = <0 84 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; i2c@7000c500 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c500 0x100>; interrupts = <0 92 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; i2c@7000c700 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c700 0x100>; interrupts = <0 120 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; i2c@7000d000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000d000 0x100>; interrupts = <0 53 0x04>; + #address-cells = <1>; + #size-cells = <0>; }; pmc { -- cgit v1.2.1 From 2a5fdc9adde8476751b63a795e3d66ae2ee3979d Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 11 May 2012 17:32:56 -0600 Subject: ARM: dt: tegra: invert status=disable vs status=okay In tegra*.dtsi, set status="disable" for all HW modules that the board design may choose not to use. Update all boards to specifically enable any of those modules that are useful by setting status="okay". This makes board files say which features they do use, rather than which they don't, which feels more logical. It also makes the .dts files slightly smaller, at least for existing content. Signed-off-by: Stephen Warren Acked-by: Olof Johansson --- arch/arm/boot/dts/tegra-cardhu.dts | 48 ++++++++--------------------------- arch/arm/boot/dts/tegra-harmony.dts | 40 ++++++++++++----------------- arch/arm/boot/dts/tegra-paz00.dts | 44 +++++++++++++------------------- arch/arm/boot/dts/tegra-seaboard.dts | 37 ++++++++++----------------- arch/arm/boot/dts/tegra-trimslice.dts | 37 ++++++++++----------------- arch/arm/boot/dts/tegra-ventana.dts | 40 ++++++++++++----------------- arch/arm/boot/dts/tegra20.dtsi | 18 +++++++++++++ arch/arm/boot/dts/tegra30.dtsi | 19 ++++++++++++++ 8 files changed, 123 insertions(+), 160 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index 3b5cd7b07553..e14bb450c328 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -64,34 +64,22 @@ }; serial@70006000 { + status = "okay"; clock-frequency = <408000000>; }; - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; - }; - - serial@70006300 { - status = "disable"; - }; - - serial@70006400 { - status = "disable"; - }; - i2c@7000c000 { + status = "okay"; clock-frequency = <100000>; }; i2c@7000c400 { + status = "okay"; clock-frequency = <100000>; }; i2c@7000c500 { + status = "okay"; clock-frequency = <100000>; /* ALS and Proximity sensor */ @@ -104,10 +92,12 @@ }; i2c@7000c700 { + status = "okay"; clock-frequency = <100000>; }; i2c@7000d000 { + status = "okay"; clock-frequency = <100000>; wm8903: wm8903@1a { @@ -139,38 +129,20 @@ }; ahub { - i2s@70080300 { - status = "disable"; - }; - - i2s@70080500 { - status = "disable"; - }; - - i2s@70080600 { - status = "disable"; - }; - - i2s@70080700 { - status = "disable"; + i2s@70080400 { + status = "okay"; }; }; sdhci@78000000 { + status = "okay"; cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 155 0>; /* gpio PT3 */ power-gpios = <&gpio 31 0>; /* gpio PD7 */ }; - sdhci@78000200 { - status = "disable"; - }; - - sdhci@78000400 { - status = "disable"; - }; - sdhci@78000600 { + status = "okay"; support-8bit; }; diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts index f18385d36dde..6bcdad34d2e7 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra-harmony.dts @@ -234,31 +234,17 @@ }; }; - i2s@70002a00 { - status = "disable"; - }; - - serial@70006000 { - status = "disable"; - }; - - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; + i2s@70002800 { + status = "okay"; }; serial@70006300 { + status = "okay"; clock-frequency = <216000000>; }; - serial@70006400 { - status = "disable"; - }; - i2c@7000c000 { + status = "okay"; clock-frequency = <400000>; wm8903: wm8903@1a { @@ -277,14 +263,17 @@ }; i2c@7000c400 { + status = "okay"; clock-frequency = <400000>; }; i2c@7000c500 { + status = "okay"; clock-frequency = <400000>; }; i2c@7000d000 { + status = "okay"; clock-frequency = <400000>; }; @@ -292,25 +281,28 @@ nvidia,invert-interrupt; }; + usb@c5000000 { + status = "okay"; + }; + usb@c5004000 { + status = "okay"; nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ }; - sdhci@c8000000 { - status = "disable"; + usb@c5008000 { + status = "okay"; }; sdhci@c8000200 { + status = "okay"; cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 155 0>; /* gpio PT3 */ }; - sdhci@c8000400 { - status = "disable"; - }; - sdhci@c8000600 { + status = "okay"; cd-gpios = <&gpio 58 0>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index 6539e8934802..cb366f0c6ffe 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -226,31 +226,22 @@ }; }; - i2s@70002a00 { - status = "disable"; + i2s@70002800 { + status = "okay"; }; serial@70006000 { + status = "okay"; clock-frequency = <216000000>; }; - serial@70006040 { - status = "disable"; - }; - serial@70006200 { + status = "okay"; clock-frequency = <216000000>; }; - serial@70006300 { - status = "disable"; - }; - - serial@70006400 { - status = "disable"; - }; - i2c@7000c000 { + status = "okay"; clock-frequency = <400000>; alc5632: alc5632@1e { @@ -262,13 +253,10 @@ }; i2c@7000c400 { + status = "okay"; clock-frequency = <400000>; }; - i2c@7000c500 { - status = "disable"; - }; - nvec { compatible = "nvidia,nvec"; reg = <0x7000c500 0x100>; @@ -281,6 +269,7 @@ }; i2c@7000d000 { + status = "okay"; clock-frequency = <400000>; adt7461@4c { @@ -289,25 +278,28 @@ }; }; + usb@c5000000 { + status = "okay"; + }; + usb@c5004000 { + status = "okay"; nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ }; + usb@c5008000 { + status = "okay"; + }; + sdhci@c8000000 { + status = "okay"; cd-gpios = <&gpio 173 0>; /* gpio PV5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 169 0>; /* gpio PV1 */ }; - sdhci@c8000200 { - status = "disable"; - }; - - sdhci@c8000400 { - status = "disable"; - }; - sdhci@c8000600 { + status = "okay"; support-8bit; }; diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index 88f3b8e0c8c0..21b586e41e97 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -257,31 +257,17 @@ }; }; - i2s@70002a00 { - status = "disable"; - }; - - serial@70006000 { - status = "disable"; - }; - - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; + i2s@70002800 { + status = "okay"; }; serial@70006300 { + status = "okay"; clock-frequency = <216000000>; }; - serial@70006400 { - status = "disable"; - }; - i2c@7000c000 { + status = "okay"; clock-frequency = <400000>; wm8903: wm8903@1a { @@ -315,6 +301,7 @@ }; i2c@7000c400 { + status = "okay"; clock-frequency = <100000>; smart-battery@b { @@ -326,10 +313,12 @@ }; i2c@7000c500 { + status = "okay"; clock-frequency = <400000>; }; i2c@7000d000 { + status = "okay"; clock-frequency = <400000>; temperature-sensor@4c { @@ -384,29 +373,29 @@ }; usb@c5000000 { + status = "okay"; nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ dr_mode = "otg"; }; usb@c5004000 { + status = "okay"; nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ }; - sdhci@c8000000 { - status = "disable"; - }; - - sdhci@c8000200 { - status = "disable"; + usb@c5008000 { + status = "okay"; }; sdhci@c8000400 { + status = "okay"; cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ }; sdhci@c8000600 { + status = "okay"; support-8bit; }; diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index 1dea6cc68dde..6fc52afa9431 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts @@ -240,39 +240,27 @@ }; }; - i2s@70002a00 { - status = "disable"; + i2s@70002800 { + status = "okay"; }; serial@70006000 { + status = "okay"; clock-frequency = <216000000>; }; - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; - }; - - serial@70006300 { - status = "disable"; - }; - - serial@70006400 { - status = "disable"; - }; - i2c@7000c000 { + status = "okay"; clock-frequency = <400000>; }; i2c@7000c400 { + status = "okay"; clock-frequency = <400000>; }; i2c@7000c500 { + status = "okay"; clock-frequency = <400000>; codec: codec@1a { @@ -286,23 +274,24 @@ }; }; - i2c@7000d000 { - status = "disable"; + usb@c5000000 { + status = "okay"; }; usb@c5004000 { nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ }; - sdhci@c8000200 { - status = "disable"; + usb@c5008000 { + status = "okay"; }; - sdhci@c8000400 { - status = "disable"; + sdhci@c8000000 { + status = "okay"; }; sdhci@c8000600 { + status = "okay"; cd-gpios = <&gpio 121 0>; /* gpio PP1 */ wp-gpios = <&gpio 122 0>; /* gpio PP2 */ }; diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts index 6de4c106024f..15d8fdbe21f2 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra-ventana.dts @@ -240,31 +240,17 @@ }; }; - i2s@70002a00 { - status = "disable"; - }; - - serial@70006000 { - status = "disable"; - }; - - serial@70006040 { - status = "disable"; - }; - - serial@70006200 { - status = "disable"; + i2s@70002800 { + status = "okay"; }; serial@70006300 { + status = "okay"; clock-frequency = <216000000>; }; - serial@70006400 { - status = "disable"; - }; - i2c@7000c000 { + status = "okay"; clock-frequency = <400000>; wm8903: wm8903@1a { @@ -291,36 +277,42 @@ }; i2c@7000c400 { + status = "okay"; clock-frequency = <400000>; }; i2c@7000c500 { + status = "okay"; clock-frequency = <400000>; }; i2c@7000d000 { + status = "okay"; clock-frequency = <400000>; }; - usb@c5004000 { - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + usb@c5000000 { + status = "okay"; }; - sdhci@c8000000 { - status = "disable"; + usb@c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ }; - sdhci@c8000200 { - status = "disable"; + usb@c5008000 { + status = "okay"; }; sdhci@c8000400 { + status = "okay"; cd-gpios = <&gpio 69 0>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ }; sdhci@c8000600 { + status = "okay"; support-8bit; }; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index df34defe1bbd..c417d67e9027 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -72,6 +72,7 @@ reg = <0x70002800 0x200>; interrupts = <0 13 0x04>; nvidia,dma-request-selector = <&apbdma 2>; + status = "disable"; }; tegra_i2s2: i2s@70002a00 { @@ -79,6 +80,7 @@ reg = <0x70002a00 0x200>; interrupts = <0 3 0x04>; nvidia,dma-request-selector = <&apbdma 1>; + status = "disable"; }; serial@70006000 { @@ -86,6 +88,7 @@ reg = <0x70006000 0x40>; reg-shift = <2>; interrupts = <0 36 0x04>; + status = "disable"; }; serial@70006040 { @@ -93,6 +96,7 @@ reg = <0x70006040 0x40>; reg-shift = <2>; interrupts = <0 37 0x04>; + status = "disable"; }; serial@70006200 { @@ -100,6 +104,7 @@ reg = <0x70006200 0x100>; reg-shift = <2>; interrupts = <0 46 0x04>; + status = "disable"; }; serial@70006300 { @@ -107,6 +112,7 @@ reg = <0x70006300 0x100>; reg-shift = <2>; interrupts = <0 90 0x04>; + status = "disable"; }; serial@70006400 { @@ -114,6 +120,7 @@ reg = <0x70006400 0x100>; reg-shift = <2>; interrupts = <0 91 0x04>; + status = "disable"; }; i2c@7000c000 { @@ -122,6 +129,7 @@ interrupts = <0 38 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; i2c@7000c400 { @@ -130,6 +138,7 @@ interrupts = <0 84 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; i2c@7000c500 { @@ -138,6 +147,7 @@ interrupts = <0 92 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; i2c@7000d000 { @@ -146,6 +156,7 @@ interrupts = <0 53 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; pmc { @@ -179,6 +190,7 @@ interrupts = <0 20 0x04>; phy_type = "utmi"; nvidia,has-legacy-mode; + status = "disable"; }; usb@c5004000 { @@ -186,6 +198,7 @@ reg = <0xc5004000 0x4000>; interrupts = <0 21 0x04>; phy_type = "ulpi"; + status = "disable"; }; usb@c5008000 { @@ -193,30 +206,35 @@ reg = <0xc5008000 0x4000>; interrupts = <0 97 0x04>; phy_type = "utmi"; + status = "disable"; }; sdhci@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; interrupts = <0 14 0x04>; + status = "disable"; }; sdhci@c8000200 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000200 0x200>; interrupts = <0 15 0x04>; + status = "disable"; }; sdhci@c8000400 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000400 0x200>; interrupts = <0 19 0x04>; + status = "disable"; }; sdhci@c8000600 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000600 0x200>; interrupts = <0 31 0x04>; + status = "disable"; }; pmu { diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 5a1c85fbf0f0..2dcc09e784b5 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -82,6 +82,7 @@ reg = <0x70006000 0x40>; reg-shift = <2>; interrupts = <0 36 0x04>; + status = "disable"; }; serial@70006040 { @@ -89,6 +90,7 @@ reg = <0x70006040 0x40>; reg-shift = <2>; interrupts = <0 37 0x04>; + status = "disable"; }; serial@70006200 { @@ -96,6 +98,7 @@ reg = <0x70006200 0x100>; reg-shift = <2>; interrupts = <0 46 0x04>; + status = "disable"; }; serial@70006300 { @@ -103,6 +106,7 @@ reg = <0x70006300 0x100>; reg-shift = <2>; interrupts = <0 90 0x04>; + status = "disable"; }; serial@70006400 { @@ -110,6 +114,7 @@ reg = <0x70006400 0x100>; reg-shift = <2>; interrupts = <0 91 0x04>; + status = "disable"; }; i2c@7000c000 { @@ -118,6 +123,7 @@ interrupts = <0 38 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; i2c@7000c400 { @@ -126,6 +132,7 @@ interrupts = <0 84 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; i2c@7000c500 { @@ -134,6 +141,7 @@ interrupts = <0 92 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; i2c@7000c700 { @@ -142,6 +150,7 @@ interrupts = <0 120 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; i2c@7000d000 { @@ -150,6 +159,7 @@ interrupts = <0 53 0x04>; #address-cells = <1>; #size-cells = <0>; + status = "disable"; }; pmc { @@ -191,30 +201,35 @@ compatible = "nvidia,tegra30-i2s"; reg = <0x70080300 0x100>; nvidia,ahub-cif-ids = <4 4>; + status = "disable"; }; tegra_i2s1: i2s@70080400 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080400 0x100>; nvidia,ahub-cif-ids = <5 5>; + status = "disable"; }; tegra_i2s2: i2s@70080500 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080500 0x100>; nvidia,ahub-cif-ids = <6 6>; + status = "disable"; }; tegra_i2s3: i2s@70080600 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080600 0x100>; nvidia,ahub-cif-ids = <7 7>; + status = "disable"; }; tegra_i2s4: i2s@70080700 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080700 0x100>; nvidia,ahub-cif-ids = <8 8>; + status = "disable"; }; }; @@ -222,24 +237,28 @@ compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000000 0x200>; interrupts = <0 14 0x04>; + status = "disable"; }; sdhci@78000200 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000200 0x200>; interrupts = <0 15 0x04>; + status = "disable"; }; sdhci@78000400 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000400 0x200>; interrupts = <0 19 0x04>; + status = "disable"; }; sdhci@78000600 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000600 0x200>; interrupts = <0 31 0x04>; + status = "disable"; }; pmu { -- cgit v1.2.1