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| author | Ingo Molnar <mingo@elte.hu> | 2011-01-07 14:14:15 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2011-01-07 14:14:15 +0100 |
| commit | 1c2a48cf65580a276552151eb8f78d78c55b828e (patch) | |
| tree | 68ed0628a276b33cb5aa0ad4899c1afe0a33a69d /arch/arm/mm/proc-macros.S | |
| parent | 0aa002fe602939370e9476e5ec32b562000a0425 (diff) | |
| parent | cb600d2f83c854ec3d6660063e4466431999489b (diff) | |
| download | linux-stable-1c2a48cf65580a276552151eb8f78d78c55b828e.tar.gz | |
Merge branch 'linus' into x86/apic-cleanups
Conflicts:
arch/x86/include/asm/io_apic.h
Merge reason: Resolve the conflict, update to a more recent -rc base
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/proc-macros.S')
| -rw-r--r-- | arch/arm/mm/proc-macros.S | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index 7d63beaf9745..b795afd0a2c6 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -61,17 +61,27 @@ .endm /* - * cache_line_size - get the cache line size from the CSIDR register - * (available on ARMv7+). It assumes that the CSSR register was configured - * to access the L1 data cache CSIDR. + * dcache_line_size - get the minimum D-cache line size from the CTR register + * on ARMv7. */ .macro dcache_line_size, reg, tmp - mrc p15, 1, \tmp, c0, c0, 0 @ read CSIDR - and \tmp, \tmp, #7 @ cache line size encoding - mov \reg, #16 @ size offset + mrc p15, 0, \tmp, c0, c0, 1 @ read ctr + lsr \tmp, \tmp, #16 + and \tmp, \tmp, #0xf @ cache line size encoding + mov \reg, #4 @ bytes per word mov \reg, \reg, lsl \tmp @ actual cache line size .endm +/* + * icache_line_size - get the minimum I-cache line size from the CTR register + * on ARMv7. + */ + .macro icache_line_size, reg, tmp + mrc p15, 0, \tmp, c0, c0, 1 @ read ctr + and \tmp, \tmp, #0xf @ cache line size encoding + mov \reg, #4 @ bytes per word + mov \reg, \reg, lsl \tmp @ actual cache line size + .endm /* * Sanity check the PTE configuration for the code below - which makes |