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authorBen Dooks <ben.dooks@codethink.co.uk>2013-02-01 10:36:22 +0000
committerBen Dooks <ben.dooks@codethink.co.uk>2013-02-08 15:13:33 +0000
commit0be1baa81c65e0d0d67f7b28ae871b01beeb850e (patch)
treeccf171b97d563768ac8e3b1d3af1c197dc947182
parent570b7dbc0514e22fd0aef850ceee45fc3a087984 (diff)
downloadlinux-baserock/arm/bjdooks/be8_v1.tar.gz
mvebu: support running big-endianbaserock/arm/bjdooks/be8_v1
Add indication we can run these cores in BE mode, and ensure that the secondary CPU is set to big-endian mode in the initialisation code as the initial code runs little-endian. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
-rw-r--r--arch/arm/mach-mvebu/Kconfig1
-rw-r--r--arch/arm/mach-mvebu/headsmp.S4
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 440b13ef1fed..2afa026d1e49 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -1,5 +1,6 @@
config ARCH_MVEBU
bool "Marvell SOCs with Device Tree support" if ARCH_MULTI_V7
+ select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_MMIO
select COMMON_CLK
select GENERIC_CLOCKEVENTS
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S
index a06e0ede8c08..8b09f8d0d3fd 100644
--- a/arch/arm/mach-mvebu/headsmp.S
+++ b/arch/arm/mach-mvebu/headsmp.S
@@ -36,6 +36,10 @@
*/
ENTRY(armada_xp_secondary_startup)
+#ifdef CONFIG_CPU_BE8_BOOT_LE
+ setend be
+#endif
+
/* Read CPU id */
mrc p15, 0, r1, c0, c0, 5
and r1, r1, #0xF