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authorDaniel Silverstone <daniel.silverstone@codethink.co.uk>2015-01-20 17:11:23 +0000
committerDaniel Silverstone <daniel.silverstone@codethink.co.uk>2015-01-20 17:56:59 +0000
commitd8127be83ad921db9d659c4fc47977d4edda1829 (patch)
treeeca6508a1bfa6b78d42661e394cf92341c6fe8a0
parentbdec41963890f8ed9ad89f8b418959ab3cdc2aa3 (diff)
downloadlinux-baserock/danielsilverstone/m400.tar.gz
ahci_xgene: soften error if optional mux is not availablebaserock/danielsilverstone/m400
When booting on an XGene moonshot cartridge the ahci_xgene driver fails to bind to the third sata port due to the following error: xgene-ahci: probe of 1a800000.sata failed with error -16 The device tree supplied by the firmware has an incorrect register range for the mux on the third sata port but since it is built in it is not easy to replace. It would be better for the driver to ignore this mux setting and carry on with a warning. This patch changes the behaviour of a77b6ee90d ("ahci_xgene: Fix the error print invalid resource for APM X-Gene SoC AHCI SATA Host Controller driver.") which makes this an error if the resource exists but cannot be claimed. Note, the best fix for this would be to replace the device tree, but at the moment we have no way of rebuilding the firmware or the device tree that is supplied on the X-Gene cartridges. Signed-off-by: Daniel Silverstone <daniel.silverstone@codethink.co.uk> Reviewed-by: Ben Dooks <ben.dooks@codethink.co.uk>
-rw-r--r--drivers/ata/ahci_xgene.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
index feeb8f1e2fe8..a4df5146557b 100644
--- a/drivers/ata/ahci_xgene.c
+++ b/drivers/ata/ahci_xgene.c
@@ -486,10 +486,10 @@ static int xgene_ahci_probe(struct platform_device *pdev)
res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
if (res) {
void __iomem *csr = devm_ioremap_resource(dev, res);
- if (IS_ERR(csr))
- return PTR_ERR(csr);
-
- ctx->csr_mux = csr;
+ if (!IS_ERR(csr))
+ ctx->csr_mux = csr;
+ else
+ dev_warn(dev, "Cannot acquire mux resource\n");
}
dev_dbg(dev, "VAddr 0x%p Mmio VAddr 0x%p\n", ctx->csr_core,