Merge tag 'renesas-soc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

From Simon Horman:
Renesas ARM based SoC updates for v3.14

* Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY

* r8a7791 SoC (R-Car M2)
  - Add thermal platform device
  - Add DU and LVDS clocks
  - GPIO platform device support
  - PFC platform device support
  - Select IRQC

* r8a7790 SoC (R-Car H2)
  - Tidyup clock table order
  - Fixup I2C clock source
  - Correct EXTAL divider settings
  - Add clocks for thermal devices and SSI

* r8a7779 SoC (R-Car H1)
  - Add I2C clock for DT

* r8a7778 SoC (R-Car M1)
  - Add HSPI clocks for DT
  - Add I2C clock for DT
  - Add HPBIFx DMAEngine support

* r8a7740 SoC (R-Mobile A1)
  - Add FSI clocks for DT

* emev2 SoC (Emma Mobile)
  - Move to Multi-platform
  - Remove legacy board code

* r7s72100 SoC (RZ/A1H)
  - Select GPIO

* r8a73a4 SoC (R-Mobile APE6)
  - Don't used named IRC for DMAEngine

* tag 'renesas-soc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
  ARM: shmobile: r8a7779: add HSPI clock support for DT
  ARM: shmobile: r8a7740: add FSI clock support for DT
  ARM: shmobile: r8a7790: add SSI MSTP clocks
  ARM: shmobile: r8a7778: add HPBIFx DMAEngine support
  ARM: shmobile: Select AUTO_ZRELADDR for EMEV2
  ARM: shmobile: r8a7790: tidyup clock table order
  ARM: shmobile: r8a7790: fixup I2C clock source
  ARM: shmobile: r8a7790: care EXTAL divider settings
  ARM: shmobile: Add r8a7791 clocks for thermal devices
  ARM: shmobile: Add r8a7791 thermal platform device
  ARM: shmobile: Add r8a7790 clocks for thermal devices
  ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
  ARM: shmobile: r8a7791: Add DU and LVDS clocks
  ARM: shmobile: Select USE_OF on EMEV2
  ARM: shmobile: r8a7778: add HSPI clock support for DT
  ARM: shmobile: Remove legacy platform devices from EMEV2 SoC code
  ARM: shmobile: Remove legacy KZM9D board code
  ARM: shmobile: Use ->init_late() in shared EMEV2 case
  ARM: shmobile: Add shared EMEV2 code for ->init_machine()
  ARM: shmobile: Enable MTU2 on r7s72100
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>

1 files changed, 13 insertions, 1 deletions

diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index c9a26f16ce5b..ff2d60d55bd5 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk,			pll1_clk,	1, 12);
 SH_FIXED_RATIO_CLK_SET(p_clk,			pll1_clk,	1, 24);
 SH_FIXED_RATIO_CLK_SET(rclk_clk,		pll1_clk,	1, (48 * 1024));
 SH_FIXED_RATIO_CLK_SET(mp_clk,			pll1_div2_clk,	1, 15);
+SH_FIXED_RATIO_CLK_SET(zx_clk,			pll1_clk,	1, 3);
 
 static struct clk *main_clks[] = {
 	&extal_clk,
@@ -116,12 +117,14 @@ static struct clk *main_clks[] = {
 	&rclk_clk,
 	&mp_clk,
 	&cp_clk,
+	&zx_clk,
 };
 
 /* MSTP */
 enum {
-	MSTP721, MSTP720,
+	MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
 	MSTP719, MSTP718, MSTP715, MSTP714,
+	MSTP522,
 	MSTP216, MSTP207, MSTP206,
 	MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
 	MSTP124,
@@ -129,12 +132,16 @@ enum {
 };
 
 static struct clk mstp_clks[MSTP_NR] = {
+	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
+	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
+	[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
 	[MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
 	[MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
 	[MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
 	[MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
+	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
 	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
 	[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
 	[MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
@@ -164,6 +171,9 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_CON_ID("peripheral_clk", &hp_clk),
 
 	/* MSTP */
+	CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7791", &mstp_clks[MSTP726]),
+	CLKDEV_ICK_ID("du.0", "rcar-du-r8a7791", &mstp_clks[MSTP724]),
+	CLKDEV_ICK_ID("du.1", "rcar-du-r8a7791", &mstp_clks[MSTP723]),
 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
@@ -180,6 +190,8 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
 	CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
+	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 };
 
 #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\