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author | Dave Airlie <airlied@redhat.com> | 2010-08-02 10:24:46 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2010-08-02 10:24:46 +1000 |
commit | 7827627107aeb629f1a056cb56b17bd4fb789e03 (patch) | |
tree | cbd83582abb9120c7ef724bf439916c8bf864e37 /drivers/hwmon/it87.c | |
parent | e190bfe56841551b1ad5abb42ebd0c4798cc8c01 (diff) | |
parent | 219de62a1627247fca10789f28902f66cb0b408f (diff) | |
download | linux-7827627107aeb629f1a056cb56b17bd4fb789e03.tar.gz |
Merge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-next
* 'drm-radeon-next' of ../drm-radeon-next: (333 commits)
drm/radeon/kms: trivial code style fixes for audio
drm/radeon: remove viewport transform from r6xx/r7xx blit emit
drm/radeon: group r6xx/r7xx newly sequential blit state
drm/radeon: reorder r6xx/r7xx blit state emit to make more regs sequential
drm/radeon: r6xx/r7xx move vport clipping to a single packet
drm/radeon: group r6xx/r7xx sequential blit state
drm/radeon: remove duplicate state emit in r6xx/r7xx blit
drm/radeon: add comments to r6xx/r7xx blit state
drm/radeon/kms/r7xx: add workaround for hw issue with HDP flush
drm/radeon/kms: remove rs4xx gart limit
drm: radeon: fix sign bug
drm/radeon/kms: check/restore sanity before doing anything else with GPU.
drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
drm/radeon/kms: add ioport register access
drm/radeon/kms: enable HDMI audio on RS600/RS690/RS740
drm/radeon/kms: track audio engine state, do not use not setup timer
drm/radeon/kms/r6xx+: add query for tile config (v2)
drm/radeon/kms: fix CS alignment checking for tiling (v2)
drm/radeon/kms: add tiling support to the cs checker for r6xx/r7xx
drm/radeon/kms: Add crtc tiling setup support for evergreen
...
Diffstat (limited to 'drivers/hwmon/it87.c')
-rw-r--r-- | drivers/hwmon/it87.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 5be09c048c5f..25763d2223b6 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -80,6 +80,13 @@ superio_inb(int reg) return inb(VAL); } +static inline void +superio_outb(int reg, int val) +{ + outb(reg, REG); + outb(val, VAL); +} + static int superio_inw(int reg) { int val; @@ -1517,6 +1524,21 @@ static int __init it87_find(unsigned short *address, sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); reg = superio_inb(IT87_SIO_PINX2_REG); + /* + * The IT8720F has no VIN7 pin, so VCCH should always be + * routed internally to VIN7 with an internal divider. + * Curiously, there still is a configuration bit to control + * this, which means it can be set incorrectly. And even + * more curiously, many boards out there are improperly + * configured, even though the IT8720F datasheet claims + * that the internal routing of VCCH to VIN7 is the default + * setting. So we force the internal routing in this case. + */ + if (sio_data->type == it8720 && !(reg & (1 << 1))) { + reg |= (1 << 1); + superio_outb(IT87_SIO_PINX2_REG, reg); + pr_notice("it87: Routing internal VCCH to in7\n"); + } if (reg & (1 << 0)) pr_info("it87: in3 is VCC (+5V)\n"); if (reg & (1 << 1)) |