diff options
-rw-r--r-- | drivers/mtd/nand/atmel_nand.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index d93c849b70b5..b55e9a482bc3 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -55,10 +55,17 @@ static int on_flash_bbt = 0; module_param(on_flash_bbt, int, 0); /* Register access macros */ +#ifdef CONFIG_AVR32 #define ecc_readl(add, reg) \ __raw_readl(add + ATMEL_ECC_##reg) #define ecc_writel(add, reg, value) \ __raw_writel((value), add + ATMEL_ECC_##reg) +#else +#define ecc_readl(add, reg) \ + readl_relaxed(add + ATMEL_ECC_##reg) +#define ecc_writel(add, reg, value) \ + writel_relaxed((value), add + ATMEL_ECC_##reg) +#endif #include "atmel_nand_ecc.h" /* Hardware ECC registers */ #include "atmel_nand_nfc.h" /* Nand Flash Controller definition */ @@ -274,7 +281,7 @@ static void atmel_read_buf8(struct mtd_info *mtd, u8 *buf, int len) memcpy(buf, host->nfc->data_in_sram, len); host->nfc->data_in_sram += len; } else { - __raw_readsb(nand_chip->IO_ADDR_R, buf, len); + __raw_readsb(nand_chip->IO_ADDR_R + 3, buf, len); } } @@ -287,7 +294,8 @@ static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len) memcpy(buf, host->nfc->data_in_sram, len); host->nfc->data_in_sram += len; } else { - __raw_readsw(nand_chip->IO_ADDR_R, buf, len / 2); + //__raw_readsw(nand_chip->IO_ADDR_R, buf, len / 2); + readsw(nand_chip->IO_ADDR_R, buf, len / 2); } } @@ -295,14 +303,15 @@ static void atmel_write_buf8(struct mtd_info *mtd, const u8 *buf, int len) { struct nand_chip *nand_chip = mtd->priv; - __raw_writesb(nand_chip->IO_ADDR_W, buf, len); + __raw_writesb(nand_chip->IO_ADDR_W + 3, buf, len); } static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len) { struct nand_chip *nand_chip = mtd->priv; - __raw_writesw(nand_chip->IO_ADDR_W, buf, len / 2); + //__raw_writesw(nand_chip->IO_ADDR_W, buf, len / 2); + writesw(nand_chip->IO_ADDR_W, buf, len / 2); } static void dma_complete_func(void *completion) |