diff options
| -rw-r--r-- | drivers/net/ethernet/cadence/macb.c | 14 | ||||
| -rw-r--r-- | drivers/net/ethernet/cadence/macb.h | 20 |
2 files changed, 21 insertions, 13 deletions
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index b71e316da39b..1c3f6e727063 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -449,7 +449,7 @@ static void macb_update_stats(struct macb *bp) WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); for(; p < end; p++, reg++) - *p += readl_relaxed(reg); + *p += cdneth_readl(reg); } static int macb_halt_tx(struct macb *bp) @@ -1587,7 +1587,7 @@ static void macb_configure_dma(struct macb *bp) dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); dmacfg &= ~GEM_BIT(ENDIA_PKT); /* Tell the chip to byteswap descriptors on big-endian hosts */ -#ifdef __BIG_ENDIAN +#if defined(__BIG_ENDIAN) && !defined(CONFIG_AVR32) dmacfg |= GEM_BIT(ENDIA_DESC); #endif if (bp->dev->features & NETIF_F_HW_CSUM) @@ -1836,14 +1836,14 @@ static void gem_update_stats(struct macb *bp) for (i = 0; i < GEM_STATS_LEN; ++i, ++p) { u32 offset = gem_statistics[i].offset; - u64 val = readl_relaxed(bp->regs + offset); + u64 val = cdneth_readl(bp->regs + offset); bp->ethtool_stats[i] += val; *p += val; if (offset == GEM_OCTTXL || offset == GEM_OCTRXL) { /* Add GEM_OCTTXH, GEM_OCTRXH */ - val = readl_relaxed(bp->regs + offset + 4); + val = cdneth_readl(bp->regs + offset + 4); bp->ethtool_stats[i] += ((u64)val) << 32; *(++p) += val; } @@ -2191,17 +2191,17 @@ static void macb_probe_queues(void __iomem *mem, unsigned int hw_q; u32 mid; - *queue_mask = 0x1; + *queue_mask = 0x1;\ *num_queues = 1; /* is it macb or gem ? */ - mid = readl_relaxed(mem + MACB_MID); + mid = cdneth_readl(mem + MACB_MID); if (MACB_BFEXT(IDNUM, mid) != 0x2) return; /* bit 0 is never set but queue 0 always exists */ - *queue_mask = readl_relaxed(mem + GEM_DCFG6) & 0xff; + *queue_mask = cdneth_readl(mem + GEM_DCFG6) & 0xff; *queue_mask |= 0x1; diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 6cfff0b04d05..c003e9824025 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -422,19 +422,27 @@ << GEM_##name##_OFFSET)) \ | GEM_BF(name, value)) +#ifdef CONFIG_AVR32 +#define cdneth_readl __raw_readl +#define cdneth_writel __raw_writel +#else +#define cdneth_readl readl_relaxed +#define cdneth_writel writel_relaxed +#endif + /* Register access macros */ #define macb_readl(port,reg) \ - readl_relaxed((port)->regs + MACB_##reg) + cdneth_readl((port)->regs + MACB_##reg) #define macb_writel(port,reg,value) \ - writel_relaxed((value), (port)->regs + MACB_##reg) + cdneth_writel((value), (port)->regs + MACB_##reg) #define gem_readl(port, reg) \ - readl_relaxed((port)->regs + GEM_##reg) + cdneth_readl((port)->regs + GEM_##reg) #define gem_writel(port, reg, value) \ - writel_relaxed((value), (port)->regs + GEM_##reg) + cdneth_writel((value), (port)->regs + GEM_##reg) #define queue_readl(queue, reg) \ - readl_relaxed((queue)->bp->regs + (queue)->reg) + cdneth_readl((queue)->bp->regs + (queue)->reg) #define queue_writel(queue, reg, value) \ - writel_relaxed((value), (queue)->bp->regs + (queue)->reg) + cdneth_writel((value), (queue)->bp->regs + (queue)->reg) /* Conditional GEM/MACB macros. These perform the operation to the correct * register dependent on whether the device is a GEM or a MACB. For registers |