diff options
Diffstat (limited to 'arch/arm/boot/dts/r8a7790.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 220 |
1 files changed, 220 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 339d9b11721c..ee845fad939b 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -24,6 +24,55 @@ reg = <0>; clock-frequency = <1300000000>; }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + clock-frequency = <1300000000>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <2>; + clock-frequency = <1300000000>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <3>; + clock-frequency = <1300000000>; + }; + + cpu4: cpu@4 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + clock-frequency = <780000000>; + }; + + cpu5: cpu@5 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + clock-frequency = <780000000>; + }; + + cpu6: cpu@6 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + clock-frequency = <780000000>; + }; + + cpu7: cpu@7 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; + clock-frequency = <780000000>; + }; }; gic: interrupt-controller@f1001000 { @@ -38,6 +87,78 @@ interrupts = <1 9 0xf04>; }; + gpio0: gpio@ffc40000 { + compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; + reg = <0 0xffc40000 0 0x2c>; + interrupt-parent = <&gic>; + interrupts = <0 4 0x4>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 32>; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio1: gpio@ffc41000 { + compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; + reg = <0 0xffc41000 0 0x2c>; + interrupt-parent = <&gic>; + interrupts = <0 5 0x4>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 32>; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio2: gpio@ffc42000 { + compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; + reg = <0 0xffc42000 0 0x2c>; + interrupt-parent = <&gic>; + interrupts = <0 6 0x4>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 32>; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio3: gpio@ffc43000 { + compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; + reg = <0 0xffc43000 0 0x2c>; + interrupt-parent = <&gic>; + interrupts = <0 7 0x4>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 32>; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio4: gpio@ffc44000 { + compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; + reg = <0 0xffc44000 0 0x2c>; + interrupt-parent = <&gic>; + interrupts = <0 8 0x4>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 32>; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio5: gpio@ffc45000 { + compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; + reg = <0 0xffc45000 0 0x2c>; + interrupt-parent = <&gic>; + interrupts = <0 9 0x4>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 32>; + #interrupt-cells = <2>; + interrupt-controller; + }; + timer { compatible = "arm,armv7-timer"; interrupts = <1 13 0xf08>, @@ -54,4 +175,103 @@ interrupt-parent = <&gic>; interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>; }; + + i2c0: i2c@e6508000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7790"; + reg = <0 0xe6508000 0 0x40>; + interrupt-parent = <&gic>; + interrupts = <0 287 0x4>; + status = "disabled"; + }; + + i2c1: i2c@e6518000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7790"; + reg = <0 0xe6518000 0 0x40>; + interrupt-parent = <&gic>; + interrupts = <0 288 0x4>; + status = "disabled"; + }; + + i2c2: i2c@e6530000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7790"; + reg = <0 0xe6530000 0 0x40>; + interrupt-parent = <&gic>; + interrupts = <0 286 0x4>; + status = "disabled"; + }; + + i2c3: i2c@e6540000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7790"; + reg = <0 0xe6540000 0 0x40>; + interrupt-parent = <&gic>; + interrupts = <0 290 0x4>; + status = "disabled"; + }; + + mmcif0: mmcif@ee200000 { + compatible = "renesas,sh-mmcif"; + reg = <0 0xee200000 0 0x80>; + interrupt-parent = <&gic>; + interrupts = <0 169 0x4>; + reg-io-width = <4>; + status = "disabled"; + }; + + mmcif1: mmcif@ee220000 { + compatible = "renesas,sh-mmcif"; + reg = <0 0xee220000 0 0x80>; + interrupt-parent = <&gic>; + interrupts = <0 170 0x4>; + reg-io-width = <4>; + status = "disabled"; + }; + + pfc: pfc@e6060000 { + compatible = "renesas,pfc-r8a7790"; + reg = <0 0xe6060000 0 0x250>; + }; + + sdhi0: sdhi@ee100000 { + compatible = "renesas,sdhi-r8a7790"; + reg = <0 0xee100000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 165 4>; + cap-sd-highspeed; + status = "disabled"; + }; + + sdhi1: sdhi@ee120000 { + compatible = "renesas,sdhi-r8a7790"; + reg = <0 0xee120000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 166 4>; + cap-sd-highspeed; + status = "disabled"; + }; + + sdhi2: sdhi@ee140000 { + compatible = "renesas,sdhi-r8a7790"; + reg = <0 0xee140000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 167 4>; + cap-sd-highspeed; + status = "disabled"; + }; + + sdhi3: sdhi@ee160000 { + compatible = "renesas,sdhi-r8a7790"; + reg = <0 0xee160000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 168 4>; + cap-sd-highspeed; + status = "disabled"; + }; }; |