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-rw-r--r--include/linux/platform_data/gpio-davinci.h3
-rw-r--r--include/linux/serial_sci.h36
-rw-r--r--include/linux/usb/msm_hsusb.h3
3 files changed, 4 insertions, 38 deletions
diff --git a/include/linux/platform_data/gpio-davinci.h b/include/linux/platform_data/gpio-davinci.h
index 6efd20264585..fbe2f7535741 100644
--- a/include/linux/platform_data/gpio-davinci.h
+++ b/include/linux/platform_data/gpio-davinci.h
@@ -28,13 +28,12 @@ enum davinci_gpio_type {
struct davinci_gpio_platform_data {
u32 ngpio;
u32 gpio_unbanked;
- u32 intc_irq_num;
};
struct davinci_gpio_controller {
struct gpio_chip chip;
- int irq_base;
+ struct irq_domain *irq_domain;
/* Serialize access to GPIO registers */
spinlock_t lock;
void __iomem *regs;
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index af414e1895a5..22b3640c9424 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -10,15 +10,6 @@
#define SCIx_NOT_SUPPORTED (-1)
-enum {
- SCBRR_ALGO_NONE, /* Compute sampling rate in the driver */
- SCBRR_ALGO_1, /* clk / (16 * bps) */
- SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
- SCBRR_ALGO_3, /* clk / (8 * bps) */
- SCBRR_ALGO_4, /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */
- SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */
-};
-
#define SCSCR_TIE (1 << 7)
#define SCSCR_RIE (1 << 6)
#define SCSCR_TE (1 << 5)
@@ -59,17 +50,6 @@ enum {
/* HSSRR HSCIF */
#define HSCIF_SRE 0x8000
-/* Offsets into the sci_port->irqs array */
-enum {
- SCIx_ERI_IRQ,
- SCIx_RXI_IRQ,
- SCIx_TXI_IRQ,
- SCIx_BRI_IRQ,
- SCIx_NR_IRQS,
-
- SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */
-};
-
enum {
SCIx_PROBE_REGTYPE,
@@ -88,19 +68,6 @@ enum {
SCIx_NR_REGTYPES,
};
-#define SCIx_IRQ_MUXED(irq) \
-{ \
- [SCIx_ERI_IRQ] = (irq), \
- [SCIx_RXI_IRQ] = (irq), \
- [SCIx_TXI_IRQ] = (irq), \
- [SCIx_BRI_IRQ] = (irq), \
-}
-
-#define SCIx_IRQ_IS_MUXED(port) \
- ((port)->irqs[SCIx_ERI_IRQ] == \
- (port)->irqs[SCIx_RXI_IRQ]) || \
- ((port)->irqs[SCIx_ERI_IRQ] && \
- ((port)->irqs[SCIx_RXI_IRQ] < 0))
/*
* SCI register subset common for all port types.
* Not all registers will exist on all parts.
@@ -129,14 +96,11 @@ struct plat_sci_port_ops {
* Platform device specific platform_data struct
*/
struct plat_sci_port {
- unsigned long mapbase; /* resource base */
- unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
unsigned int type; /* SCI / SCIF / IRDA / HSCIF */
upf_t flags; /* UPF_* flags */
unsigned long capabilities; /* Port features/capabilities */
unsigned int sampling_rate;
- unsigned int scbrr_algo_id; /* SCBRR calculation algo */
unsigned int scscr; /* SCSCR initialization */
/*
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 22a396c13f3a..32754835a39b 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -20,6 +20,7 @@
#include <linux/types.h>
#include <linux/usb/otg.h>
+#include <linux/clk.h>
/**
* Supported USB modes
@@ -135,6 +136,8 @@ struct msm_otg_platform_data {
enum msm_usb_phy_type phy_type;
void (*setup_gpio)(enum usb_otg_state state);
char *pclk_src_name;
+ int (*link_clk_reset)(struct clk *link_clk, bool assert);
+ int (*phy_clk_reset)(struct clk *phy_clk);
};
/**