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* pinctrl: samsung: Remove dead codeMarek Szyprowski2017-01-261-4/+3
| | | | | | | | | | 'enable' parameter has been removed a while ago, so all code for handling it can be simply removed. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: samsung: Use generic of_device_get_match_data helperMarek Szyprowski2017-01-261-5/+3
| | | | | | | | | Replace custom code with generic helper. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: samsung: Add missing initconst annotationMarek Szyprowski2017-01-261-11/+11
| | | | | | | | | | Exynos5433 support has been added in parallel to adding initconst annotation to most of the init data structures, so add those annotations also to Exynos5433 structures. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: Use real dependenciesJean Delvare2017-01-261-5/+10
| | | | | | | | | | | | | Do not hide pinctrl drivers for Mediatek platforms using conditionals. Doing so actually leaves the symbols present (but always disabled) on all other platforms, which is confusing and inefficient. Better use real dependencies so that the symbols do not exist at all on platforms where they are not relevant. Signed-off-by: Jean Delvare <jdelvare@suse.de> Reported-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: meson: meson-gxl: add the pwm_ao_b pinMartin Blumenstingl2017-01-261-0/+8
| | | | | | | | | | | This adds support for the pwm_ao_b pin. Unfortunately the registers for the pwm_ao pins are not documented at all. The source for the pwm_ao_b pin from this patch is the Khadas VIM GPL kernel source, which sets bit 3 and unsets bits 4 and 31 to enable the PWM LEDs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: broxton: Rename apl-pinctrl driverAndy Shevchenko2017-01-261-1/+1
| | | | | | | | | While we have no users yet rename the platform driver to use the same pattern as the rest of Intel SoCs, i.e. use full SoC name in 'apollolake-pinctrl'. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'ib-pinctrl-genprops' into develLinus Walleij2017-01-2647-257/+392
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| * pinctrl / gpio: Introduce .set_config() callback for GPIO chipsMika Westerberg2017-01-2626-218/+297
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we already have two pin configuration related callbacks available for GPIO chips .set_single_ended() and .set_debounce(). In future we expect to have even more, which does not scale well if we need to add yet another callback to the GPIO chip structure for each possible configuration parameter. Better solution is to reuse what we already have available in the generic pinconf. To support this, we introduce a new .set_config() callback for GPIO chips. The callback takes a single packed pin configuration value as parameter. This can then be extended easily beyond what is currently supported by just adding new types to the generic pinconf enum. If the GPIO driver is backed up by a pinctrl driver the GPIO driver can just assign gpiochip_generic_config() (introduced in this patch) to .set_config and that will take care configuration requests are directed to the pinctrl driver. We then convert the existing drivers over .set_config() and finally remove the .set_single_ended() and .set_debounce() callbacks. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: Allow configuration of pins from gpiolib based driversMika Westerberg2017-01-264-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a GPIO driver is backed by a pinctrl driver the GPIO driver sometimes needs to call the pinctrl driver to configure certain things, like whether the pin is used as input or output. In addition to this there are other configurations applicable to GPIOs such as setting debounce time of the GPIO. To support this we introduce a new function pinctrl_gpio_set_config() that can be used by gpiolib based driver to pass configuration requests to the backing pinctrl driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: Widen the generic pinconf argument from 16 to 24 bitsMika Westerberg2017-01-2618-39/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current pinconf packed format allows only 16-bit argument limiting the maximum value 65535. For most types this is enough. However, debounce time can be in range of hundreths of milliseconds in case of mechanical switches so we cannot represent the worst case using the current format. In order to support larger values change the packed format so that the lower 8 bits are used as type which leaves 24 bits for the argument. This allows representing values up to 16777215 and debounce times up to 16 seconds. We also convert the existing users to use 32-bit integer when extracting argument from the packed configuration value. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: remove unused variableArnd Bergmann2017-01-261-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A cleanup caused a harmless warning: drivers/pinctrl/mvebu/pinctrl-kirkwood.c: In function 'kirkwood_pinctrl_probe': drivers/pinctrl/mvebu/pinctrl-kirkwood.c:460:19: error: unused variable 'res' [-Werror=unused-variable] The obvious fix is to remove the declaration of the now unused variable. Fixes: ad9ec4ecee68 ("pinctrl: mvebu: switch drivers to generic simple mmio") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | gpio: aspeed: Add banks Y, Z, AA, AB and ACAndrew Jeffery2017-01-261-14/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is less straight-forward than one would hope, as some banks only have 4 pins rather than 8, others are output only, yet more (W and X, already supported) are input-only, and in the case of the g4 SoC bank AC doesn't exist. Add some structs to describe the varying properties of different banks and integrate mechanisms to deny requests for unsupported configurations. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]Andrew Jeffery2017-01-261-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Incorrect video output configuration bits were being tested on pins in GPIO banks AA and AB for the ROM{8,16} mux functions. The ROM{8,16} functions are the highest priority for the relevant pins and also the default function, so we require the relevant video output configuration be disabled to mux GPIO functionality. As the wrong bits were being tested a GPIO export would succeed but leave the pin in an unresponsive state (i.e. value updates were ignored). This misbehaviour was discovered as part of extending the GPIO controller's support to cover banks Y, Z, AA, AB and AC (AC in the case of the g5 SoC). Fixes: 6d329f14a75f ("pinctrl: aspeed-g4: Add mux configuration for all pins") Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | gpio: aspeed: Make bank names stringsJoel Stanley2017-01-261-7/+7
| | | | | | | | | | | | | | | | | | | | The Aspeed SoCs have more GPIOs than can be represented with A-Z. The documentation uses two letter names such as AA and AB, so make the names a three-character array in the bank struct to accommodate this. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: qcom: Use raw spinlock variantsJulia Cartwright2017-01-261-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSM pinctrl driver currently implements an irq_chip for handling GPIO interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. On real-time kernels, this fixes an OOPs which looks like the following, as reported by Brian Wrenn: kernel BUG at kernel/locking/rtmutex.c:1014! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP Modules linked in: spidev_irq(O) smsc75xx wcn36xx [last unloaded: spidev] CPU: 0 PID: 1163 Comm: irq/144-mmc0 Tainted: G W O 4.4.9-linaro-lt-qcom #1 PC is at rt_spin_lock_slowlock+0x80/0x2d8 LR is at rt_spin_lock_slowlock+0x68/0x2d8 [..] Call trace: rt_spin_lock_slowlock rt_spin_lock msm_gpio_irq_ack handle_edge_irq generic_handle_irq msm_gpio_irq_handler generic_handle_irq __handle_domain_irq gic_handle_irq Reported-by: Brian Wrenn <dcbrianw@gmail.com> Tested-by: Brian Wrenn <dcbrianw@gmail.com> Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: Fix samsung_pinctrl_create_functions return valueMarek Szyprowski2017-01-261-1/+1
| | | | | | | | | | | | | | | | | | Return proper error code in case of memory allocation failure. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: Remove messages for failed memory allocationMarek Szyprowski2017-01-263-33/+11
| | | | | | | | | | | | | | | | | | | | Memory subsystem already prints message about failed memory allocation, there is no need to do it in the drivers. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: Document Exynos3250 SoC supportMarek Szyprowski2017-01-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add missing compatible id for Exynos3250 SoC to device tree docs. Exynos pin control driver supports it since commit d97f5b9804bfcdc1 ("pinctrl: exynos: Add driver data for Exynos3250"). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/amd: Drop pinctrl_unregister for devm_ registered deviceWei Yongjun2017-01-191-1/+0
| | | | | | | | | | | | | | | | | | | | It's not necessary to unregister pin controller device registered with devm_pinctrl_register() and using pinctrl_unregister() leads to a double free. Fixes: 3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: meson: Add HDMI HPD/DDC pins functionsNeil Armstrong2017-01-182-0/+38
| | | | | | | | | | | | | | | | Add pinctrl functions for HDMI HPD pin and DDC pins on Amlogic Meson GXL and GXBB SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: Remove support for Exynos4415 (SoC not supported anymore)Krzysztof Kozlowski2017-01-183-78/+0
| | | | | | | | | | | | | | | | | | | | | | | | Support for Exynos4415 is going away because there are no internal nor external users. Since commit 46dcf0ff0de3 ("ARM: dts: exynos: Remove exynos4415.dtsi"), the platform cannot be instantiated so remove also the drivers. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: ti-iodelay: remove redundant pin < 0 check on unsigned intColin Ian King2017-01-181-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | pin is an unsigned int and therefore can never be < 0 so this check is redundant. Remove the check and the associated dev_err error message. Fixes CoverityScan CID#1396438 ("Unsigned compared against 0") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: add simple regmap based pinctrl implementationRussell King2017-01-182-1/+75
| | | | | | | | | | | | | | | | Add a simple regmap based pinctrl implementation for mvebu, for syscon based regmap drivers. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: switch drivers to generic simple mmioRussell King2017-01-188-186/+45
| | | | | | | | | | | | | | | | | | Move the mvebu pinctrl drivers over to the generic simple mmio implementation, saving a substantial number of lines of code in the process. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: provide generic simple mmio-based implementationRussell King2017-01-182-0/+63
| | | | | | | | | | | | | | | | | | Provide a generic simple mmio-based probe function and methods, which pinctrl drivers can use to initialise the mvebu pinctrl subsystem. Most mvebu pinctrl drivers can use this. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: provide per-control private dataRussell King2017-01-1810-39/+88
| | | | | | | | | | | | | | | | | | | | Provide per-control private data into each mvebu pinctrl method, which will allow us to provide some completely generic helpers without the global variable and per-instance function definitions that would be required when we have multiple pin controllers on a SoC. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: constify mvebu_mpp_ctrl structuresRussell King2017-01-1810-16/+16
| | | | | | | | | | | | | | | | | | As the mvebu_mpp_ctrl structures contain function pointers, it is preferable for these to be made read-only to prevent the function pointers being modified. So make these const. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: Use seq_putc() in mvebu_pinconf_group_dbg_show()Markus Elfring2017-01-171-8/+8
| | | | | | | | | | | | | | | | | | | | Single characters should be put into a sequence. Thus use the corresponding function "seq_putc". This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: Use seq_puts() in mvebu_pinconf_group_dbg_show()Markus Elfring2017-01-171-4/+5
| | | | | | | | | | | | | | | | | | | | Strings which did not contain data format specifications should be put into a sequence. Thus use the corresponding function "seq_puts". This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: Delete an unnecessary return statement in ↵Markus Elfring2017-01-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | mvebu_pinconf_group_dbg_show() The script "checkpatch.pl" pointed information out like the following. WARNING: void function return statements are not generally useful Thus remove such a statement in the affected function. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: Delete an error message for a failed memory allocation in ↵Markus Elfring2017-01-171-11/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | three functions The script "checkpatch.pl" pointed information out like the following. WARNING: Possible unnecessary 'out of memory' message Thus fix the affected source code places. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: Use kmalloc_array() in mvebu_pinctrl_dt_node_to_map()Markus Elfring2017-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * A multiplication for the size determination of a memory allocation indicated that an array data structure should be processed. Thus use the corresponding function "kmalloc_array". This issue was detected by using the Coccinelle software. * Replace the specification of a data structure by a pointer dereference to make the corresponding size determination a bit safer according to the Linux coding style convention. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'sh-pfc-for-v4.11-tag1' of ↵Linus Walleij2017-01-133-213/+2158
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.11 - Add bias handling for non-GPIO pins for R-Car H3, - Add drive-strength and bias handling for R-Car M3-W, - Add CAN, CAN FD, MSIOF, and HSCIF pin groups for R-Car M3-W, - Add SDHI voltage switching for R-Car M2-N.
| * | pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functionsUlrich Hecht2016-12-271-0/+283
| | | | | | | | | | | | | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> [geert: Fix hscif2_clk_[bc]_mux[] and hscif4_ctrl_mux[]] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: r8a7793: Implement voltage switching for SDHISimon Horman2016-12-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Voltage switching is the same as on the r8a7791. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and functionsTakeshi Kihara2016-12-271-0/+913
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds MSIOF{0,1,2,3} pins, groups and functions to R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Correct MSIOF3 SS1_E/SS2_E pins] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: r8a7796: Add CAN FD supportChris Paterson2016-12-271-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds CAN FD[0-1] pinmux support to r8a7796 SoC. Based on a patch for r8a7795 by Ramesh Shanmugasundaram. Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: r8a7796: Add CAN supportChris Paterson2016-12-271-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds CAN[0-1] pinmux support to r8a7796 SoC. Based on a patch for r8a7795 by Ramesh Shanmugasundaram. Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: r8a7795: Support none GPIO pins bias settingNiklas Söderlund2016-12-271-201/+249
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are pins on the r8a7795 which are not part of a GPIO bank nor can be muxed between different functions. They do however allow for the bias to be configured. Add those pins to the list of pins and to the bias configuration array. The pins can now be referred to in DT by function names and their bias setting set. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: r8a7796: Add bias pinconf supportNiklas Söderlund2016-12-271-39/+315
| | | | | | | | | | | | | | | | | | | | | | | | Implements pull-up and pull-down. On this SoC there is no simple mapping of GP pins to bias register bits, so we need a table. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: sh-pfc: r8a7796: Add drive strength supportNiklas Söderlund2016-12-271-12/+347
| |/ | | | | | | | | | | | | | | | | Define the drive strength registers for the R8A7796. Add pins which are not part of a GPIO bank nor can be muxed between different functions but which still allow for their drive-strength to be configured. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | pinctrl: Initialize pinctrl_dev.nodeThierry Reding2017-01-131-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The struct pinctrl_dev's node field is not properly set up, which means the .prev and .next fields will be NULL. That's not something that the linked list code can deal with, so extra care must be taken when using these fields. An example of this is introduced in commit 3429fb3cda34 ("pinctrl: Fix panic when pinctrl devices with hogs are unregistered") where list_del() is made conditional on the pinctrl device being part of the pinctrl device list. This is to ensure that list_del() won't crash upon encountering a NULL pointer in .prev and/or .next. After initializing the list head there's no need to jump through these extra hoops and list_del() will work unconditionally. This is because the initialized list head points to itself and therefore the .prev and .next fields can be properly dereferenced. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: core: Fix regression caused by delayed work for hogsTony Lindgren2017-01-138-79/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit df61b366af26 ("pinctrl: core: Use delayed work for hogs") caused a regression at least with sh-pfc that is also a GPIO controller as noted by Geert Uytterhoeven <geert@linux-m68k.org>. As the original pinctrl_register() has issues calling pin controller driver functions early before the controller has finished registering, we can't just revert commit df61b366af26. That would break the drivers using GENERIC_PINCTRL_GROUPS or GENERIC_PINMUX_FUNCTIONS. So let's fix the issue with the following steps as a single patch: 1. Revert the late_init parts of commit df61b366af26. The late_init clearly won't work and we have to just give up on fixing pinctrl_register() for GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS. 2. Split pinctrl_register() into two parts By splitting pinctrl_register() into pinctrl_init_controller() and pinctrl_create_and_start() we have better control over when it's safe to call pinctrl_create(). 3. Introduce a new pinctrl_register_and_init() function As suggested by Linus Walleij <linus.walleij@linaro.org>, we can just introduce a new function for the controllers that need pinctrl_create() called later. 4. Convert the four known problem cases to use new function Let's convert pinctrl-imx, pinctrl-single, sh-pfc and ti-iodelay to use the new function to fix the issues. The rest of the drivers can be converted later. Let's also update Documentation/pinctrl.txt accordingly because of the known issues with pinctrl_register(). Fixes: df61b366af26 ("pinctrl: core: Use delayed work for hogs") Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunxi: add driver for V3s SoCIcenowy Zheng2017-01-113-0/+326
| | | | | | | | | | | | | | | | | | | | V3s SoC features only a pin controller (for the lack of CPUs part). Add a driver for this controller. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/amd: white space cleanups in amd_gpio_dbg_show()Dan Carpenter2017-01-111-6/+6
| | | | | | | | | | | | | | | | | | | | We accidentally deleted two tabs from the first line, but even with that fixed the conditions were not really kernel style. Put the && at the end of the line so we can align the condition clauses. Also add spaces around the "+" operator. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: imx7d-pinctrl: Fix a typoFabio Estevam2017-01-111-1/+1
| | | | | | | | | | | | | | Fix a typo in "Peripherals". Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Drop error prints on kzalloc() failureBjorn Andersson2017-01-111-20/+6
| | | | | | | | | | | | | | | | | | Upon failing kzalloc() will print an error message in the log, so there's no need for additional printouts. Also standardizes the "!ptr" vs "ptr == NULL" while I'm touching those lines. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: da850-pupd: Add to module device tableDavid Lechner2017-01-111-0/+1
| | | | | | | | | | | | | | | | This adds the pintrol-da850-pupd driver to the module device table so that udev will automatically bind the driver to the device. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: baytrail: Convert to use devm_*()Andy Shevchenko2017-01-111-12/+5
| | | | | | | | | | | | | | | | | | This simplifies error handling and allows us to drop error path handlers completely. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: intel: Convert to use devm_gpiochip_add_data()Mika Westerberg2017-01-114-23/+4
| | | | | | | | | | | | | | | | | | This simplifies error handling and allows us to drop intel_pinctrl_remove() completely. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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