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* ARM: OMAP2+: gpmc: remove exported nand functionsAfzal Mohammed2012-10-152-463/+0
| | | | | | | nand driver handles gpmc-nand block fully, hence no more users for these exported nand functions, remove it. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* mtd: nand: omap: handle gpmc bch[48]Afzal Mohammed2012-10-151-11/+89
| | | | | | | | | | gpmc-nand bch registers are now available in driver, make use of it to handle bch[48] instead of relying on gpmc exported functions. And so nand driver no longer needs gpmc header, remove it. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* ARM: OMAP2+: gpmc: nand register helper bch updateAfzal Mohammed2012-10-152-2/+23
| | | | | | | | | | Update helper function that provides gpmc-nand register details for nand driver with bch register information. Using this nand driver can be made self sufficient to handle remaining gpmc-nand operations by itself instead of relying on gpmc exported nand functions. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* ARM: OMAP2+: nand: bch capability checkAfzal Mohammed2012-10-151-0/+24
| | | | | | | | Capability of bch schemes could be discovered using soc revision checks. If soc revision indicates that selected ecc scheme is not supported bail out. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* mtd: nand: omap: bring in gpmc nand macrosAfzal Mohammed2012-10-151-8/+13
| | | | | | | | | Bring onto driver the macros defined in gpmc.h that are not necessary outside driver, helps in removing inclusion of gpmc.h too. Also remove GPMC prefix on those macros to make clear it's independence with gpmc header. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* ARM: OMAP2+: nand: header cleanupAfzal Mohammed2012-10-1510-72/+98
| | | | | | | | | | | | | For common arm zImage existing nand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Also move gpmc-nand platform data to platform header meant for nand from gpmc header file Signed-off-by: Afzal Mohammed <afzal@ti.com>
* ARM: OMAP2+: onenand: header cleanupAfzal Mohammed2012-10-158-16/+33
| | | | | | | | | | For common arm zImage existing onenand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* mtd: onenand: omap: use pdata info instead of cpu_isAfzal Mohammed2012-10-151-3/+4
| | | | | | | | | | | platform data now contains a field to indicate whether soc belongs to omap34xx family, use it instead of cpu_is_* check. This helps in removing dependency of platform specific header file - cpu.h Signed-off-by: Afzal Mohammed <afzal@ti.com>
* ARM: OMAP2+: onenand: connected soc info in pdataAfzal Mohammed2012-10-152-0/+6
| | | | | | | | | | onenand driver needs to know whether soc is falling under 34xx family to properly handle onenand. But driver is not supposed to do cpu_is_* check, hence educate platform data with this information. Driver can make use of it to avoid cpu_is_* check. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* mtd: nand: omap: read nand using register addressAfzal Mohammed2012-10-151-1/+1
| | | | | | | | | | | | Now that gpmc-nand registers are available in driver, use it to read nand data. "65b97cf mtd: nand: omap2: handle nand on gpmc" modified all other instances. After initial versions of that patch, a new change added reading nand data using gpmc exposed function. In the final version this change was not taken care. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* mtd: nand: omap: free region as per resource sizeAfzal Mohammed2012-10-151-1/+1
| | | | | | | memory as is now obtained via resource, upon freeing use resource size. This also helps get rid of one macro. Signed-off-by: Afzal Mohammed <afzal@ti.com>
* mtd: onenand: omap: cleanup gpmc dependencyAfzal Mohammed2012-10-151-2/+0
| | | | | | | | requesting, freeing gpmc cs is now handled fully by gpmc, remove left out gpmc dependency as well as unnecessary include of gpmc.h Signed-off-by: Afzal Mohammed <afzal@ti.com>
* ARM: OMAP2+: gpmc: remove cs# in sync clk div calcAfzal Mohammed2012-10-153-4/+4
| | | | | | | | | Divider value for a certain sync clk is determined solely based on gpmc fclk. CS# does not have any role here, thus remove presence of CS# in clock divider calculation API. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: GPMC: Remove unused OneNAND get_freq() platform functionJon Hunter2012-10-152-42/+5
| | | | | | | | | | | | | | | | | | A platform function pointer for getting the frequency of a OneNAND device was added so that a platform could specify a custom function for returning the frequency and not just rely on the OneNAND version to determine the frequency. However, this platform function pointer is not currently being used and I am not sure if it ever has. OneNAND devices are not so common these days and as far as I know not being used with new devices. Therefore, it is most likely that this get_freq() function pointer will not be used and so remove it. Given that the get_freq() function pointer is not used, neither is the clk_dep variable and so all references to it can also be removed. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com>
* ARM: OMAP2+: onenand: refactor for clarityAfzal Mohammed2012-10-151-64/+110
| | | | | | | | | | | Refactor set_async_mode & set_sync_mode functions to separate out timing calculation & actual configuration (GPMC & OneNAND side). Thanks to Jon for his suggestions. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com>
* ARM: OMAP2+: nand: unify init functionsAfzal Mohammed2012-10-1512-85/+62
| | | | | | | | | | | | | | | | | | | | | Helper function for updating nand platform data has been added the capability to take timing structure arguement. Usage of omap_nand_flash_init() has been replaced by modifed one, omap_nand_flash_init was doing things similar to board_nand_init except that NAND CS# were being acquired based on bootloader setting. As CS# is hardwired for a given board, acquiring gpmc CS# has been removed, and updated with the value on board. NAND CS# used in beagle board & omap3evm was found to be CS0. Thomas Weber <thomas.weber.linux@googlemail.com> reported that value of devkit8000 to be CS0. Overo board was found to be using CS0 based on u-boot, while google grep says omap3touchbook too has CS0. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* Linux 3.7-rc1v3.7-rc1Linus Torvalds2012-10-141-2/+2
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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-10-14107-4493/+2895
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS update from Ralf Baechle: "Cleanups and fixes for breakage that occured earlier during this merge phase. Also a few patches that didn't make the first pull request. Of those is the Alchemy work that merges code for many of the SOCs and evaluation boards thus among other code shrinkage, reduces the number of MIPS defconfigs by 5." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (22 commits) MIPS: SNI: Switch RM400 serial to SCCNXP driver MIPS: Remove unused empty_bad_pmd_table[] declaration. MIPS: MT: Remove kspd. MIPS: Malta: Fix section mismatch. MIPS: asm-offset.c: Delete unused irq_cpustat_t struct offsets. MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code. MIPS: Alchemy: merge PB1550 support into DB1550 code MIPS: Alchemy: Single kernel for DB1200/1300/1550 MIPS: Optimize TLB refill for RI/XI configurations. MIPS: proc: Cleanup printing of ASEs. MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required. MIPS: Add detection of DSP ASE Revision 2. MIPS: Optimize pgd_init and pmd_init MIPS: perf: Add perf functionality for BMIPS5000 MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMP MIPS: perf: Remove unnecessary #ifdef MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt) MIPS: perf: Change the "mips_perf_event" table unsupported indicator. MIPS: Align swapper_pg_dir to 64K for better TLB Refill code. vmlinux.lds.h: Allow architectures to add sections to the front of .bss ...
| * Merge tag 'disintegrate-mips-20121009' of ↵Ralf Baechle2012-10-1146-1706/+1846
| |\ | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/dhowells/linux-headers into mips-for-linux-next UAPI Disintegration 2012-10-09 Patchwork: https://patchwork.linux-mips.org/patch/4414/
| | * UAPI: (Scripted) Disintegrate arch/mips/include/asmDavid Howells2012-10-0946-1706/+1846
| | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
| * | MIPS: SNI: Switch RM400 serial to SCCNXP driverThomas Bogendoerfer2012-10-111-24/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new SCCNXP driver supports the SC2681 chips used in RM400 machines. We now use the new driver instead of the old SC26xx driver. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4417/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Remove unused empty_bad_pmd_table[] declaration.Ralf Baechle2012-10-111-1/+0
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: MT: Remove kspd.Ralf Baechle2012-10-115-462/+0
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Malta: Fix section mismatch.Ralf Baechle2012-10-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LD arch/mips/pci/built-in.o WARNING: arch/mips/pci/built-in.o(.devinit.text+0x2a0): Section mismatch in reference from the function malta_piix_func0_fixup() to the variable .init.data:pci_irq The function __devinit malta_piix_func0_fixup() references a variable __initdata pci_irq. If pci_irq is only used by malta_piix_func0_fixup then annotate pci_irq with a matching annotation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: asm-offset.c: Delete unused irq_cpustat_t struct offsets.Ralf Baechle2012-10-111-10/+0
| | | | | | | | | | | | | | | | | | | | | Originally added in 05b541489c48e7fbeec19a92acf8683230750d0a [Merge with Linux 2.5.5.] over 10 years ago but never been used. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code.Manuel Lauss2012-10-118-678/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PB1100/1500 are similar to their DB-cousins but with a few more devices on the bus. This patch adds PB1100/1500 support to the existing DB1100/1500 code. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: lnux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4338/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Alchemy: merge PB1550 support into DB1550 codeManuel Lauss2012-10-116-437/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PB1550 is more or less a DB1550 without the PCI IDE controller, a more complicated (read: configurable) Flash setup and some other minor changes. Like the DB1550 it can be automatically detected by reading the CPLD ID register bits. This patch adds PB1550 detection and setup to the DB1550 code. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4337/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Alchemy: Single kernel for DB1200/1300/1550Manuel Lauss2012-10-1113-941/+548
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Combine support for the DB1200/PB1200, DB1300 and DB1550 boards into a single kernel image. defconfig-generated image verified on DB1200, DB1300 and DB1550. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4335/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Optimize TLB refill for RI/XI configurations.David Daney2012-10-111-16/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't have to do a separate shift to eliminate the software bits, just rotate them into the fill and they will be ignored. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4294/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: proc: Cleanup printing of ASEs.Ralf Baechle2012-10-111-9/+11
| | | | | | | | | | | | | | | | | | The number of %s was just getting ridiculous. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle2012-10-1119-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | Most supported systems currently hardwire cpu_has_dsp to 0, so we also can disable support for cpu_has_dsp2 resulting in a slightly smaller kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill2012-10-115-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ralf@linux-mips.org: This patch really only detects the ASE and passes its existence on to userland via /proc/cpuinfo. The DSP ASE Rev 2. adds new resources but no resources that would need management by the kernel.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4165/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Optimize pgd_init and pmd_initDavid Daney2012-10-111-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On a dual issue processor GCC generates code that saves a couple of clock cycles per loop if we rearrange things slightly. Checking for p != end saves a SLTU per loop, moving the increment to the middle can let it dual issue on multi-issue processors. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4249/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: perf: Add perf functionality for BMIPS5000Al Cooper2012-10-111-1/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add hardware performance counter support to kernel "perf" code for BMIPS5000. The BMIPS5000 performance counters are similar to MIPS MTI cores, so the changes were mostly made in perf_event_mipsxx.c which is typically for MTI cores. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4109/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMPAl Cooper2012-10-112-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the Kconfig option CONFIG_MIPS_MT_SMP into CONFIG_MIPS_MT_SMP and CONFIG_MIPS_PERF_SHARED_TC_COUNTERS so some of the code used for performance counters that are shared between threads can be used for MIPS cores that are not MT_SMP. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4108/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: perf: Remove unnecessary #ifdefAl Cooper2012-10-111-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The #ifdef for CONFIG_HW_PERF_EVENTS is not needed because the Makefile will only compile the module if this config option is set. This means that the code under #else would never be compiled. This may have been done to leave the original broken code around for reference, but the FIXME comment above the code already shows the broken code. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4107/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper2012-10-115-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI (Program Counter Interrupt) bit in the "cause" register is mandatory for MIPS32R2 cores, but has also been added to some R1 cores (BMIPS5000). This change adds a cpu feature bit to make it easier to check for and use this feature. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4106/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: perf: Change the "mips_perf_event" table unsupported indicator.Al Cooper2012-10-111-150/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the indicator from 0xffffffff in the "event_id" member to zero in the "cntr_mask" member. This removes the need to initialize entries that are unsupported. This also solves a problem where the number of entries in the table was increased based on a globel enum used for all platforms, but the new unsupported entries were not added for mips. This was leaving new table entries of all zeros that we not marked UNSUPPORTED. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4110/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Align swapper_pg_dir to 64K for better TLB Refill code.David Daney2012-10-112-10/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can save an instruction in the TLB Refill path for kernel mappings by aligning swapper_pg_dir on a 64K boundary. The address of swapper_pg_dir can be generated with a single LUI instead of LUI/{D}ADDUI. The alignment of __init_end is bumped up to 64K so there are no holes between it and swapper_pg_dir, which is placed at the very beginning of .bss. The alignment of invalid_pmd_table and invalid_pte_table can be relaxed to PAGE_SIZE. We do this by using __page_aligned_bss, which has the added benefit of eliminating alignment holes in .bss. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org, Cc: linux-kernel@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> Patchwork: https://patchwork.linux-mips.org/patch/4220/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | vmlinux.lds.h: Allow architectures to add sections to the front of .bssDavid Daney2012-10-111-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow-on MIPS patch will put an object here that needs 64K alignment to minimize padding. For those architectures that don't define BSS_FIRST_SECTIONS, there is no change. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org, Cc: linux-kernel@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> Patchwork: https://patchwork.linux-mips.org/patch/4221/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | Improve atomic.h robustnessJoshua Kinard2012-10-111-35/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've maintained this patch, originally from Thiemo Seufer in 2004, for a really long time, but I think it's time for it to get a look at for possible inclusion. I have had no problems with it across various SGI systems over the years. To quote the post here: http://www.linux-mips.org/archives/linux-mips/2004-12/msg00000.html "the atomic functions use so far memory references for the inline assembler to access the semaphore. This can lead to additional instructions in the ll/sc loop, because newer compilers don't expand the memory reference any more but leave it to the assembler. The appended patch uses registers instead, and makes the ll/sc arguments more explicit. In some cases it will lead also to better register scheduling because the register isn't bound to an output any more." Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | Merge branch 'modules-next' of ↵Linus Torvalds2012-10-14128-594/+6799
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux Pull module signing support from Rusty Russell: "module signing is the highlight, but it's an all-over David Howells frenzy..." Hmm "Magrathea: Glacier signing key". Somebody has been reading too much HHGTTG. * 'modules-next' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (37 commits) X.509: Fix indefinite length element skip error handling X.509: Convert some printk calls to pr_devel asymmetric keys: fix printk format warning MODSIGN: Fix 32-bit overflow in X.509 certificate validity date checking MODSIGN: Make mrproper should remove generated files. MODSIGN: Use utf8 strings in signer's name in autogenerated X.509 certs MODSIGN: Use the same digest for the autogen key sig as for the module sig MODSIGN: Sign modules during the build process MODSIGN: Provide a script for generating a key ID from an X.509 cert MODSIGN: Implement module signature checking MODSIGN: Provide module signing public keys to the kernel MODSIGN: Automatically generate module signing keys if missing MODSIGN: Provide Kconfig options MODSIGN: Provide gitignore and make clean rules for extra files MODSIGN: Add FIPS policy module: signature checking hook X.509: Add a crypto key parser for binary (DER) X.509 certificates MPILIB: Provide a function to read raw data into an MPI X.509: Add an ASN.1 decoder X.509: Add simple ASN.1 grammar compiler ...
| * | | X.509: Fix indefinite length element skip error handlingDavid Howells2012-10-101-9/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | asn1_find_indefinite_length() returns an error indicator of -1, which the caller asn1_ber_decoder() places in a size_t (which is usually unsigned) and then checks to see whether it is less than 0 (which it can't be). This can lead to the following warning: lib/asn1_decoder.c:320 asn1_ber_decoder() warn: unsigned 'len' is never less than zero. Instead, asn1_find_indefinite_length() update the caller's idea of the data cursor and length separately from returning the error code. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | X.509: Convert some printk calls to pr_develDavid Howells2012-10-101-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some debugging printk() calls should've been converted to pr_devel() calls. Do that now. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | asymmetric keys: fix printk format warningRandy Dunlap2012-10-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix printk format warning in x509_cert_parser.c: crypto/asymmetric_keys/x509_cert_parser.c: In function 'x509_note_OID': crypto/asymmetric_keys/x509_cert_parser.c:113:3: warning: format '%zu' expects type 'size_t', but argument 2 has type 'long unsigned int' Builds cleanly on i386 and x86_64. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Cc: David Howells <dhowells@redhat.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: linux-crypto@vger.kernel.org Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | MODSIGN: Fix 32-bit overflow in X.509 certificate validity date checkingDavid Howells2012-10-103-20/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current choice of lifetime for the autogenerated X.509 of 100 years, putting the validTo date in 2112, causes problems on 32-bit systems where a 32-bit time_t wraps in 2106. 64-bit x86_64 systems seem to be unaffected. This can result in something like: Loading module verification certificates X.509: Cert 6e03943da0f3b015ba6ed7f5e0cac4fe48680994 has expired MODSIGN: Problem loading in-kernel X.509 certificate (-127) Or: X.509: Cert 6e03943da0f3b015ba6ed7f5e0cac4fe48680994 is not yet valid MODSIGN: Problem loading in-kernel X.509 certificate (-129) Instead of turning the dates into time_t values and comparing, turn the system clock and the ASN.1 dates into tm structs and compare those piecemeal instead. Reported-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Josh Boyer <jwboyer@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | MODSIGN: Make mrproper should remove generated files.Rusty Russell2012-10-102-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It doesn't, because the clean targets don't include kernel/Makefile, and because two files were missing from the list. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | MODSIGN: Use utf8 strings in signer's name in autogenerated X.509 certsDavid Howells2012-10-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Place an indication that the certificate should use utf8 strings into the x509.genkey template generated by kernel/Makefile. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | MODSIGN: Use the same digest for the autogen key sig as for the module sigDavid Howells2012-10-101-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the same digest type for the autogenerated key signature as for the module signature so that the hash algorithm is guaranteed to be present in the kernel. Without this, the X.509 certificate loader may reject the X.509 certificate so generated because it was self-signed and the signature will be checked against itself - but this won't work if the digest algorithm must be loaded as a module. The symptom is that the key fails to load with the following message emitted into the kernel log: MODSIGN: Problem loading in-kernel X.509 certificate (-65) the error in brackets being -ENOPKG. What you should see is something like: MODSIGN: Loaded cert 'Magarathea: Glacier signing key: 9588321144239a119d3406d4c4cf1fbae1836fa0' Note that this doesn't apply to certificates that are not self-signed as we don't check those currently as they require the parent CA certificate to be available. Reported-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * | | MODSIGN: Sign modules during the build processDavid Howells2012-10-102-1/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_MODULE_SIG is set, then this patch will cause all modules files to to have signatures added. The following steps will occur: (1) The module will be linked to foo.ko.unsigned instead of foo.ko (2) The module will be stripped using both "strip -x -g" and "eu-strip" to ensure minimal size for inclusion in an initramfs. (3) The signature will be generated on the stripped module. (4) The signature will be appended to the module, along with some information about the signature and a magic string that indicates the presence of the signature. Step (3) requires private and public keys to be available. By default these are expected to be found in files: signing_key.priv signing_key.x509 in the base directory of the build. The first is the private key in PEM form and the second is the X.509 certificate in DER form as can be generated from openssl: openssl req \ -new -x509 -outform PEM -out signing_key.x509 \ -keyout signing_key.priv -nodes \ -subj "/CN=H2G2/O=Magrathea/CN=Slartibartfast" If the secret key is not found then signing will be skipped and the unsigned module from (1) will just be copied to foo.ko. If signing occurs, lines like the following will be seen: LD [M] fs/foo/foo.ko.unsigned STRIP [M] fs/foo/foo.ko.stripped SIGN [M] fs/foo/foo.ko will appear in the build log. If the signature step will be skipped and the following will be seen: LD [M] fs/foo/foo.ko.unsigned STRIP [M] fs/foo/foo.ko.stripped NO SIGN [M] fs/foo/foo.ko NOTE! After the signature step, the signed module _must_not_ be passed through strip. The unstripped, unsigned module is still available at the name on the LD [M] line. This restriction may affect packaging tools (such as rpmbuild) and initramfs composition tools. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
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