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* ARM: STi: DT: Move reset controller constants into common locationPhilipp Zabel2015-08-031-1/+1
| | | | | | | | | By popular vote, the DT binding includes for reset controllers are located in include/dt-bindings/reset/. Move the STi reset constants in there, too, to avoid confusion. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Patrice Chotard <patrice.chotard@st.com>
* ARM: STi: STiH416: Enable PMU IRQsLee Jones2015-05-131-0/+10
| | | | | | | | | | | This driver is used to enable System Configuration Register controlled External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs prior to use. Here we are enabling PMU IRQs on both channels. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: STiH416: Enable Cortex-A9 PMU supportLee Jones2015-05-131-0/+6
| | | | | | | This is ARM's generic Performance Monitoring Unit. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: STiH416: Add Restart support for STiH416Lee Jones2015-05-131-0/+6
| | | | | Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: STiH416: Add DT nodes for PWMLee Jones2015-05-131-1/+43
| | | | | | | | | | | Supply top level nodes for the STiH416 based development boards. The Pinctrl configuration has already been applied, so the only missing piece of the DT puzzle is for a board's DTB to enable the nodes. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.hPeter Griffin2015-04-031-2/+2
| | | | | | | | | | | | | | | Now there are generic phy type constants declared in phy.h, migrate over to using them rather than defining our own. This change has been done as one atomic commit to be bisectable. Note: The values of the defines are the same, so there is no ABI breakage with this patch. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* stmmac: dwmac-sti: Pass sysconfig register offset via syscon dt property.Peter Griffin2015-01-111-6/+6
| | | | | | | | | | | | | | | | Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, we should not be mixing address spaces in the reg property like this driver currently does. This patch updates the driver, dt docs and also the existing dt nodes to pass the sysconfig offset in the syscon dt property. This patch breaks DT compatibility! But this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. This change has been done as a single atomic commit to ensure it is bisectable. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: miphy365x: Pass sysconfig register offsets via syscfg dt property.Peter Griffin2015-01-111-5/+5
| | | | | | | | | | | | | | | | | | | | Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the miphy365 phy driver to access sysconfig register offsets via syscfg dt property. This is because the reg property should not be mixing address spaces like it does currently for miphy365. This change then also aligns us to how other platforms such as keystone and bcm7445 pass there syscon offsets via DT. This patch breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. This change has been done as a single atomic commit to ensure it is bisectable. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* ARM: STi: DT: STiH416: Change miphy356 node name to phy@fe382000Peter Griffin2014-11-181-1/+1
| | | | | | | | | Following Arnds review comments, update the miphy365 to follow the common convention of naming the phy node names as phy@addr. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: STiH416: Add DT nodes for the ehci and ohci usb controllers.Peter Griffin2014-11-181-0/+121
| | | | | | | | This patch adds the DT nodes for the 4 usb ehci and ohci usb controllers on the stih416 SoC. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: STiH416: Add DT node for the stih415/6 usb2 phyPeter Griffin2014-11-181-0/+8
| | | | | | | This usb picophy is found on stih415/6 SoC. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: DT: STi: STiH416: Add DT node for ST's SATA deviceLee Jones2014-10-311-0/+16
| | | | | | | | | ARM: DT: STi: STiH416: Add DT node for ST's SATA device Cc: devicetree@vger.kernel.org Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: DT: STi: STiH416: Add DT node for MiPHY365xLee Jones2014-10-311-0/+22
| | | | | | | | | | | The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; both SATA, both PCIe or one of each in any configuration. Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: STiH416: Supply Thermal Controller Device Tree nodesLee Jones2014-10-311-0/+18
| | | | | | | | | | We supply two of these. The first is controlled by the System Configuration registers and the second one provided is a more traditional 'memory mapped' variant. Each are handled by they own sub-driver. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: Add sdhci controller for stih416Peter Griffin2014-10-311-0/+24
| | | | | | | | | | | This patch adds device tree config for both sdhci controllers on the stih416 SoC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6Peter Griffin2014-06-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | | This patch fixes two problems: - 1) The device tree isn't currently providing sti-ethclk which is required by the dwmac glue code to correctly configure the ethernet PHY clock speed. This means depending on what the bootloader/jtag has configured this clock to, and what switch/hub the board is plugged into you most likely will NOT successfully negotiate a ethernet link. 2) The stmmaceth clock was associated with the wrong clock. It was referencing the PHY clock rather than the interconnect clock which clocks the IP. This patch also brings us closer to not having to boot the upstream kernel with the clk_ignore_unused parameter. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: STiH416: 416 DT Entry for clockgen A0/1/10/11/12Gabriel FERNANDEZ2014-05-211-5/+5
| | | | | | | | Patch adds DT entries for clockgen A0/1/10/11/12 Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysinGabriel FERNANDEZ2014-05-211-5/+5
| | | | | | | all-caps node name is not very usual. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: DT: add keyscan for stih416Gabriel FERNANDEZ2014-05-211-0/+12
| | | | | | | | | | | Add keyscan support for stih416. It is disabled by default given that it is not enabled on all boards. Also there are PIOs conflict with already claimed lines. Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* ARM: STi: stih416: Add support for the FSM Serial Flash ControllerLee Jones2014-03-271-0/+12
| | | | | | | | | | | | Here we add the necessary device nodes required for successful device probing and Pinctrl setup for the FSM when booting on an STiH416 (Orly2). Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by Angus Clark <angus.clark@st.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: STi: STIH416: Add IR support.Srinivas Kandagatla2014-03-111-0/+12
| | | | | | | | This patch adds IRB support to STiH416 platforms. Tested on B2000 and B2020 development board Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
* ARM: STi: STiH416: Add ethernet support.Srinivas Kandagatla2014-03-111-0/+44
| | | | | | | | | | This patch adds support to STiH416 SOC, which has two ethernet snps,dwmac controllers version 3.710. With this patch B2000 and B2020 boards can boot with ethernet in MII and RGMII modes. Tested on both B2020 and B2000. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
* ARM: STi: STiH416: Add soft reset controller support.Srinivas Kandagatla2014-03-111-0/+5
| | | | | | | This patch adds soft reset controller support for STiH415 and adds new softreset lines required for other device tree nodes in the header file. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
* ARM: STi: STiH416: Add reset controller support.Srinivas Kandagatla2014-03-111-0/+6
| | | | | | | | This patch adds a reset controller node to the SOC device tree and also adds new header files with reset lines required for other device tree nodes. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
* ARM: STi: Supply I2C configuration to STiH416 SoCMaxime COQUELIN2013-12-041-0/+53
| | | | | | | This patch supplies I2C configuration to STiH416 SoC. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
* ARM: dts: STi: Fix pinconf setup for STiH416 serial2Srinivas Kandagatla2013-07-221-1/+1
| | | | | | | | | | | | | | | | | | This patch fixes a bug in pinctrl setup of serial2 device, Some of the pins in the pinctrl node of serial2 do not belong to that pin-controller. This patch divides them in the pins into there respective pin controller nodes. Without this patch serial on StiH416-B2000 Board will not work as it fails with: "st-pinctrl pin-controller-rear.3: failed to get pin(99) name st-pinctrl pin-controller-rear.3: maps: function serial2 group serial2-0 num 4 pinconfig core: failed to register map default (3): no group/pin given" Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: sti: Add STiH416 SOC supportSrinivas Kandagatla2013-06-251-0/+96
The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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