| Commit message (Collapse) | Author | Age | Files | Lines |
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Pull late ARM updates from Russell King:
"Here is the late set of ARM updates for this merge window; in here is:
- The ARM parts of the broadcast timer support, core parts merged
through tglx's tree. This was left over from the previous merge to
allow the dependency on tglx's tree to be resolved.
- A fix to the VFP code which shows up on Raspberry Pi's, as well as
fixing the fallout from a previous commit in this area.
- A number of smaller fixes scattered throughout the ARM tree"
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm:
ARM: Fix broken commit 0cc41e4a21d43 corrupting kernel messages
ARM: fix scheduling while atomic warning in alignment handling code
ARM: VFP: fix emulation of second VFP instruction
ARM: 7656/1: uImage: Error out on build of multiplatform without LOADADDR
ARM: 7640/1: memory: tegra_ahb_enable_smmu() depends on TEGRA_IOMMU_SMMU
ARM: 7654/1: Preserve L_PTE_VALID in pte_modify()
ARM: 7653/2: do not scale loops_per_jiffy when using a constant delay clock
ARM: 7651/1: remove unused smp_timer_broadcast #define
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Commit 0cc41e4a21d43 (arch: remove direct definitions of KERN_<LEVEL>
uses) is broken - not enough thought was put into changing:
.asciz "string"
to
.asciz "string1" "string2"
The problem is that each string gets _separately_ NUL terminated, so
the result is a string containing:
"string1\0string2\0"
rather than:
"string1string2\0"
With our new printk levels, this ends up as - eg, KERN_DEBUG "string":
0x01 0x00 0x07 0x00 "string" 0x00
which produces lots of \x01 in the kernel log.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Paolo Pisati reports that IPv6 triggers this warning:
BUG: scheduling while atomic: swapper/0/0/0x40000100
Modules linked in:
[<c001b1c4>] (unwind_backtrace+0x0/0xf0) from [<c0503c5c>] (__schedule_bug+0x48/0x5c)
[<c0503c5c>] (__schedule_bug+0x48/0x5c) from [<c0508608>] (__schedule+0x700/0x740)
[<c0508608>] (__schedule+0x700/0x740) from [<c007007c>] (__cond_resched+0x24/0x34)
[<c007007c>] (__cond_resched+0x24/0x34) from [<c05086dc>] (_cond_resched+0x3c/0x44)
[<c05086dc>] (_cond_resched+0x3c/0x44) from [<c0021f6c>] (do_alignment+0x178/0x78c)
[<c0021f6c>] (do_alignment+0x178/0x78c) from [<c00083e0>] (do_DataAbort+0x34/0x98)
[<c00083e0>] (do_DataAbort+0x34/0x98) from [<c0509a60>] (__dabt_svc+0x40/0x60)
Exception stack(0xc0763d70 to 0xc0763db8)
3d60: e97e805e e97e806e 2c000000 11000000
3d80: ea86bb00 0000002c 00000011 e97e807e c076d2a8 e97e805e e97e806e 0000002c
3da0: 3d000000 c0763dbc c04b98fc c02a8490 00000113 ffffffff
[<c0509a60>] (__dabt_svc+0x40/0x60) from [<c02a8490>] (__csum_ipv6_magic+0x8/0xc8)
Fix this by using probe_kernel_address() stead of __get_user().
Cc: <stable@vger.kernel.org>
Reported-by: Paolo Pisati <p.pisati@gmail.com>
Tested-by: Paolo Pisati <p.pisati@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Martin Storsjö reports that the sequence:
ee312ac1 vsub.f32 s4, s3, s2
ee702ac0 vsub.f32 s5, s1, s0
e59f0028 ldr r0, [pc, #40]
ee111a90 vmov r1, s3
on Raspberry Pi (implementor 41 architecture 1 part 20 variant b rev 5)
where s3 is a denormal and s2 is zero results in incorrect behaviour -
the instruction "vsub.f32 s5, s1, s0" is not executed:
VFP: bounce: trigger ee111a90 fpexc d0000780
VFP: emulate: INST=0xee312ac1 SCR=0x00000000
...
As we can see, the instruction triggering the exception is the "vmov"
instruction, and we emulate the "vsub.f32 s4, s3, s2" but fail to
properly take account of the FPEXC_FP2V flag in FPEXC. This is because
the test for the second instruction register being valid is bogus, and
will always skip emulation of the second instruction.
Cc: <stable@vger.kernel.org>
Reported-by: Martin Storsjö <martin@martin.st>
Tested-by: Martin Storsjö <martin@martin.st>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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On multiplatform kernels, $MACHINE will be empty so there will be no
default LOADADDR. Fail to build the uImage target unless one is provided by the
developer at build time.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Following commit 26ffd0d4 (ARM: mm: introduce present, faulting entries
for PAGE_NONE), if a page has been mapped as PROT_NONE, the L_PTE_VALID
bit is cleared by the set_pte_ext() code. With LPAE the software and
hardware pte share the same location and subsequent modifications of pte
range (change_protection()) will leave the L_PTE_VALID bit cleared.
This patch adds the L_PTE_VALID bit to the newprot mask in pte_modify().
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Subash Patel <subash.rp@samsung.com>
Tested-by: Subash Patel <subash.rp@samsung.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: <stable@vger.kernel.org> # 3.8.x
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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When udelay() is implemented using an architected timer, it is wrong
to scale loops_per_jiffy when changing the CPU clock frequency since
the timer clock remains constant.
The lpj should probably become an implementation detail relevant to
the CPU loop based delay routine only and more confined to it. In the
mean time this is the minimal fix needed to have expected delays with
the timer based implementation when cpufreq is also in use.
Reported-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The assignment of clock_event_device::broadcast can be done by timer
core as of 12ad100046: "clockevents: Add generic timer broadcast
function", and the arm code moved over to this as of 3d06770eef: "arm:
Add generic timer broadcast support", but left a dangling #define when
!CONFIG_GENERIC_TIMER_BROADCAST.
This patch removes the now unused #define.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC mvebu platform changes from Olof Johansson:
"This series contains changes for the Marvell EBU platforms (mvebu,
orion, kirkwood, dove) that were not part of the first set of pull
requests because of dependencies on the MMC tree, and being submitted
a little late.
Notable changes are:
- More devices get moved out of board files into device tree
descriptions. The remaining devices listed in there have patches
that will get sent for 3.10, after which we can remove a lot of the
board files entirely. We are doing the pinctrl and mmc drivers
here, ethernet and PCI still remain.
- SMP support for mvebu is improved with support for the local
interrupt controller.
- The Guruplug board file gets replaced with a DT description.
Unfortunately, the dependency on the MMC tree turned out to be a much
larger problem than expected, when the MMC maintainer rebased the
patches in his tree that all of the patches in this branch are based
on, which caused merge conflicts between the new and old versions of
those patches.
To work around the merge conflicts, this branch rebases all patches on
top of the respective MMC patches that did get merged into 3.9. The
patches are all identical to the versions that were part of
linux-next, but have a new commit date."
* tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (90 commits)
arm: mvebu: enable the SD card slot on Armada 370 Reference Design board
ARM: kirkwood: topkick: init mvsdio via DT
ARM: kirkwood: nsa310: convert to pinctrl
ARM: Kirkwood: topkick: Enable i2c bus.
ARM: kirkwood: topkick: convert to pinctrl
ARM: dove: convert serial DT nodes to clocks property
arm: mvebu: Add SPI flash on Armada 370 DB board
arm: mvebu: Add SPI flash on Armada XP-DB board
arm: mvebu: Add SPI flash on Armada XP-GP board
arm: mvebu: Add support for SPI controller in Armada 370/XP
clocksource: update and move armada-370-xp-timer documentation to timer directory
arm: mvebu: update DT to support local timers
ARM: Dove: convert usb host controller to DT
arm: mvebu: Enable USB controllers on Armada 370/XP boards
arm: mvebu: Add support for USB host controllers in Armada 370/XP
arm: mvebu: add button for OpenBlocks AX3-4
ARM: Kirkwood: Convert NS2 to gpio-poweroff.
ARM: Kirkwood: Convert NSA310 I2C to device tree
ARM: Kirkwood: Convert NSA310 to use gpio-poweroff driver
ARM: Kirkwood: Convert NSA310 to DT based regulators.
...
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The Armada 370 Reference Design board has one SD card slot, directly
connected to the SDIO IP of the SoC, so we enable this IP. there are no
GPIOs for card-detect and write-protect so we do not specify any.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Tested-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Add a DT node for I2C and pinctrl hog for the pins. There appears to
be an i2c bus on topkick with a device on it:
i2cdetect 0
WARNING! This program can confuse your I2C bus, cause data loss and worse!
I will probe file /dev/i2c-0.
I will probe address range 0x03-0x77.
Continue? [Y/n] y
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- 64 -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- --
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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of_serial now has support for using clocks property and we have
a DT clock provider. This patch replaces the hard coded clock-frequency
property with a clocks phandle to tclk.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch add support for the SPI flash MX25l25635E which is present
on the Armada 370 DB board. This flash stores the bootloader and its
environment.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch add support for the SPI flash M25P64 which is present on
the Armada XP DB board. This flash stores the bootloader and its
environment.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch adds an SPI master device node for Armada XP-GP board.
This master node is an SPI flash controller 'n25q128a13'.
Since there is no 'partitions' node declared, one full sized
partition named as the device will be created.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Lior Amsalem <alior@marvell.com>
Tested-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Armada 370 and Armada XP SoC has an SPI controller.
This patch adds support for this controller in Armada 370
and Armada XP SoC common device tree files.
Note that the Armada XP SPI register length is 0x50 bytes,
while Armada 370 SPI register length is 0x28 bytes,
so we choose the smaller of the two.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Lior Amsalem <alior@marvell.com>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that the time-armada-370-xp support local timers, updated the
device tree to take it into account.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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With DT support for orion-ehci also convert Dove to it and
remove the legacy calls and clock aliases.
This patch is based on "ARM: Dove: split legacy and DT setup"
applied to mvebu/boards recently.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch activates every USB port provided by each SoC.
Except for Armada XP Openblocks AX3-4 board,
where we enable only the first two USB ports
until we have more information on the third one usage.
Cc: Lior Amsalem <alior@marvell.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Armada 370 and Armada XP SoC has an Orion EHCI USB controller.
This patch adds support for this controller in Armada 370
and Armada XP SoC common device tree files.
Cc: Lior Amsalem <alior@marvell.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The OpenBlocks AX3-4 board has one software-controlled button on the
front side, labeled "INIT", so we add minimal support for this button
in the kernel.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Remove C code and add a Device Tree node in its place.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Add a sub-node into the I2C node to represent the adt7476 device.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Remove the C code and add a Device Tree node for gpio-poweroff.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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CuBox needs to enable USB power on a gpio pin. Add a fixed regulator
to always enable usb power on boot.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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gpio-leds has support for pinctrl allocation, make use of it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The 88f6282 has one more TWSI(TWSI1). This add the information to enable
pinctl of TWSI1.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This commit adds a pinmux option, pmx_sdio, to enable the muxing of
the SDIO interface on the 88F6282 SoC from Marvell.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that the mvsdio driver has a Device Tree binding, and the SDIO
controller is declared in kirkwood.dtsi, migrate the mplcec4 board to
use the Device Tree to probe the SDIO controller and to mux the pins
of the SDIO interface correctly.
This patch has not been tested, it remains to be tested by a person
having access to the hardware.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Stefan Peter <s.peter@mpl.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that the mvsdio driver has a Device Tree binding, and the SDIO
controller is declared in kirkwood.dtsi, migrate the dreamplug board
to use the Device Tree to probe the SDIO controller and to mux this
interface properly.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that the SDIO controller has a Device Tree binding, let's use it
in kirkwood.dtsi.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Globalscale Mirabox uses the SDIO interface of the Armada 370 to
connect to a Wifi/Bluetooth SD8787 chip, so we enable the SDIO
interface of this board in its Device Tree file.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Armada XP DB evaluation board has one SD card slot, directly
connected to the SDIO IP of the SoC, so we add a device tree
description for it.
However, in the default configuration of the board, the SD card slot
is not usable: the connector plugged into CON40 must be changed
against a different one, provided with the board by the
manufacturer. Since such a manual modification of the hardware is
needed, we did not enable the SDIO interface by default, and left it
to the board user to modify the Device Tree if needed. Since this
board is really only an evaluation board for developers and not a
final product, it is not too bad.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Armada XP DB evaluation board has one SD card slot, directly
connected to the SDIO IP of the SoC, so we enable this
IP. Unfortunately, there are no GPIOs for card-detect and
write-protect.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The SDIO interface is only available on pins MPP30/31/32/33/34/35 on
the various Armada XP variants, so we provide a pin muxing option for
this in the Armada XP .dtsi files.
Even though those muxing options are the same for MV78230, MV78260 and
MV78460, we keep them in each .dtsi file, because the number of pins,
and therefore the declaration of the pinctrl node, is different for
each SoC variant.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The SDIO interface is available either on pins MPP9/11/12/13/14/15 or
MPP47/48/49/50/51/52 on the Armada 370. Even though all combinations
are potentially possible, those two muxing options are the most
probable ones, so we provide those at the SoC level .dtsi file.
In practice, in turns out the Armada 370 DB board uses the former,
while the Armada 370 Mirabox uses the latter.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that the mvsdio MMC driver has a Device Tree binding, we add the
Device Tree informations to describe the SDIO interface available in
the Armada 370/XP SoCs.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Armada 370 and Armada XP Socs have the same controller that the
one used in the orion platforms. This patch updates the device tree
for these SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Some of the mvebu boards (mainly the development board) come with
plug-in RAM modules. This patch allows to let the bootloaders which
have no support for DTS to give the real amount of memory available on
the board.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Armada XP DB-MV784MP-GP board has an SPI flash device.
These options allow to access that device over MTD.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Lior Amsalem <alior@marvell.com>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This is the new Armada XP evaluation board from Marvell. It comes with
a RS232 port over USB, a SATA link, an internal SSD, 4 Ethernet
Gigabit links.
Support for USB (Host and device), SDIO, PCIe will be added as drivers
when they become available for Armada XP in mainline.
Tested-by: Simon Guinot <simon.guinot@sequanux.org>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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