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* Merge branch 'pgt' (early part) into develRussell King2011-01-0615-332/+315
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| * ARM: pgtable: provide RDONLY page table bit rather than WRITE bitRussell King2010-12-225-42/+41
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: invert L_PTE_EXEC to L_PTE_XNRussell King2010-12-224-35/+34
| | | | | | | | | | | | | | | | The hardware page tables use an XN bit 'execute never'. Historically, we've had a Linux 'execute allow' bit, in the positive sense. Get rid of this artifact as future hardware will continue to have the XN sense. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: remove FIRST_USER_PGD_NRRussell King2010-12-222-7/+4
| | | | | | | | | | | | | | | | FIRST_USER_PGD_NR is now unnecessary, as this has been replaced by FIRST_USER_ADDRESS except in the architecture code. Fix up the last usage of FIRST_USER_PGD_NR, and remove the definition. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: use conventional page table code for identity mappingsRussell King2010-12-221-15/+31
| | | | | | | | | | | | | | | | | | Remove some knowledge of our 2-level page table layout from the identity mapping code - we assume that a step size of PGDIR_SIZE will allow us to step over all entries. While this is true today, it won't be true in the near future. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: collect up identity mapping functionsRussell King2010-12-225-71/+56
| | | | | | | | | | | | | | | | | | We have two places where we create identity mappings - one when we bring secondary CPUs online, and one where we setup some mappings for soft- reboot. Combine these two into a single implementation. Also collect the identity mapping deletion function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: remove L2 cache flushes for SMP page table bring-upRussell King2010-12-221-2/+0
| | | | | | | | | | | | | | | | The MMU is always configured to read page tables from the L2 cache so there's little point flushing them out of the L2 cache back to RAM. Remove these flushes. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: switch order of Linux vs hardware page tablesRussell King2010-12-225-49/+41
| | | | | | | | | | | | | | | | | | | | | | | | This switches the ordering of the Linux vs hardware page tables in each page, thereby eliminating some of the arithmetic in the page table walks. As we now place the Linux page table at the beginning of the page, we can deal with the offset in the pgt by simply masking it away, along with the other control bits. This also makes the arithmetic all be positive, rather than a mixture. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: introduce pteval_t to represent a pte valueRussell King2010-11-265-25/+28
| | | | | | | | | | | | This makes everywhere dealing with pte values use the same type. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: use phys_addr_t for physical addressesRussell King2010-11-263-7/+10
| | | | | | | | | | | | Ensure that physical addresses are typed as phys_addr_t Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: use pXd_none_or_clear_bad() in pgd_free()Russell King2010-11-261-13/+14
| | | | | | | | | | | | | | Remove knowledge of the 2-level wrapping in pgd_free(), and use the pXd_none_or_clear_bad() macros when checking the entries. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: get rid of get_pgd_slow()/free_pgd_slow()Russell King2010-11-262-7/+4
| | | | | | | | | | | | | | These old names are just aliases for pgd_alloc/pgd_free. Just use the new names. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: directly pass pgd/pmd/pte to their error functionsRussell King2010-11-262-12/+12
| | | | | | | | | | | | | | Rather than passing the pte value to __pte_error, pass the raw pte_t cookie instead. Do the same for pmd and pgd functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: group pte functions togetherRussell King2010-11-261-59/+51
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: group pgd functions and data togetherRussell King2010-11-261-21/+23
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: pgtable: move pgprot functions to one placeRussell King2010-11-261-22/+21
| | | | | | | | | | | | Rather than scattering them throughout the file, group them together. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'misc' into develRussell King2011-01-06138-1487/+1547
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * \ Merge branch 'smp' into miscRussell King2011-01-06314-4657/+7419
| |\ \ | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S arch/arm/mm/ioremap.c
| | * | ARM: TWD: enable one-shot modeRussell King2011-01-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow one shot timer mode to be used with the TWD. This allows NOHZ mode to be used on SMP systems using the TWD localtimer. Tested on Versatile Express and U8500. Tested-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 6539/1: ux500: remove unnecessary barrier from the secondary startupSrinidhi Kasagar2010-12-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: ensure frame pointer is reinitialized for soft-CPU hotplugRussell King2010-12-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we soft-CPU hotplug a CPU, we reset the stack pointer and jump back to start_secondary(). This allows us to restart as if the CPU was actually reset. However, we weren't resetting the frame pointer, which could cause problems with backtracing. Reset the frame pointer to zero (which means no parent frame) just like the early assembly code also does. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: split out software TLB maintainence broadcastingRussell King2010-12-203-127/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | smp.c is becoming too large, so split out the TLB maintainence broadcasting into a separate smp_tlb.c file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: localtimer: clean up local timer on hot unplugRussell King2010-12-204-24/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a CPU is hot unplugged, the generic tick code cleans up the clock event device, but fails to call down to the device's set_mode function to actually shut the device down. To work around this, we've historically had a local_timer_stop() callback out of the hotplug code. However, this adds needless complexity when we have the clock event device itself available. Explicitly call the clock event device's set_mode function with CLOCK_EVT_MODE_UNUSED, so that the hardware can be cleanly shutdown without any special external callbacks. When/if the generic code is fixed, percpu_timer_stop() can be killed off. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: fix hard-coded control register constantsRussell King2010-12-203-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the definition we've provided in asm/system.h rather than numeric constants. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: add Versatile Express hotplug CPU supportRussell King2010-12-202-0/+129
| | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: fix reporting of spurious wakeupsRussell King2010-12-203-27/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original scheme for reporting spurious wakeups was broken - it tried to use printk() from a context which wasn't coherent with the other CPUs, which risks corrupting the printk() data. Fix this by noting the number spurious wakeups, and only report them when we are properly woken - when we will be coherent with the rest of the system. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: smp: improve CPU bringup failure diagnosticsRussell King2010-12-201-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used to print a bland error message which gave no clue as to the failure when we failed to bring up a secondary CPU. Resolve this by separating the two failure cases. If boot_secondary() fails, we print a message indicating the returned error code from boot_secondary(): "CPU%u: failed to boot: %d\n", cpu, ret. However, if boot_secondary() succeeded, but the CPU did not appear to mark itself online within the timeout, indicate that it failed to come online: "CPU%u: failed to come online\n", cpu Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: VFP: re-initialize VFP coprocessor access enables on CPU hotplugRussell King2010-12-201-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can not guarantee that VFP will be enabled when CPU hotplug brings a CPU back online from a reset state. Add a hotplug CPU notifier to ensure that the VFP coprocessor access is enabled whenever a CPU comes back online. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: Fix subtle race in CPU pen_release hotplug codeRussell King2010-12-204-21/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 6516/1: Allow SMP_ON_UP to work with Thumb-2 kernels.Dave Martin2010-12-204-9/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * __fixup_smp_on_up has been modified with support for the THUMB2_KERNEL case. For THUMB2_KERNEL only, fixups are split into halfwords in case of misalignment, since we can't rely on unaligned accesses working before turning the MMU on. No attempt is made to optimise the aligned case, since the number of fixups is typically small, and it seems best to keep the code as simple as possible. * Add a rotate in the fixup_smp code in order to support CPU_BIG_ENDIAN, as suggested by Nicolas Pitre. * Add an assembly-time sanity-check to ALT_UP() to ensure that the content really is the right size (4 bytes). (No check is done for ALT_SMP(). Possibly, this could be fixed by splitting the two uses ot ALT_SMP() (ALT_SMP...SMP_UP versus ALT_SMP...SMP_UP_B) into two macros. In the first case, ALT_SMP needs to expand to >= 4 bytes, not == 4.) * smp_mpidr.h (which implements ALT_SMP()/ALT_UP() manually due to macro limitations) has not been modified: the affected instruction (mov) has no 16-bit encoding, so the correct instruction size is satisfied in this case. * A "mode" parameter has been added to smp_dmb: smp_dmb arm @ assumes 4-byte instructions (for ARM code, e.g. kuser) smp_dmb @ uses W() to ensure 4-byte instructions for ALT_SMP() This avoids assembly failures due to use of W() inside smp_dmb, when assembling pure-ARM code in the vectors page. There might be a better way to achieve this. * Kconfig: make SMP_ON_UP depend on (!THUMB2_KERNEL || !BIG_ENDIAN) i.e., THUMB2_KERNEL is now supported, but only if !BIG_ENDIAN (The fixup code for Thumb-2 currently assumes little-endian order.) Tested using a single generic realview kernel on: ARM RealView PB-A8 (CONFIG_THUMB2_KERNEL={n,y}) ARM RealView PBX-A9 (SMP) Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: remove smp_mpidr.hRussell King2010-12-207-23/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With "ARM: CPU hotplug: remove bug checks in platform_cpu_die()", we now do not use hard_smp_processor_id(), we no longer need to read the hardware processor ID. Remove the include providing this function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: ensure correct ordering of unplugRussell King2010-12-201-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't call idle_task_exit() with interrupts disabled, and ensure that we have a memory barrier after interrupts are disabled but before signalling that this CPU has shut down. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: remove bug checks in platform_cpu_die()Russell King2010-12-205-48/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platform_cpu_die() is entered from the CPU's own idle thread, which can not be migrated to other CPUs. Moreover, the 'cpu' argument comes from the thread info, which will always be the 'current' CPU. So remove this useless bug check. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: move cpu_killed completion to core codeRussell King2010-12-206-35/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always need to wait for the dying CPU to reach a safe state before taking it down, irrespective of the requirements of the platform. Move the completion code into the ARM SMP hotplug code rather than having each platform re-implement this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: consolidate trace_hardirqs_off() into common SMP codeRussell King2010-12-207-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: consolidate the common parts of smp_prepare_cpus()Russell King2010-12-208-169/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: get rid of references to poke_milo and MiloRussell King2010-12-202-39/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Milo is an old boot loader, which is no longer relevant for these platforms. References to it are misleading. Move the code out of poke_milo(), and remove references to milo in comments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: get rid of get_core_count()Russell King2010-12-203-26/+8
| | | | | | | | | | | | | | | | | | | | | | | | We don't need this small function as well as scu_get_core_count() Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: Clean up ncores sanity checksRussell King2010-12-206-33/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: move CPU number sanity checks to smp_init_cpus()Russell King2010-12-203-33/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that the number of CPUs is sanity checked before setting the number of possible CPUs. This avoids any chance of overflowing the cpu_possible bitmap. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: ensure smp_send_stop() waits for CPUs to stopRussell King2010-12-201-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wait for CPUs to indicate that they've stopped, after sending the stop IPI, rather than blindly continuing on and hoping that they've stopped in time. Print a warning if we fail to stop the other CPUs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: use more sane register allocation for __fixup_smp_on_upRussell King2010-12-201-17/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use r0,r3-r6 rather than r0,r3,r4,r6,r7, which makes it easier to understand which registers can be modified. Also document which registers hold values which must be preserved. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: collect IPI and local timer IRQs for /proc/statRussell King2010-12-202-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IPI and local timer interrupts weren't being properly accounted for in /proc/stat. Collect them from the irq_stat structure, and return their sum. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: provide individual IPI interrupt statisticsRussell King2010-12-203-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This separates out the individual IPI interrupt counts from the total IPI count, which allows better visibility of what IPIs are being used for. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: fix /proc/interrupts formattingRussell King2010-12-205-18/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per x86, align the initial column according to how many IRQs we have. Also, provide an english explaination for the 'LOC:' and 'IPI:' lines. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: move ipi_count into irq_stat structureRussell King2010-12-202-12/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the ipi_count into irq_stat, which allows the ipi_data structure to be entirely removed. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: provide accessors for irq_stat dataRussell King2010-12-202-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide __inc_irq_stat() and __get_irq_stat() to increment and read the irq stat counters. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: include local timer irq stats only when local timers configuredRussell King2010-12-203-12/+16
| | | | | | | | | | | | | | | | | | | | Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: remove send_ipi_message()Russell King2010-12-201-13/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | send_ipi_message() does nothing except call smp_cross_call(). As this is a static function, nothing external to this file calls it, so we can easily clean up this now unnecessary indirection. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: remove IRQ-disabling for smp_cross_call()Russell King2010-12-031-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we've now removed the spinlock and bitmask, we have nothing left which requires interrupts to be disabled when sending an IPI. All current IPI-sending implementations use the GIC, which also does not require interrupts disabled when calling gic_raise_softirq(). Remove the now unnecessary IRQ disable. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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