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* drm/radeon: use variable UVD clocksAlex Deucher2014-02-281-3/+0
| | | | | | | | | | | | | | | | | Now that Christian fixed the performance problems with the feedback buffer in mesa, we can enable variable UVD clocks. There are multiple UVD power states associated with different types and numbers of streams. This uses the appropriate state based on that information rather than always using the fastest UVD clocks which saves some power. One possible downside is that this may adversely affect decode benchmarks since these power states target specific playback requirements rather than maximum performance. If that becomes an issue, we can add a sysfs attribute to force the max UVD state. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/radeon: cleanup the fence ring locking codeChristian König2014-02-281-2/+2
| | | | | | | | We no longer need to take the ring lock while checking for a gpu lockup, so just cleanup the code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: enable dynamic vce state switching v2Alex Deucher2014-02-181-0/+17
| | | | | | | | | | | enable vce states when vce is active. When vce is active, it adjusts the currently selected state (performance, battery, uvd, etc.) v2: add code comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
* drm/radeon/dpm: fill in some initial vce infrastructureAlex Deucher2014-02-181-0/+8
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux into ↵Dave Airlie2014-01-221-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm-next Here's the vblank timestamp pull request you wanted. I addressed the few bugs that Mario pointed out and added the r-bs. As it has been a while since I made the changes, I gave it a quick spin on a few different i915 machines. Fortunately everything still seems to be fine. * 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux: drm/i915: Add a kludge for DSL incrementing too late and ISR not working drm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos() drm: Pass 'flags' from the caller to .get_scanout_position() drm: Fix vblank timestamping constants for interlaced modes drm/i915: Fix scanoutpos calculations for interlaced modes drm: Change {pixel,line,frame}dur_ns from s64 to int drm: Use crtc_clock in drm_calc_timestamping_constants() drm/radeon: Populate crtc_clock in radeon_atom_get_tv_timings() drm: Simplify the math in drm_calc_timestamping_constants() drm: Improve drm_calc_timestamping_constants() documentation drm/i915: Call drm_calc_timestamping_constants() earlier drm/i915: Kill hwmode save/restore drm: Pass the display mode to drm_calc_vbltimestamp_from_scanoutpos() drm: Pass the display mode to drm_calc_timestamping_constants()
| * drm: Pass 'flags' from the caller to .get_scanout_position()Ville Syrjälä2014-01-201-1/+1
| | | | | | | | | | | | | | | | | | | | Preparation for moving the early vblank IRQ logic into radeon_get_crtc_scanoutpos(). v2: Fix radeon_drv.c compile warning (Mario) Reviewed-by: mario.kleiner.de@gmail.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
* | drm/radeon: disable dpm on BTCAlex Deucher2014-01-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | Still unstable on some boards. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=73053 https://bugzilla.kernel.org/show_bug.cgi?id=68571 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: 3.13 <stable@vger.kernel.org> # 3.13
* | drm/radeon: don't power gate paused UVD streamsChristian König2014-01-201-0/+4
|/ | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon/pm: Guard access to rdev->pm.power_state arrayMichel Dänzer2014-01-081-2/+4
| | | | | | | | | | | It's never allocated on systems without an ATOMBIOS or COMBIOS ROM. Should fix an oops I encountered while resetting the GPU after a lockup on my PowerBook with an RV350. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: enable dpm by default on CI APUsAlex Deucher2013-12-241-2/+2
| | | | | | | Dynamic power mangement works reliably now, so enable it by default. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: enable dpm by default on CI dGPUsAlex Deucher2013-12-241-2/+2
| | | | | | | Dynamic power mangement works reliably now, so enable it by default. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/pm: move pm handling into the asic specific codeAlex Deucher2013-12-241-8/+3
| | | | | | | | | | | | | | We need more control over the ordering of dpm init with respect to the rest of the asic. Specifically, the SMC has to be initialized before the rlc and cg/pg. The pm code currently initializes late in the driver, but we need it to happen much earlier so move pm handling into the asic specific callbacks. This makes dpm more reliable and makes clockgating work properly on CIK parts and should help on SI parts as well. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: switch on new late_enable callbackAlex Deucher2013-12-241-38/+49
| | | | | | | | | | Right now it's called right after enable, but after reworking the dpm init order, it will get called later to accomodate loading the smc early, but enabling thermal interrupts and block powergating later after the ring tests are complete. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add a late enable callbackAlex Deucher2013-12-241-0/+12
| | | | | | | | Certain features need to be enabled after ring tests (e.g., powergating, etc.). Add a function pointer to split out late enable features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: remove unnecessary checks in dpm_initAlex Deucher2013-12-241-19/+17
| | | | | | | No need to check rdev->pm.num_power_states; this is a vestige of the old pm code. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon_pm: fix oops in hwmon_attributes_visible() and ↵Sergey Senozhatsky2013-12-151-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | radeon_hwmon_show_temp_thresh() Since commit ec39f64bba34 ("drm/radeon/dpm: Convert to use devm_hwmon_register_with_groups") radeon_hwmon_init() is using hwmon_device_register_with_groups(), which sets `rdev' as a device private driver_data, while hwmon_attributes_visible() and radeon_hwmon_show_temp_thresh() are still waiting for `drm_device'. Fix them by using dev_get_drvdata(), in order to avoid this oops: BUG: unable to handle kernel paging request at 0000000000001e28 IP: [<ffffffffa02ae8b4>] hwmon_attributes_visible+0x18/0x3d [radeon] PGD 15057e067 PUD 151a8e067 PMD 0 Oops: 0000 [#1] PREEMPT SMP Call Trace: internal_create_group+0x114/0x1d9 sysfs_create_group+0xe/0x10 sysfs_create_groups+0x22/0x5f device_add+0x34f/0x501 device_register+0x15/0x18 hwmon_device_register_with_groups+0xb5/0xed radeon_hwmon_init+0x56/0x7c [radeon] radeon_pm_init+0x134/0x7e5 [radeon] radeon_modeset_init+0x75f/0x8ed [radeon] radeon_driver_load_kms+0xc6/0x187 [radeon] drm_dev_register+0xf9/0x1b4 [drm] drm_get_pci_dev+0x98/0x129 [drm] radeon_pci_probe+0xa3/0xac [radeon] pci_device_probe+0x6e/0xcf driver_probe_device+0x98/0x1c4 __driver_attach+0x5c/0x7e bus_for_each_dev+0x7b/0x85 driver_attach+0x19/0x1b bus_add_driver+0x104/0x1ce driver_register+0x89/0xc5 __pci_register_driver+0x58/0x5b drm_pci_init+0x86/0xea [drm] radeon_init+0x97/0x1000 [radeon] do_one_initcall+0x7f/0x117 load_module+0x1583/0x1bb4 SyS_init_module+0xa0/0xaf Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Alexander Deucher <Alexander.Deucher@amd.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* drm/radeon/dpm: Convert to use devm_hwmon_register_with_groupsGuenter Roeck2013-12-021-37/+12
| | | | | | | | Simplify the code and fix race condition seen because attribute files were created after hwmon device registration. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: enable DPM by default in TN asicsAlex Deucher2013-11-151-1/+1
| | | | | | | | After adjusting the dpm parameters this seems to be stable on most TN systems. DPM is important for APUs since the boot clocks are generally pretty low. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add hawaii dpm supportAlex Deucher2013-11-081-0/+1
| | | | | | | This updates the CI dpm (dynamic power management) support for hawaii. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge tag 'drm-intel-fixes-2013-11-07' of ↵Dave Airlie2013-11-081-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~danvet/drm-intel into drm-next Bit a bit -fixes pull request in the merge window than usual dua to two feauture-y things: - Display CRCs are now enabled on all platforms, including the odd DP case on gm45/vlv. Since this is a testing-only feature it should ever hurt, but I figured it'll help with regression-testing -fixes. So I left it in and didn't postpone it to 3.14. - Display power well refactoring from Imre. Would have caused major pain conflict with the bdw stage 1 patches if I'd postpone this to -next. It's only an relatively small interface rework, so shouldn't cause pain. It's also been in my tree since almost 3 weeks already. That accounts for about two thirds of the pull, otherwise just bugfixes: - vlv backlight fix from Jesse/Jani - vlv vblank timestamp fix from Jesse - improved edp detection through vbt from Ville (fixes a vlv issue) - eDP vdd fix from Paulo - fixes for dvo lvds on i830M - a few smaller things all over Note: This contains a backmerge of v3.12. Since the -internal branch always applied on top of -nightly I need that unified base to merge bdw patches. So you'll get a conflict with radeon connector props when pulling this (and nouveau/master will also conflict a bit when Ben doesn't rebase). The backmerge itself only had conflicts in drm/i915. There's also a tiny conflict between Jani's backlight fix and your sysfs lifetime fix in drm-next. * tag 'drm-intel-fixes-2013-11-07' of git://people.freedesktop.org/~danvet/drm-intel: (940 commits) drm/i915/vlv: use per-pipe backlight controls v2 drm/i915: make backlight functions take a connector drm/i915: move opregion asle request handling to a work queue drm/i915/vlv: use PIPE_START_VBLANK interrupts on VLV drm/i915: Make intel_dp_is_edp() less specific drm/i915: Give names to the VBT child device type bits drm/i915/vlv: enable HDA display audio for Valleyview2 drm/i915/dvo: call ->mode_set callback only when the port is running drm/i915: avoid unclaimed registers when capturing the error state drm/i915: Enable DP port CRC for the "auto" source on g4x/vlv drm/i915: scramble reset support for DP port CRC on vlv drm/i915: scramble reset support for DP port CRC on g4x drm/i916: add "auto" pipe CRC source ... Conflicts: MAINTAINERS drivers/gpu/drm/i915/intel_panel.c drivers/gpu/drm/nouveau/core/subdev/mc/base.c drivers/gpu/drm/radeon/atombios_encoders.c drivers/gpu/drm/radeon/radeon_connectors.c
| * drm/radeon/dpm: disable multiple UVD statesAlex Deucher2013-10-091-0/+3
| | | | | | | | | | | | | | Always use the regular UVD state for now. This fixes a performance regression with UVD playback on certain APUs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: Push get_scanout_position() timestamping into kms driver.Mario Kleiner2013-11-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the ktime_get() clock readouts and potential preempt_disable() calls from drm core into kms driver to make it compatible with the api changes in the drm core. This should not introduce any change in functionality or behaviour in radeon-kms, just a reshuffling of code. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/dpm: retain user selected performance level across state changesAlex Deucher2013-11-011-4/+8
| | | | | | | | | | | | | | | | | | | | If the user has forced the state high or low, retain that preference even when we switch power states. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=70654 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: disable force performance state when thermal state is activeAlex Deucher2013-11-011-2/+6
| | | | | | | | | | | | | | If the thermal state is active, we are in the lowest performance level to cool down the chip. Don't let the user force it higher. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: enable DPM by default on r7xx asicsAlex Deucher2013-11-011-4/+4
| | | | | | | | | | | | Seems to be stable on them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: enable DPM by default on evergreen asicsAlex Deucher2013-11-011-5/+5
| | | | | | | | | | | | | | | | | | | | | | Seems to be stable on them. There are still some issues with the performance states staying in the highest levels on certain cards when multiple monitors are attached, but being that the the cards are always in their highest power state at boot up anyway, this doesn't really change anything and improves things in all other cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: enable DPM by default on BTC asicsAlex Deucher2013-11-011-3/+3
| | | | | | | | | | | | Seems to be stable on them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: enable DPM by default on SI asicsAlex Deucher2013-11-011-5/+5
| | | | | | | | | | | | | | Seems to be stable on them and improves peformance as most SI asics have very low boot clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: enable DPM by default on SUMO/PALM APUsAlex Deucher2013-11-011-3/+15
| | | | | | | | | | | | | | DPM seems to be stable on these asics and it drastically improves performance depending on the boot clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon/dpm: only print dpm debugging messages when radeon_dpm=1Alex Deucher2013-11-011-6/+8
|/ | | | | | | | Avoids spamming the system log for chips where dpm is enabled by default, but prints then messages when users force it on for other asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: don't set default clocks for SI when DPM is disabledAlex Deucher2013-09-231-4/+4
| | | | | | | | | | | | | | This is a partial revert of c6cf7777a32da874fabec4fd1c2a579f0ba4e4dd. We need to take into account the clk voltage dependencies of the board. Not doing so can lead to stability issues on certain boards if the clks exceed the levels in the dep tables. DPM already takes that into account, so for optimal performance, use DPM. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon/dpm: rework auto performance level enableAlex Deucher2013-09-151-5/+9
| | | | | | | | | | | | | Calling force_performance_level() from set_power_state() doesn't work on some asics because the current power state pointer has not been properly updated at that point. Move the calls to force_performance_level() out of the asic specific set_power_state() functions and into the main power state sequence. Fixes dpm resume on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add infrastructure to properly handle bapmAlex Deucher2013-09-111-1/+10
| | | | | | | | | bapm is a pm feature for sharing the power budget between the GPU and the CPU on APUs. It needs to be enabled or disabled in certain circumstances. For now, disable it when on battery and enable it when on AC power. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: expose DPM thermal thresholds through sysfsJean Delvare2013-09-111-0/+38
| | | | | | | | | | | | The hwmon sysfs interface allows exposing temperature limits. The "max" and "min" thresholds will be exposed as a critical high limit and its hysteresis value, respectively. This gives the user a better idea of how well cooling is doing and whether it is sufficient. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: simplify driver data retrievalJean Delvare2013-09-111-9/+9
| | | | | | | | | | You can get the driver data from struct device directly, there's no need to get the PCI device first. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add new callback for powergating UVD (v4)Alex Deucher2013-08-301-18/+25
| | | | | | | | | | | | | | Starting on CIK, multi-media blocks like UVD no longer have special power state. Rather they have their own DPM implementation which adjusts their clocks dynamically when active. When they are not active, the blocks are powergated to save power. v2: add missing pm locks v3: rebase on uvd state selection rework v4: fix inverted logic typo noticed by Christian Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add dpm support for CI dGPUs (v2)Alex Deucher2013-08-301-0/+1
| | | | | | | | | | | | | | | This adds dpm support for btc asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen switching Set radeon.dpm=1 to enable. v2: remove unused radeon_atombios.c changes, make missing smc ucode non-fatal Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/kms: add dpm support for KB/KVAlex Deucher2013-08-301-0/+2
| | | | | | | | | | | | This adds dpm support for KB/KV asics. This includes: - dynamic engine clock scaling - dynamic voltage scaling - power containment - shader power scaling Set radeon.dpm=1 to enable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_temperature() callbacks for CIK (v2)Alex Deucher2013-08-301-0/+2
| | | | | | | | | This added support for the on-chip thermal sensors on CIK asics. v2: fix register offset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: use performance state if no UVD stateAlex Deucher2013-08-301-2/+10
| | | | | | Newer asics don't have specific UVD states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: rework thermal state handlingAlex Deucher2013-08-301-29/+15
| | | | | | | | | 1. Handle the the thermal state directly in the work handler. Remove the state selection function since nothing else uses it now. 2. On some asics there is no thermal state, so we just use a regular state and force the low performance state. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: use multiple UVD power states (v3)Alex Deucher2013-08-301-0/+30
| | | | | | | | | | | | | Use the UVD handle information to determine which which power states to select when using UVD. For example, decoding a single SD stream requires much lower clocks than multiple HD streams. v2: switch to a cleaner dpm/uvd interface v3: change the uvd power state while streams are active if need be Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: make missing smc ucode non-fatalAlex Deucher2013-08-071-1/+5
| | | | | | | | | | | The smc ucode is required for dpm (dynamic power management), but if it's missing just skip dpm setup and don't disable acceleration. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=67876 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: require rlc for dpmAlex Deucher2013-08-071-1/+4
| | | | | | | | The rlc is required for dpm to work properly, so if the rlc ucode is missing, don't enable dpm. Enabling dpm without the rlc enabled can result in hangs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add checks against vblank timeAlex Deucher2013-07-081-3/+11
| | | | | | | If the vblank time is too short to adjust mclk, assume multiple displays (no mclk adjustments). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove stray line in old pm codeAlex Deucher2013-07-081-1/+0
| | | | | | Looks like a remnant from an old rebase. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add infrastructure to force performance levelsAlex Deucher2013-07-051-0/+52
| | | | | | | | | | | | This allows you to force specific power levels within a power state. Due to hardware restrictions between generations, the interface is limited to the following 3 selections: auto: all levels enabled low: forced to the lowest power level high: forced to the highest power level Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add support for 3d perf states on older asicsAlex Deucher2013-07-051-3/+14
| | | | | | | | | | | | | | | | | | | Certain older rv770 asics have both a performance and a 3D performance state rather than just multiple performance levels in the state power state. The current code would select the performance state rather than the 3D performance state when the "performance" profile was selected. This change switches to the "balanced" profile by default which ends up being the internal performance profile. When the user selects the "performance" profile, it selects the internal 3D performance state so the user can select the higher performance modes. For most asics this changes nothing. For certain rv770 asics with static performance and 3D performance states, this allows you to select between then using by selecting the "balanced" and "performance" dpm profiles. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: set default clocks for SI when DPM is disabledAlex Deucher2013-07-051-4/+4
| | | | | | | | | Fix patching of vddc values for SI and enable manually forcing clocks to default levels as per NI. This improves the out of the box performance with SI asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: clarify debugfs warningAlex Deucher2013-07-021-1/+1
| | | | | | | | For chips without debugfs dpm support say that it's not implemented rather than not supported to avoid confusion about DPM support in general. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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