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* drm/msm/mdp5: subclass msm_mdss for mdp5Rajesh Yadav2018-07-263-84/+109
| | | | | | | | | | | | | | | | | | | | | | | | | SoCs having mdp5 or dpu have identical tree like device hierarchy where MDSS top level wrapper manages common power resources for all child devices. Subclass msm_mdss so that msm_mdss includes common defines and mdp5/dpu mdss derivations to include any extensions. Add mdss helper interface (msm_mdss_funcs) to msm_mdss base for mdp5/dpu mdss specific implementation calls. This change subclasses msm_mdss for mdp5, dpu specific changes will be done separately. Changes in v3: - Added Archit's R-b Reviewed-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org> [seanpaul rebased on msm-next and resolved conflicts] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Move wait_for_vblanks into mdp complete_commit() hooksSean Paul2018-07-263-2/+4
| | | | | | | | | | | DPU doesn't use this, so push it into the mdp drivers. Changes in v3: - None Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: set encoder mode for DRM bridge explicitlyAbhinav Kumar2018-07-261-2/+4
| | | | | | | | | | | | | | | Currently, DRM bridge for DPU relies on the default video mode setting to set the encoder mode. Add an explicit call to set the encoder mode for bridges. Changes in v3: - None Reviewed-by: Archit Taneja <architt@codeauorora.org> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: initialize postdiv_lock before use for 10nm pllRajesh Yadav2018-07-261-0/+2
| | | | | | | | | | | | | | | postdiv_lock spinlock was used before initialization for 10nm pll. It causes following spin_bug: "BUG: spinlock bad magic on CPU#0". Initialize spinlock before its usage. Changes in v3: - Added Archit's R-b Reviewed-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Use one connector for dual DSI modeChandan Uddaraju2018-07-263-86/+30
| | | | | | | | | | | | | | | | Current DSI driver uses two connectors for dual DSI case even though we only have one panel. Fix this by implementing one connector/bridge for dual DSI use case. Use master DSI controllers to register one connector/bridge. Changes in v3: - None Reviewed-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> [seanpaul removed unused local var causing a build warning] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: adjust dsi timing for dual dsi modeChandan Uddaraju2018-07-264-20/+64
| | | | | | | | | | | | | | | | | For dual dsi mode, the horizontal timing needs to be divided by half since both the dsi controllers will be driving this panel. Adjust the pixel clock and DSI timing accordingly. Changes in v3: - Added Archit's R-b - Rebase on dsi cleanup set in msm-next Cc: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm: Add support for pps and compression mode command packetvkorjani2018-07-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | After enabling DSC we need to send compression mode command packet and pps data packet, for which 2 new data types are added 07h Compression Mode Data Type Write , short write, 2 parameters 0Ah PPS Long Write (word count determines number of bytes) This patch adds support to send these packets. Cc: David Airlie <airlied@linux.ie> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Cc: linux-fbdev@vger.kernel.org Changes in v3: - None Signed-off-by: vkorjani <vikas.korjani@intel.com> [seanpaul removed pps_write_buffer fn, added types to packet_format helpers] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: negative x/y in cursor moveCarsten Behling2018-07-251-8/+43
| | | | | | | | | | | | | | modesetting X11 driver may provide negative x/y cordinates in mdp5_crtc_cursor_move call when rotation is enabled. Cursor buffer can overlap down to its negative width/height. ROI has to be recalculated for negative x/y indicating using the lower/right corner of the cursor buffer and hotspot must be set in MDP5_LM_CURSOR_XY_SRC_Y MDP5_LM_CURSOR_XY_SRC_X. Signed-off-by: Carsten Behling <carsten.behling@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: replace version checks with helper functionsSibi Sankar2018-07-251-212/+29
| | | | | | | | Replace version checks with the helper functions bound to cfg_handler for DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: add implementation for helper functionsSibi Sankar2018-07-253-11/+278
| | | | | | | | Add dsi host helper function implementation for DSI v2 DSI 6G 1.x and DSI 6G v2.0+ controllers Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: add dsi host helper functions supportSibi Sankar2018-07-252-0/+13
| | | | | | | | Add dsi host helper functions support for DSI v2 and DSI 6G 1.x controllers that are under version checks Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: fix missing CTL flushRob Clark2018-07-251-1/+11
| | | | | | | | | | | | | | | | f9cb8d8d836e fixed various race conditions with CTL flush, in particular flushing and sending the START signal before encoder state was updated. But it did this a little too well in some cases that don't trigger encoder->enable(), and CTL[n].FLUSH would never be set. When page flips happen it would paper over the bug, since the first plag flip would flush out the state to the hardware. The issue could be reproduced with, for example, modetest (without the '-v' argument). Fixes: f9cb8d8d836e drm/msm/mdp5: rework CTL START signal handling Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Sean Paul <seanpaul@chromium.org>
* drm/msm/gpu: Increase the pm runtime autosuspend for 5xxJordan Crouse2018-07-253-2/+15
| | | | | | | | | | | Experimentation shows that resuming power quickly after suspending ends up forcing a system hang for unknown reasons on 5xx targets. To avoid cycling the power too much (especially during init) turn up the autosuspend time for a5xx to 250ms and use pm_runtime_put_autosuspend() when applicable. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/adreno: Add power management functions for system sleepDaniel Mack2018-07-251-0/+1
| | | | | | | | | | | | | | | | | When a msm8016 based system is woken up from suspend, the firmware in the adreno device hangs. [ 83.903416] qcom-iommu-ctx 1f09000.iommu-ctx: Unhandled context fault: fsr=0x202, iova=0x0000000000000000, fsynr=0x2, cb=1 [ 85.853633] msm 1a00000.mdss: A306: hangcheck detected gpu lockup rb 0! [ 85.853661] msm 1a00000.mdss: A306: completed fence: 370 [ 85.859073] msm 1a00000.mdss: A306: submitted fence: 372 [ 85.865113] msm 1a00000.mdss: A306: hangcheck recover! Fix this by adding pm_runtime_force_suspend/pm_runtime_force_resume as sleep ops. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: call drm_atomic_helper_suspend() and drm_atomic_helper_resume()Daniel Mack2018-07-252-0/+10
| | | | | | | | To make suspend and resume work on msm8916 platforms, call into the generic helpers and preserve the state across suspends. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2018-07-20186-2268/+3620
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next More features for 4.19: - Map processes to vmids for debugging GPUVM faults - Raven gfxoff fixes - Initial gfxoff support for vega12 - Use defines for interrupt sources rather than magic numbers - DC aux fixes - Finish DC logging TODO - Add more DC debugfs interfaces for conformance testing - Add CRC support for DCN - Scheduler rework in preparation for load balancing - Unify common smu9 code - Clean up UVD instancing support - ttm cleanups - Misc fixes and cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180719194001.3488-1-alexander.deucher@amd.com
| * drm/amdgpu: clean up UVD instance handling v2Christian König2018-07-192-67/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The whole handle, filp and entity handling is superfluous here. We should have reviewed that more thoughtfully. It looks like somebody just made the code instance aware without knowing the background. v2: fix one more missed case in amdgpu_uvd_suspend Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove superflous UVD encode entityChristian König2018-07-193-27/+0
| | | | | | | | | | | | | | | | | | Not sure what that was every used for, but now it is completely unused. Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86Michel Dänzer2018-07-1926-64/+56
| | | | | | | | | | | | | | | | | | Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an opportunity for display with Raven Ridge accidentally not working. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: fixed uninitialized valueEvan Quan2018-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | The 'result' is not initialized correctly. It causes the API return an error code even on success. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu/powerplay: use irq source defines for smu7 sourcesAlex Deucher2018-07-191-3/+4
| | | | | | | | | | | | | | | | | | Use the newly added irq source defines rather than magic numbers for smu7 thermal interrupts. Rewiewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Rex Zhu <rezhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/pm: Remove VLA usageKees Cook2018-07-181-58/+42
| | | | | | | | | | | | | | | | | | | | | | In the quest to remove all stack VLA usage from the kernel[1], this uses the maximum sane buffer size and removes copy/paste code. [1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com Reviewed-by: Rex Zhu <rezhu@amd.com> Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: simplify the bo reference on amdgpu_bo_updateHuang Rui2018-07-181-4/+3
| | | | | | | | | | | | | | | | | | | | | | BO ptr already be initialized at definition, we needn't use the complicated reference. v2: fix typo at subject line Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove internal/unused kernel module parametersSonny Jiang2018-07-182-15/+0
| | | | | | | | | | | | | | | | Remove internal/unused kernel module parameters Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: change ring priority after pushing the job (v2)Christian König2018-07-182-3/+11
| | | | | | | | | | | | | | | | | | | | | | Pushing a job can change the ring assignment of an entity. v2: squash in: "drm/amdgpu: fix job priority handling" (Christian) Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: allow for more flexible priority handlingChristian König2018-07-181-1/+2
| | | | | | | | | | | | | | | | | | Allow to call amdgpu_ring_priority_get() after pushing the ring to the scheduler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/gfx9: Update golden settings for vg10.Feifei Xu2018-07-181-1/+12
| | | | | | | | | | | | | | | | Add some UTCL registers' golden settings. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Tested-by: Kevin Wang <Kevin1.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: minor cleanup in amdgpu_job.cChristian König2018-07-171-7/+4
| | | | | | | | | | | | | | | | | | | | Remove superflous NULL check, fix coding style a bit, shorten error messages. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove job->adev (v2)Christian König2018-07-172-8/+11
| | | | | | | | | | | | | | | | | | | | | | We can get that from the ring. v2: squash in "drm/amdgpu: always initialize job->base.sched" (Alex) Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add amdgpu_job_submit_direct helperChristian König2018-07-168-70/+48
| | | | | | | | | | | | | | | | | | Make sure that we properly initialize at least the sched member. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove job->ringChristian König2018-07-167-28/+29
| | | | | | | | | | | | | | | | | | We can easily get that from the scheduler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove ring parameter from amdgpu_job_submitChristian König2018-07-169-21/+20
| | | | | | | | | | | | | | | | | | We know the ring through the entity anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove fence context from the jobChristian König2018-07-164-4/+1
| | | | | | | | | | | | | | | | | | Can be obtained directly from the fence as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: cleanup job headerChristian König2018-07-162-45/+75
| | | | | | | | | | | | | | | | | | | | Move job related defines, structure and function declarations to amdgpu_job.h Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Fix some checkpatch.pl errors and warnings in dc_link_dp.cHarry Wentland2018-07-161-17/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Any Linux kernel code should pass checkpatch.pl with no errors and little, if any, warning. [How] Fixing some spacing errors and warnings. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Null ptr check for set_sdr_white_levelKrunoslav Kovac2018-07-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | [Why&How] Cursor boosting can only be done on DCN+ Check for nullptr since DCE doesn't implement it. Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Sivapiriyan Kumarasamy <Sivapiriyan.Kumarasamy@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: dal 3.1.56Harry Wentland2018-07-161-1/+1
| | | | | | | | | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Steven Chiu <Steven.Chiu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: add new dc debug structure to track debug dataJun Lei2018-07-162-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | [why] Some DTN tests still failing @ 2% Need to reduce. [how] add instrumentation code to driver so we can get more information from failed runs. Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Move address tracking out of HUBPTony Cheng2018-07-163-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | [Why] We sometime require remapping of FB address space to UMA [How] Move address tracking up a layer before we apply address translation Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Add hook for MST root branch infoNikola Cornij2018-07-163-0/+17
| | | | | | | | | | | | | | | | | | This allows DM to do any necessary updates before MST discovery starts. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: add HDR visual confirmGloria Li2018-07-166-11/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Testing team wants a way to tell if HDR is on or not [How] Program the overscan color to visually indicate the HDR state of the top-most plane Signed-off-by: Gloria Li <geling.li@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Refactor SDR cursor boosting in HDR modeKrunoslav Kovac2018-07-1610-26/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Cursor boosting is done via CNVC_CUR register which is DPP, not HUBP Previous commit was implementing it in HUBP functions, and also breaking diags tests. [How] 1. Undo original commit as well as Eric's diags test fix, almost completely 2. Move programming to DPP and call via new dc_stream function 3. Also removing cur_rom_en from dpp_cursor_attributes and programming as part of normal cursor attributes as it depends on cursor color format Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Add headers for hardcoded 1d luts.Vitaly Prosyak2018-07-161-0/+51
| | | | | | | | | | | | | | | | | | | | Hard-coded luts are needed since complex algorithms are used for color and tone mapping. Add the headers for future use. Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/scheduler: add NULL pointer check for run queue (v2)Junwei Zhang2018-07-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | To check rq pointer before adding entity into it. That avoids NULL pointer access in some case. v2: move the check to caller Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Allow to create BO lists in CS ioctl v3Andrey Grodzovsky2018-07-164-40/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is to support MESA performace optimization. Modify CS IOCTL to allow its input as command buffer and an array of buffer handles to create a temporay bo list and then destroy it when IOCTL completes. This saves on calling for BO_LIST create and destry IOCTLs in MESA and by this improves performance. v2: Avoid inserting the temp list into idr struct. v3: Remove idr alloation from amdgpu_bo_list_create. Remove useless argument from amdgpu_cs_parser_fini Minor cosmetic stuff. v4: Revert amdgpu_bo_list_destroy back to static Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * Revert "drm/amd/powerplay: fix performance drop on Vega10"Eric Huang2018-07-161-5/+0
| | | | | | | | | | | | | | | | | | | | This reverts commit b87079ec7b4d38efee015367315958ce5495ba93. SMU FW team ask to remove this version specific code. Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/pp: switch smu callback type for get_argument()Alex Deucher2018-07-167-8/+8
| | | | | | | | | | | | | | | | return a uint32_t rather than an int to properly reflect what the function does. Reviewed-by: Rex Zhu <rezhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/pp: split out common smumgr smu9 codeAlex Deucher2018-07-168-354/+242
| | | | | | | | | | | | | | | | Split out the shared smumgr code for vega10 and 12 so we don't have duplicate code for both. Reviewed-by: Rex Zhu <rezhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/pp: remove dead vega12 codeAlex Deucher2018-07-161-29/+0
| | | | | | | | | | | | | | | | Commented out. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/pp/smu7: cache smu firmware tocAlex Deucher2018-07-132-39/+54
| | | | | | | | | | | | | | | | | | Rather than calculating it everytime we rebuild the toc buffer, calculate it once initially and then just copy the cached results to the vram buffer. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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