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path: root/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
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* sh-pfc: Share common PORTCR macro definitionLaurent Pinchart2013-12-101-11/+0
| | | | | | | | The macro is defined identically in four different locations. Share it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'pinmux/next/fixes' of git://linuxtv.org/pinchartl/fbdev into develLinus Walleij2013-07-291-1/+0
|\ | | | | | | Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * sh-pfc: Remove unneeded mach/<soc>.h includesLaurent Pinchart2013-07-291-1/+0
| | | | | | | | | | | | | | | | The SoC-specific mach/<soc>.h headers are included needlesly. Don't include them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se>
* | sh-pfc: Compute pin ranges automaticallyLaurent Pinchart2013-07-291-17/+0
| | | | | | | | | | | | | | | | | | Remove the manually specified ranges from PFC SoC data and compute the ranges automatically. This prevents ranges from being out-of-sync with pins definitions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* | sh-pfc: Add port numbers to the CPU_ALL_PORT macroLaurent Pinchart2013-07-291-62/+62
| | | | | | | | | | | | | | | | Pass down the port number down to the PORT_1 macro. The port number will be used to compute the pin ranges automatically. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* | sh-pfc: Consolidate pin definition macrosLaurent Pinchart2013-07-291-9/+2
| | | | | | | | | | | | | | Move the pin definition macros to a common header file. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* | sh-pfc: Consolidate PFC SoC data macrosLaurent Pinchart2013-07-291-3/+0
| | | | | | | | | | | | | | | | Move macros defined in several SoC data files to a common location and document them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* | sh-pfc: Replace pinmux_enum_id typedef with u16Laurent Pinchart2013-07-291-1/+1
|/ | | | | | | | | | The typedef only conceals the real variable type without bringing any additional value (see Documentation/CodingStyle, section 5.b). Moreover, it polutes the pinmux namespace. Replace it with the integer type it used to hide. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfacesGuennadi Liakhovetski2013-06-121-0/+198
| | | | | | | | | This patch adds pinmux groups and functions for the two MMCIF and three SDHI interfaces on r8a73a4 (APE6). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Remove unused GPIO bias dataMagnus Damm2013-04-031-161/+15
| | | | | | | | | Remove unused pull-up/down data from the r8a73a4 PFC code. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Remove function GPIOsMagnus Damm2013-04-031-737/+0
| | | | | | | | | | All r8a73a4 platforms use the pinctrl API to control pin functions. Function GPIOs are no longer needed. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Remove IRQC function GPIOSMagnus Damm2013-04-031-58/+0
| | | | | | | | | | The r8a73a4 board support will use the pinctrl API to control the external IRQ pins so remove the unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Remove SCIF function GPIOSMagnus Damm2013-04-031-45/+0
| | | | | | | | | | The r8a73a4 board support will use the pinctrl API to control the SCIF pins, remove the corresponding unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Add IRQC pin groups and functionsMagnus Damm2013-04-031-0/+186
| | | | | | | | | | V2 of PINCTRL support for r8a73a4 IRQC hardware and in particular the external pins IRQ0 -> IRQ57. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Add SCIF pin groups and functionsMagnus Damm2013-04-031-0/+287
| | | | | | | | | | Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and SCIFB0->SCIFB3. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf supportMagnus Damm2013-04-031-1/+196
| | | | | | | | | | Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: GPIO IRQ supportMagnus Damm2013-04-031-0/+63
| | | | | | | | | | | | | V2 of code to add GPIO -> IRQ mappings to the PFC table for the r8a73a4 SoC. Requires the IRQs to be mapped at a fixed location in Linux IRQ space. The actual IRQs are not handled by the PFC, instead IRQC is used on r8a73a4. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a73a4: Support sparse GPIO numbersMagnus Damm2013-04-031-0/+16
| | | | | | | | | | | The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers in the PFC SoC data. Pin numbers shall be used with the GPIO API from this point on. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: Add r8a73a4 pinmux supportMagnus Damm2013-04-031-0/+2826
Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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