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* pinctrl: microchip-sgpio: Fix support for regmapHoratiu Vultur2022-01-311-1/+2
| | | | | | | | | | | | | | | Initially the driver accessed the registers using u32 __iomem but then in the blamed commit it changed it to use regmap. The problem is that now the offset of the registers is not calculated anymore at word offset but at byte offset. Therefore make sure to multiply the offset with word size. Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Colin Foster <colin.foster@in-advantage.com> Fixes: 2afbbab45c261a ("pinctrl: microchip-sgpio: update to support regmap") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220131085201.307031-1-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: bcm63xx: fix unmet dependency on REGMAP for GPIO_REGMAPJulian Braha2022-01-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | When PINCTRL_BCM63XX is selected, and REGMAP is not selected, Kbuild gives the following warning: WARNING: unmet direct dependencies detected for GPIO_REGMAP Depends on [n]: GPIOLIB [=y] && REGMAP [=n] Selected by [y]: - PINCTRL_BCM63XX [=y] && PINCTRL [=y] This is because PINCTRL_BCM63XX selects GPIO_REGMAP without selecting or depending on REGMAP, despite GPIO_REGMAP depending on REGMAP. This unmet dependency bug was detected by Kismet, a static analysis tool for Kconfig. Please advise if this is not the appropriate solution. Signed-off-by: Julian Braha <julianbraha@gmail.com> Link: https://lore.kernel.org/r/20220117062557.89568-1-julianbraha@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: bcm2835: Fix a few error pathsFlorian Fainelli2022-01-301-8/+15
| | | | | | | | | | | | After commit 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs") a few error paths would not unwind properly the registration of gpio ranges. Correct that by assigning a single error label and goto it whenever we encounter a fatal error. Fixes: 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220127215033.267227-1-f.fainelli@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'intel-pinctrl-v5.17-4' of ↵Linus Walleij2022-01-303-35/+41
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v5.17-4 * Couple of fixes on how Intel driver handles an interrupt * Revert pin renaming change in ZynqMQ as it appears to be part of the Device Tree bindings * Fix ordering of the files in the Makefile The following is an automated git shortlog grouped by driver: intel: - Fix a glitch when updating IRQ flags on a preconfigured line - fix unexpected interrupt Place correctly CONFIG_PINCTRL_ST in the Makefile: - Place correctly CONFIG_PINCTRL_ST in the Makefile zynqmp: - Revert "Unify pin naming"
| * pinctrl: zynqmp: Revert "Unify pin naming"Gerhard Engleder2022-01-281-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 54784ff24971ed5bd3f1056edce998148709d0a7. This patch changes the pin names from "MIO%d" to "MIO-%d", but all dts in arch/arm64/boot/dts/xilinx still use the old name. As a result my ZCU104 has no output on serial terminal and is not reachable over network. Signed-off-by: Gerhard Engleder <gerhard@engleder-embedded.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * pinctrl: intel: Fix a glitch when updating IRQ flags on a preconfigured lineAndy Shevchenko2022-01-241-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO") hadn't taken into account an update of the IRQ flags scenario. When updating the IRQ flags on the preconfigured line the ->irq_set_type() is called again. In such case the sequential Rx buffer configuration changes may trigger a falling or rising edge interrupt that may lead, on some platforms, to an undesired event. This may happen because each of intel_gpio_set_gpio_mode() and __intel_gpio_set_direction() updates the pad configuration with a different value of the GPIORXDIS bit. Notable, that the intel_gpio_set_gpio_mode() is called only for the pads that are configured as an input. Due to this fact, integrate the logic of __intel_gpio_set_direction() call into the intel_gpio_set_gpio_mode() so that the Rx buffer won't be disabled and immediately re-enabled. Fixes: af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO") Reported-by: Kane Chen <kane.chen@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Grace Kao <grace.kao@intel.com>
| * pinctrl: intel: fix unexpected interruptŁukasz Bartosik2022-01-241-20/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ASUS Chromebook C223 with Celeron N3350 crashes sometimes during cold booot. Inspection of the kernel log showed that it gets into an inifite loop logging the following message: ->handle_irq(): 000000009cdb51e8, handle_bad_irq+0x0/0x251 ->irq_data.chip(): 000000005ec212a7, 0xffffa043009d8e7 ->action(): 00000 IRQ_NOPROBE set unexpected IRQ trap at vector 7c The issue happens during cold boot but only if cold boot happens at most several dozen seconds after Chromebook is powered off. For longer intervals between power off and power on (cold boot) the issue does not reproduce. The unexpected interrupt is sourced from INT3452 GPIO pin which is used for SD card detect. Investigation relevealed that when the interval between power off and power on (cold boot) is less than several dozen seconds then values of INT3452 GPIO interrupt enable and interrupt pending registers survive power off and power on sequence and interrupt for SD card detect pin is enabled and pending during probe of SD controller which causes the unexpected IRQ message. "Intel Pentium and Celeron Processor N- and J- Series" volume 3 doc mentions that GPIO interrupt enable and status registers default value is 0x0. The fix clears INT3452 GPIO interrupt enabled and interrupt pending registers in its probe function. Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support") Signed-off-by: Łukasz Bartosik <lb@semihalf.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * pinctrl: Place correctly CONFIG_PINCTRL_ST in the MakefileAndy Shevchenko2022-01-241-1/+1
| | | | | | | | | | | | | | Keep Makefile entries ordered in the same way as Kconfig ones. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* | pinctrl: sunxi: Fix H616 I2S3 pin dataAndre Przywara2022-01-241-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Two bugs have sneaked in the H616 pinctrl data: - PH9 uses the mux value of 0x3 twice (one should be 0x5 instead) - PH8 and PH9 use the "i2s3" function name twice in each pin For the double pin name we use the same trick we pulled for i2s0: append the pin function to the group name to designate the special function. Fixes: 25adc29407fb ("pinctrl: sunxi: Add support for the Allwinner H616 pin controller") Reported-by: SASANO Takayoshi <uaa@mx5.nisiq.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220105172952.23347-1-andre.przywara@arm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: cherryview: Trigger hwirq0 for interrupt-lines without a mappingHans de Goede2022-01-241-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit bdfbef2d29dc ("pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unused") made the code properly differentiate between unset vs (hwirq) 0 entries in the GPIO-controller interrupt-line to GPIO pinnumber/hwirq mapping. This is causing some boards to not boot. This commit restores the old behavior of triggering hwirq 0 when receiving an interrupt on an interrupt-line for which there is no mapping. Fixes: bdfbef2d29dc ("pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unused") Reported-and-tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220104164238.253142-1-hdegoede@redhat.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: thunderbay: rework loops looking for groups namesRafał Miłecki2022-01-241-46/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the outer loop iterate over functions as that's the real subject. This simplifies code (and reduces amount of lines of code) as allocating memory for names doesn't require extra checks anymore. While at it use local "group_names" variable. It fixes: drivers/pinctrl/pinctrl-thunderbay.c: In function 'thunderbay_add_functions': drivers/pinctrl/pinctrl-thunderbay.c:815:8: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 815 | grp = func->group_names; | ^ Ref: c26c4bfc1040 ("pinctrl: keembay: rework loops looking for groups names") Reported-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220111172919.6567-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: thunderbay: comment process of building functions a bitRafał Miłecki2022-01-241-9/+10
|/ | | | | | | | | | This should make code a bit easier to follow. While at it use some "for" loops to simplify array iteration loops. Ref: 5d0674999cc5 ("pinctrl: keembay: comment process of building functions a bit") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220111172919.6567-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'pinctrl-v5.17-1' of ↵Linus Torvalds2022-01-1269-1017/+6066
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control bulk updates from Linus Walleij: "Core changes: - New standard enumerator and corresponding device tree bindings for output impedance pin configuration. (Implemented and used in the Renesas rzg2l driver.) - Cleanup of Kconfig and Makefile to be somewhat orderly and alphabetic. New drivers: - Samsung Exynos 7885 pin controller. - Ocelot LAN966x pin controller. - Qualcomm SDX65 pin controller. - Qualcomm SM8450 pin controller. - Qualcomm PM8019, PM8226 and PM2250 pin controllers. - NXP/Freescale i.MXRT1050 pin controller. - Intel Thunder Bay pin controller. Enhancements: - Introduction of the string library helper function "kasprintf_strarray()" and subsequent use in Rockchip, ST and Armada pin control drivers, as well as the GPIO mockup driver. - The Ocelot pin controller has been extensively rewritten to use regmap and other modern kernel infrastructure. - The Microchip SGPIO driver has been converted to use regmap. - The SPEAr driver had been converted to use regmap. - Substantial cleanups and janitorial on the Apple pin control driver that was merged for v5.16. - Janitorial to remove of_node assignments in the GPIO portions that anyway get this handled in the GPIO core. - Minor cleanups and improvements in several pin controllers" * tag 'pinctrl-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (98 commits) pinctrl: imx: fix assigning groups names dt-bindings: pinctrl: mt8195: add wrapping node of pin configurations pinctrl: bcm: ns: use generic groups & functions helpers pinctrl: imx: fix allocation result check pinctrl: samsung: Use platform_get_irq_optional() to get the interrupt pinctrl: Propagate firmware node from a parent device dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings pinctrl: add one more "const" for generic function groups pinctrl: keembay: rework loops looking for groups names pinctrl: keembay: comment process of building functions a bit pinctrl: imx: prepare for making "group_names" in "function_desc" const ARM: dts: gpio-ranges property is now required pinctrl: aspeed: fix unmet dependencies on MFD_SYSCON for PINCTRL_ASPEED pinctrl: Get rid of duplicate of_node assignment in the drivers pinctrl-sunxi: don't call pinctrl_gpio_direction() pinctrl-bcm2835: don't call pinctrl_gpio_direction() pinctrl: bcm2835: Silence uninit warning pinctrl: Sort Kconfig and Makefile entries alphabetically pinctrl: Add Intel Thunder Bay pinctrl driver dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driver ...
| * pinctrl: imx: fix assigning groups namesRafał Miłecki2022-01-021-2/+4
| | | | | | | | | | | | | | | | | | | | | | This fixes regression caused by incorrect array indexing. Reported-by: Fabio Estevam <festevam@gmail.com> Fixes: 02f117134952 ("pinctrl: imx: prepare for making "group_names" in "function_desc" const") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Tested-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20211227122237.6363-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Merge tag 'samsung-pinctrl-5.17' of ↵Linus Walleij2021-12-263-4/+89
| |\ | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v5.17 1. Add support for Exynos7885. 2. Drop usage of platform_get_resource().
| | * pinctrl: samsung: Use platform_get_irq_optional() to get the interruptLad Prabhakar2021-12-251-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq_optional(). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211224145748.18754-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * pinctrl: samsung: Make symbol 'exynos7885_pin_ctrl' staticWei Yongjun2021-11-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sparse tool complains as follows: drivers/pinctrl/samsung/pinctrl-exynos-arm64.c:490:31: warning: symbol 'exynos7885_pin_ctrl' was not declared. Should it be static? This symbol is not used outside of pinctrl-exynos-arm64.c, so marks it static. Fixes: b0ef7b1a7a07 ("pinctrl: samsung: Add Exynos7885 SoC specific data") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20211123083617.2366756-1-weiyongjun1@huawei.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * pinctrl: samsung: Add Exynos7885 SoC specific dataDavid Virag2021-11-163-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add Samsung Exynos7885 SoC specific data to enable pinctrl support for all platforms based on Exynos7885. Signed-off-by: David Virag <virag.david003@gmail.com> Link: https://lore.kernel.org/r/20211031231720.46994-1-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | pinctrl: bcm: ns: use generic groups & functions helpersRafał Miłecki2021-12-262-115/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This simplifies ns driver and gets rid of ~70 lines of code. "const" had to be dropped from "struct ns_pinctrl_group" @pins to match "struct group_desc" @pins and pinctrl_generic_add_group(). Otherwise it would cause: drivers/pinctrl/bcm/pinctrl-ns.c: In function 'ns_pinctrl_probe': drivers/pinctrl/bcm/pinctrl-ns.c:277:13: warning: passing argument 3 of 'pinctrl_generic_add_group' discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 277 | group->pins, group->num_pins, NULL); | ~~~~~^~~~~~ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211222064344.14624-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: imx: fix allocation result checkRafał Miłecki2021-12-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix code to check correct variable value. Reported-by: Abel Vesa <abel.vesa@nxp.com> Fixes: 02f117134952 ("pinctrl: imx: prepare for making "group_names" in "function_desc" const") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20211222212807.27122-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: Propagate firmware node from a parent deviceAndy Shevchenko2021-12-225-20/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When creating MFD platform devices the firmware node is left unset. This, in particular, prevents GPIO library to use it for different purposes. Propagate firmware node from the parent device and let GPIO library do the right thing. While at it, slightly modify the headers to reflect the usage of APIs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Link: https://lore.kernel.org/r/20211216151227.58687-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: add one more "const" for generic function groupsRafał Miłecki2021-12-222-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generic code doesn't modify those strings and .get_function_groups callback has that extra "const" as well. This allows more flexibility in GENERIC_PINMUX_FUNCTIONS users. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-4-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: keembay: rework loops looking for groups namesRafał Miłecki2021-12-221-41/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the outer loop iterate over functions as that's the real subject. This simplifies code (and reduces amount of lines of code) as allocating memory for names doesn't require extra checks anymore. While at it use local "group_names" variable. The plan for "struct function_desc" is to make its "group_names" /double/ const. That will allow drivers to use it with static const data. This keembay "group_names" change is required to avoid: drivers/pinctrl/pinctrl-keembay.c: In function 'keembay_add_functions': drivers/pinctrl/pinctrl-keembay.c:1594:8: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 1594 | grp = func->group_names; | ^ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-3-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: keembay: comment process of building functions a bitRafał Miłecki2021-12-221-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | This should make code a bit easier to follow. While at it use some "for" loops to simplify array iteration loops. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: imx: prepare for making "group_names" in "function_desc" constRafał Miłecki2021-12-221-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The plan for "struct function_desc" is to make its "group_names" /double/ const. That will allow drivers to use it with static const data. This imx change is required to avoid: drivers/pinctrl/freescale/pinctrl-imx.c: In function 'imx_pinctrl_parse_functions': drivers/pinctrl/freescale/pinctrl-imx.c:672:24: error: assignment of read-only location '*(func->group_names + (sizetype)(i * 4))' 672 | func->group_names[i] = child->name; | ^ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | Merge tag 'renesas-pinctrl-for-v5.17-tag2' of ↵Linus Walleij2021-12-201-2/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.17 (take two) - Align comments in the R-Car V3U pin control driver.
| | * | pinctrl: renesas: r8a779a0: Align commentsGeert Uytterhoeven2021-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Align the CANFD4_TX and AVB2_MDC comments with all others. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/886ef84ea6b8314d348953792c9616b3e5dc28c0.1638537704.git.geert+renesas@glider.be
| * | | pinctrl: aspeed: fix unmet dependencies on MFD_SYSCON for PINCTRL_ASPEEDJulian Braha2021-12-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When PINCTRL_ASPEED_G* is selected, and MFD_SYSCON is not selected, Kbuild gives the following warnings: WARNING: unmet direct dependencies detected for PINCTRL_ASPEED Depends on [n]: PINCTRL [=y] && (ARCH_ASPEED [=n] || COMPILE_TEST [=y]) && OF [=y] && MFD_SYSCON [=n] Selected by [y]: - PINCTRL_ASPEED_G4 [=y] && PINCTRL [=y] && (MACH_ASPEED_G4 [=n] || COMPILE_TEST [=y]) && OF [=y] WARNING: unmet direct dependencies detected for PINCTRL_ASPEED Depends on [n]: PINCTRL [=y] && (ARCH_ASPEED [=n] || COMPILE_TEST [=y]) && OF [=y] && MFD_S> Selected by [y]: - PINCTRL_ASPEED_G5 [=y] && PINCTRL [=y] && (MACH_ASPEED_G5 [=n] || COMPILE_TEST [=y]) && O> WARNING: unmet direct dependencies detected for PINCTRL_ASPEED Depends on [n]: PINCTRL [=y] && (ARCH_ASPEED [=n] || COMPILE_TEST [=y]) && OF [=y] && MFD_S> Selected by [y]: - PINCTRL_ASPEED_G6 [=y] && PINCTRL [=y] && (MACH_ASPEED_G6 [=n] || COMPILE_TEST [=y]) && O> This is because MACH_ASPEED_G* depend on (ARCH_ASPEED || COMPILE_TEST). ARCH_ASPEED enables the MFD_SYSCON dependency, but COMPILE_TEST doesn't. These unmet dependency bugs were detected by Kismet, a static analysis tool for Kconfig. Please advise if this is not the appropriate solution. Signed-off-by: Julian Braha <julianbraha@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20211215214022.146391-1-julianbraha@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | Merge tag 'intel-pinctrl-v5.17-3' of ↵Linus Walleij2021-12-162-32/+100
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.17-3 * Intel Baytrail and Cherryview IRQ related fixes The following is an automated git shortlog grouped by driver: baytrail: - Set IRQCHIP_SET_TYPE_MASKED flag on the irqchip cherryview: - Use temporary variable for struct device - Do not allow the same interrupt line to be used by 2 pins - Don't use selection 0 to mark an interrupt line as unused
| | * | | pinctrl: cherryview: Use temporary variable for struct deviceAndy Shevchenko2021-11-261-28/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use temporary variable for struct device to make code neater. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | pinctrl: cherryview: Do not allow the same interrupt line to be used by 2 pinsHans de Goede2021-11-261-8/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is impossible to use the same interrupt line for 2 pins, this will result in the interrupts only being delivered to the IRQ handler for the pin for which chv_gpio_irq_type() was called last. The pinctrl-cherryview.c code relies on the BIOS to correctly setup the interrupt line, but there is a BIOS bug on at least the Medion Akoya E1239T and the GPD win models where both INT33FF:02 pin 8, used by the powerbutton and INT33FF:02 pin 21 used as IRQ input for the accelerometer are mapped to interrupt line 0. This causes 2 problems: 1. The accelerometer IRQ does not work, since the power button is probed later taking over the intr_lines[0] slot. 2. Since the accelerometer IRQ is not marked as wakeup, interrupt line 0 gets masked on suspend, causing the power button to not work to wake the system from suspend. Likewise on the Lenovo Yogabook, which has a touchscreen as keyboard and the keyboard half of the tablet also has a Wacom digitizer, the BIOS by default assigns the same interrupt line to the GPIOs used for their interrupts. Fix these problems by adding a check for this and assigning a new interrupt line to the 2nd pin for which chv_gpio_irq_type() gets called. With this fix in place the following 2 messages show up in dmesg on the Medion Akoya E1239T and the GPD win: cherryview-pinctrl INT33FF:02: interrupt line 0 is used by both pin 21 and pin 8 cherryview-pinctrl INT33FF:02: changing the interrupt line for pin 8 to 15 And the following gets logged on the Lenovo Yogabook: cherryview-pinctrl INT33FF:01: interrupt-line 0 is used by both pin 49 and pin 56 cherryview-pinctrl INT33FF:01: changing the interrupt line for pin 56 to 7 Note commit 9747070c11d6 ("Input: axp20x-pek - always register interrupt handlers") was added as a work around for the power button not being able to wakeup the system. This relies on using the PMIC's connection to the power button but that only works on systems with the AXP288 PMIC. Once this fix has been merged that workaround can be removed. Cc: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unusedHans de Goede2021-11-261-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The selection 0 is a perfectly valid, so stop using it to have the special meaning of interrupt line not used in the intr_lines. Instead introduce a special CHV_INVALID_HWIRQ value, derived from INVALID_HWIRQ. which is never a valid selection and use that to indicate unused interrupt lines. Cc: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | pinctrl: baytrail: Set IRQCHIP_SET_TYPE_MASKED flag on the irqchipHans de Goede2021-11-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The byt_irq_type function ends with the IRQ masked, this means that calls to irq_set_irq_type() while the IRQ is enabled end up masking it, which is wrong. Add the IRQCHIP_SET_TYPE_MASKED flag to fix this. This will make the IRQ core call mask() + unmask() on the IRQ around a set_type() call when the IRQ is enabled at the type of the call. Note in practice irq_set_irq_type() getting called while the IRQ is enabled almost never happens. I hit this with a buggy DSDT where a wrongly active (_STA returns 0xf) I2C ACPI devices point to an IRQ already in use by an _AEI handler, leading to the irq_set_irq_type() call in acpi_dev_gpio_irq_get_by() getting called while the IRQ is enabled. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | | pinctrl: Get rid of duplicate of_node assignment in the driversAndy Shevchenko2021-12-1624-37/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO library does copy the of_node from the parent device of the GPIO chip, there is no need to repeat this in the individual drivers. Remove these assignment all at once. For the details one may look into the of_gpio_dev_init() implementation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211214125855.33207-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl-sunxi: don't call pinctrl_gpio_direction()Hans Verkuil2021-12-161-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the direction directly without calling pinctrl_gpio_direction(). This avoids the mutex_lock() calls in that function, which would invalid the can_sleep = false. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Link: https://lore.kernel.org/r/20211206131648.1521868-4-hverkuil-cisco@xs4all.nl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl-bcm2835: don't call pinctrl_gpio_direction()Hans Verkuil2021-12-161-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the direction directly without calling pinctrl_gpio_direction(). This avoids the mutex_lock() calls in that function, which would invalid the can_sleep = false. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206131648.1521868-3-hverkuil-cisco@xs4all.nl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: bcm2835: Silence uninit warningLinus Walleij2021-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The uninitialized variable would be caught by the BUG_ON() logic below, but the kernel test robot cannot see that. Silence the warning by initializing the variable. Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20211209134513.306212-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: Sort Kconfig and Makefile entries alphabeticallyAndy Shevchenko2021-12-092-258/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sort Kconfig and Makefile entries alphabetically for better maintenance in the future. While at it fix some style issues, such as: - "Say Y"/"Say yes"/"Say Yes" --> "Say Y" - "pullup/pulldown" --> "pull-up and pull-down" - wrong indentation Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211209113456.33977-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: Add Intel Thunder Bay pinctrl driverLakshmi Sowjanya D2021-12-093-0/+1342
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | About Intel Thunder Bay: ----------------------- Intel Thunder Bay is a computer vision AI accelerator SoC based on ARM CPU. Pinctrl IP: ---------- The SoC has a customised pinmux controller IP which controls pin multiplexing and configuration. Thunder Bay pinctrl IP is not based on and have nothing in common with the existing pinctrl drivers. The registers used are incompatible with the existing drivers, so it requires a new driver. Add pinctrl driver to enable pin control support in the Intel Thunder Bay SoC. Co-developed-by: Kiran Kumar S <kiran.kumar1.s@intel.com> Signed-off-by: Kiran Kumar S <kiran.kumar1.s@intel.com> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Link: https://lore.kernel.org/r/20211201072626.19599-3-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: qcom: Add SM8450 pinctrl driverVinod Koul2021-12-093-0/+1699
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds pincontrol driver for tlmm block found in SM8450 SoC This patch is based on initial code downstream by Elliot Berman <eberman@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072434.3968768-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | Merge tag 'renesas-pinctrl-for-v5.17-tag1' of ↵Linus Walleij2021-12-054-111/+216
| |\ \ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.17 - Add generic support for output impedance, - Add drive strength and output impedance support for the RZ/G2L SoC, - Miscellaneous fixes and improvements.
| | * | | pinctrl: renesas: Remove unneeded locking around sh_pfc_read() callsGeert Uytterhoeven2021-11-191-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to acquire the spinlock when reading from a pin controller register: 1. Reading a single MMIO register is an atomic operation, 2. While sh_pfc_phys_to_virt() inside sh_pfc_read() has to traverse all mapped windows to find the appropriate virtual address, this does not need any locking, as the window mappings are never changed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/2008ca99f0079fd5d4e640b7ef78710c98cc9f77.1637143108.git.geert+renesas@glider.be
| | * | | pinctrl: renesas: rzg2l: Add support to get/set drive-strength and ↵Lad Prabhakar2021-11-151-48/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | output-impedance-ohms RZ/G2L supports two groups of pins Group-A and Group-B. For Group-A pins drive-strength can be configured and for Group-B output-impedance can be configured. This patch splits PIN_CFG_IOLH macro to PIN_CFG_IOLH_A/B and adds support to get/set drive-strength and output-impedance-ohms for the supported pins. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211110224622.16022-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | | pinctrl: renesas: rzg2l: Rename PIN_CFG_* macros to match HW manualLad Prabhakar2021-11-151-61/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the below macros to match the HW manual (Rev.1.00): PIN_CFG_IOLH_SD0 -> PIN_CFG_IO_VMC_SD0 PIN_CFG_IOLH_SD1 -> PIN_CFG_IO_VMC_SD1 PIN_CFG_IOLH_QSPI -> PIN_CFG_IO_VMC_QSPI PIN_CFG_IOLH_ETH0 -> PIN_CFG_IO_VMC_ETH0 PIN_CFG_IOLH_ETH1 -> PIN_CFG_IO_VMC_ETH1 Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211110224622.16022-6-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | | pinctrl: renesas: rzg2l: Add support to get/set pin config for GPIO port pinsLad Prabhakar2021-11-151-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to get/set pin config for GPIO port pins. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211110224622.16022-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | | pinctrl: renesas: rzg2l: Add helper functions to read/write pin configLad Prabhakar2021-11-151-24/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add helper functions to read/read modify write pin config. Switch to use helper functions for pins supporting PIN_CONFIG_INPUT_ENABLE capabilities. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211110224622.16022-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | | pinctrl: renesas: rzg2l: Rename RZG2L_SINGLE_PIN_GET_PORT macroLad Prabhakar2021-11-151-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename RZG2L_SINGLE_PIN_GET_PORT -> RZG2L_SINGLE_PIN_GET_PORT_OFFSET. Also, rename port -> port_offset in rzg2l_pinctrl_pinconf_set/get for readability. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211110224622.16022-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | | pinctrl: pinconf-generic: Add support for "output-impedance-ohms" to be ↵Lad Prabhakar2021-11-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | extracted from DT files Add "output-impedance-ohms" property to generic options used for DT parsing files. This enables drivers, which use generic pin configurations, to get the value passed to this property. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20211027134509.5036-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | | pinctrl: renesas: rza1: Fix kerneldoc function namesGeert Uytterhoeven2021-11-151-3/+3
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | make W=1: drivers/pinctrl/renesas/pinctrl-rza1.c:770: warning: expecting prototype for rza1_gpio_disable_free(). Prototype was for rza1_gpio_free() instead drivers/pinctrl/renesas/pinctrl-rza1.c:889: warning: expecting prototype for rza1_parse_pmx_function(). Prototype was for rza1_parse_pinmux_node() instead Fixes: 5a49b644b3075f88 ("pinctrl: Renesas RZ/A1 pin and gpio controller") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Link: https://lore.kernel.org/r/2188ede78110c64b8a3bfbfa794a085dac0e4cd2.1634645735.git.geert+renesas@glider.be
| * | | pinctrl: spear: plgpio: Introduce regmap phandleHerve Codina2021-12-051-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Resources need to be shared between pinmux and plgpio. Introduce regmap phandle in order to retrieve the regmap from the phandle if the property is present. This allows to retrieve an external regmap (ie the one used by pinmux if the phandle references the pinmux node) from plgpio. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20211202095255.165797-4-herve.codina@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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