From 939d002b7501128640aaeffe175d6331dcce2ca6 Mon Sep 17 00:00:00 2001 From: Doug Brown Date: Fri, 2 Dec 2022 19:35:22 +0100 Subject: pwm: pxa: Remove clk enable/disable from pxa_pwm_config MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that pxa_pwm_apply always enables the clock first, there is no need for pxa_pwm_config to do any clock enabling/disabling. Signed-off-by: Doug Brown Reviewed-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20221113233639.24244-4-doug@schmorgal.com Signed-off-by: Uwe Kleine-König Signed-off-by: Thierry Reding --- drivers/pwm/pwm-pxa.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'drivers/pwm') diff --git a/drivers/pwm/pwm-pxa.c b/drivers/pwm/pwm-pxa.c index 9ee9b41d62b8..cf4d22c91929 100644 --- a/drivers/pwm/pwm-pxa.c +++ b/drivers/pwm/pwm-pxa.c @@ -64,7 +64,6 @@ static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, unsigned long long c; unsigned long period_cycles, prescale, pv, dc; unsigned long offset; - int rc; offset = pwm->hwpwm ? 0x10 : 0; @@ -86,18 +85,10 @@ static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, else dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns); - /* NOTE: the clock to PWM has to be enabled first - * before writing to the registers - */ - rc = clk_prepare_enable(pc->clk); - if (rc < 0) - return rc; - writel(prescale, pc->mmio_base + offset + PWMCR); writel(dc, pc->mmio_base + offset + PWMDCR); writel(pv, pc->mmio_base + offset + PWMPCR); - clk_disable_unprepare(pc->clk); return 0; } -- cgit v1.2.1