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| author | Florian Hahn <flo@fhahn.com> | 2021-03-29 18:19:24 +0100 |
|---|---|---|
| committer | Florian Hahn <flo@fhahn.com> | 2021-03-29 18:56:00 +0100 |
| commit | a50037aaa6d5df403ff6b709a367164313ffd23f (patch) | |
| tree | 5096d1c14469f82b72adcb96643673853d4d6e0d | |
| parent | 10d02fb15b2d03d7f7b5c372946f5cb0e74cb220 (diff) | |
| download | llvm-a50037aaa6d5df403ff6b709a367164313ffd23f.tar.gz | |
[AArch64] Add a few more vector extension tests.
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll b/llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll index e55ae25391f4..c0eefa145895 100644 --- a/llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll +++ b/llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll @@ -145,3 +145,60 @@ define <4 x i64> @cfunc4(<4 x i16> %v0) nounwind { %r = sext <4 x i16> %v0 to <4 x i64> ret <4 x i64> %r } + +define <4 x i64> @zext_v4i8_to_v4i64(<4 x i8> %v0) nounwind { +; CHECK-LABEL: zext_v4i8_to_v4i64: +; CHECK-NEXT: bic.4h v0, #255, lsl #8 +; CHECK-NEXT: ushll.4s v0, v0, #0 +; CHECK-NEXT: ushll2.2d v1, v0, #0 +; CHECK-NEXT: ushll.2d v0, v0, #0 +; CHECK-NEXT: ret +; + %r = zext <4 x i8> %v0 to <4 x i64> + ret <4 x i64> %r +} + +define <4 x i64> @sext_v4i8_to_v4i64(<4 x i8> %v0) nounwind { +; CHECK-LABEL: sext_v4i8_to_v4i64: +; CHECK-NEXT: ushll.4s v0, v0, #0 +; CHECK-NEXT: ushll.2d v1, v0, #0 +; CHECK-NEXT: ushll2.2d v0, v0, #0 +; CHECK-NEXT: shl.2d v0, v0, #56 +; CHECK-NEXT: shl.2d v2, v1, #56 +; CHECK-NEXT: sshr.2d v1, v0, #56 +; CHECK-NEXT: sshr.2d v0, v2, #56 +; CHECK-NEXT: ret +; + %r = sext <4 x i8> %v0 to <4 x i64> + ret <4 x i64> %r +} + +define <8 x i64> @zext_v8i8_to_v8i64(<8 x i8> %v0) nounwind { +; CHECK-LABEL: zext_v8i8_to_v8i64: +; CHECK-NEXT: ushll.8h v0, v0, #0 +; CHECK-NEXT: ushll2.4s v2, v0, #0 +; CHECK-NEXT: ushll.4s v0, v0, #0 +; CHECK-NEXT: ushll2.2d v3, v2, #0 +; CHECK-NEXT: ushll2.2d v1, v0, #0 +; CHECK-NEXT: ushll.2d v2, v2, #0 +; CHECK-NEXT: ushll.2d v0, v0, #0 +; CHECK-NEXT: ret +; + %r = zext <8 x i8> %v0 to <8 x i64> + ret <8 x i64> %r +} + +define <8 x i64> @sext_v8i8_to_v8i64(<8 x i8> %v0) nounwind { +; CHECK-LABEL: sext_v8i8_to_v8i64: +; CHECK-NEXT: sshll.8h v0, v0, #0 +; CHECK-NEXT: sshll2.4s v2, v0, #0 +; CHECK-NEXT: sshll.4s v0, v0, #0 +; CHECK-NEXT: sshll2.2d v3, v2, #0 +; CHECK-NEXT: sshll2.2d v1, v0, #0 +; CHECK-NEXT: sshll.2d v2, v2, #0 +; CHECK-NEXT: sshll.2d v0, v0, #0 +; CHECK-NEXT: ret +; + %r = sext <8 x i8> %v0 to <8 x i64> + ret <8 x i64> %r +} |