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authorCraig Topper <craig.topper@intel.com>2018-05-22 04:22:44 +0000
committerCraig Topper <craig.topper@intel.com>2018-05-22 04:22:44 +0000
commitffa16d6080670616d94eca9eecced73458c45ff2 (patch)
treecca476a4a1c20d0c54f2c255622473df39f92229
parent8d367ae16d71008edda668b1b6728c7c62f2ae9f (diff)
downloadllvm-ffa16d6080670616d94eca9eecced73458c45ff2.tar.gz
[X86] Add hasSideEffects=0 back to ADOX instructions. Partial cherrypick from r328952.
This flag was present before the cherrypick of 328945. This matches what happened on trunk. I've left out the scheduling changes from r328952 to minimize changes from 6.0.1. llvm-svn: 332943
-rw-r--r--llvm/lib/Target/X86/X86InstrArithmetic.td4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td
index 0ae857c0bcc7..98cc8fb7439e 100644
--- a/llvm/lib/Target/X86/X86InstrArithmetic.td
+++ b/llvm/lib/Target/X86/X86InstrArithmetic.td
@@ -1351,11 +1351,13 @@ let Predicates = [HasADX], Defs = [EFLAGS], Uses = [EFLAGS],
IIC_BIN_CARRY_NONMEM>, T8PD;
// We don't have patterns for ADOX yet.
+ let hasSideEffects = 0 in {
def ADOX32rr : I<0xF6, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src0, GR32:$src),
"adox{l}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
def ADOX64rr : RI<0xF6, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src0, GR64:$src),
"adox{q}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
+ } // hasSideEffects = 0
} // SchedRW
let mayLoad = 1, SchedRW = [WriteALULd] in {
@@ -1372,10 +1374,12 @@ let Predicates = [HasADX], Defs = [EFLAGS], Uses = [EFLAGS],
IIC_BIN_CARRY_MEM>, T8PD;
// We don't have patterns for ADOX yet.
+ let hasSideEffects = 0 in {
def ADOX32rm : I<0xF6, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src0, i32mem:$src),
"adox{l}\t{$src, $dst|$dst, $src}", [], IIC_BIN_MEM>, T8XS;
def ADOX64rm : RI<0xF6, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src0, i64mem:$src),
"adox{q}\t{$src, $dst|$dst, $src}", [], IIC_BIN_MEM>, T8XS;
}
+ } // hasSideEffects = 0
}