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author | Sanjay Patel <spatel@rotateright.com> | 2021-09-27 13:42:55 -0400 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2021-09-27 14:10:26 -0400 |
commit | d992950078efd81971b8d84a862671b17af88bff (patch) | |
tree | b6909a3382fdadd4d8c0d320cf2c9d56d70e70f9 | |
parent | e27a6db5298f6ba3c1dbc8bab25c769cfa761b2a (diff) | |
download | llvm-d992950078efd81971b8d84a862671b17af88bff.tar.gz |
[InstCombine] add tests for opposing shifts separated by trunc; NFC
-rw-r--r-- | llvm/test/Transforms/InstCombine/shift-shift.ll | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/shift-shift.ll b/llvm/test/Transforms/InstCombine/shift-shift.ll index b53b5124ee4f..7c57cdf2f07f 100644 --- a/llvm/test/Transforms/InstCombine/shift-shift.ll +++ b/llvm/test/Transforms/InstCombine/shift-shift.ll @@ -1,6 +1,9 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s +declare void @use8(i8) +declare void @use32(i32) + ; These would crash if we didn't check for a negative shift. ; https://llvm.org/bugs/show_bug.cgi?id=12967 @@ -133,3 +136,91 @@ define <2 x i32> @lshr_lshr_vec(<2 x i32> %A) { %C = lshr <2 x i32> %B, <i32 4, i32 5> ret <2 x i32> %C } + +define i8 @shl_trunc_bigger_lshr(i32 %x) { +; CHECK-LABEL: @shl_trunc_bigger_lshr( +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 2 +; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 +; CHECK-NEXT: [[LT:%.*]] = and i8 [[TMP2]], -8 +; CHECK-NEXT: ret i8 [[LT]] +; + %rt = lshr i32 %x, 5 + %tr = trunc i32 %rt to i8 + %lt = shl i8 %tr, 3 + ret i8 %lt +} + +define i8 @shl_trunc_smaller_lshr(i32 %x) { +; CHECK-LABEL: @shl_trunc_smaller_lshr( +; CHECK-NEXT: [[X_TR:%.*]] = trunc i32 [[X:%.*]] to i8 +; CHECK-NEXT: [[TMP1:%.*]] = shl i8 [[X_TR]], 2 +; CHECK-NEXT: [[LT:%.*]] = and i8 [[TMP1]], -32 +; CHECK-NEXT: ret i8 [[LT]] +; + %rt = lshr i32 %x, 3 + %tr = trunc i32 %rt to i8 + %lt = shl i8 %tr, 5 + ret i8 %lt +} + +define i8 @shl_trunc_bigger_lshr_use1(i32 %x) { +; CHECK-LABEL: @shl_trunc_bigger_lshr_use1( +; CHECK-NEXT: [[RT:%.*]] = lshr i32 [[X:%.*]], 5 +; CHECK-NEXT: call void @use32(i32 [[RT]]) +; CHECK-NEXT: [[TR:%.*]] = trunc i32 [[RT]] to i8 +; CHECK-NEXT: [[LT:%.*]] = shl i8 [[TR]], 3 +; CHECK-NEXT: ret i8 [[LT]] +; + %rt = lshr i32 %x, 5 + call void @use32(i32 %rt) + %tr = trunc i32 %rt to i8 + %lt = shl i8 %tr, 3 + ret i8 %lt +} + +define i8 @shl_trunc_smaller_lshr_use1(i32 %x) { +; CHECK-LABEL: @shl_trunc_smaller_lshr_use1( +; CHECK-NEXT: [[RT:%.*]] = lshr i32 [[X:%.*]], 3 +; CHECK-NEXT: call void @use32(i32 [[RT]]) +; CHECK-NEXT: [[TR:%.*]] = trunc i32 [[RT]] to i8 +; CHECK-NEXT: [[LT:%.*]] = shl i8 [[TR]], 5 +; CHECK-NEXT: ret i8 [[LT]] +; + %rt = lshr i32 %x, 3 + call void @use32(i32 %rt) + %tr = trunc i32 %rt to i8 + %lt = shl i8 %tr, 5 + ret i8 %lt +} + +define i8 @shl_trunc_bigger_lshr_use2(i32 %x) { +; CHECK-LABEL: @shl_trunc_bigger_lshr_use2( +; CHECK-NEXT: [[RT:%.*]] = lshr i32 [[X:%.*]], 5 +; CHECK-NEXT: [[TR:%.*]] = trunc i32 [[RT]] to i8 +; CHECK-NEXT: call void @use8(i8 [[TR]]) +; CHECK-NEXT: [[LT1:%.*]] = shl nuw nsw i32 [[RT]], 3 +; CHECK-NEXT: [[LT:%.*]] = trunc i32 [[LT1]] to i8 +; CHECK-NEXT: ret i8 [[LT]] +; + %rt = lshr i32 %x, 5 + %tr = trunc i32 %rt to i8 + call void @use8(i8 %tr) + %lt = shl i8 %tr, 3 + ret i8 %lt +} + +define i8 @shl_trunc_smaller_lshr_use2(i32 %x) { +; CHECK-LABEL: @shl_trunc_smaller_lshr_use2( +; CHECK-NEXT: [[RT:%.*]] = lshr i32 [[X:%.*]], 3 +; CHECK-NEXT: [[TR:%.*]] = trunc i32 [[RT]] to i8 +; CHECK-NEXT: call void @use8(i8 [[TR]]) +; CHECK-NEXT: [[LT1:%.*]] = shl i32 [[RT]], 5 +; CHECK-NEXT: [[LT:%.*]] = trunc i32 [[LT1]] to i8 +; CHECK-NEXT: ret i8 [[LT]] +; + %rt = lshr i32 %x, 3 + %tr = trunc i32 %rt to i8 + call void @use8(i8 %tr) + %lt = shl i8 %tr, 5 + ret i8 %lt +} |