summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorVladislav Khmelevsky <och95@yandex.ru>2023-02-15 17:18:37 +0400
committerTobias Hieta <tobias@hieta.se>2023-03-24 08:44:37 +0100
commit32b8cc7031f01252fa817f3ec30c709d6eedbf73 (patch)
tree2b6092448cd240ead79f49648ffd46e410d2c887
parent867c59c2da1791fcdfd51a750202b3c8c2b4e7ad (diff)
downloadllvm-32b8cc7031f01252fa817f3ec30c709d6eedbf73.tar.gz
[BOLT] Fix data reoder for aarch64
Use proper relocation for aarch64 Differential Revision: https://reviews.llvm.org/D144095
-rw-r--r--bolt/include/bolt/Core/Relocation.h3
-rw-r--r--bolt/lib/Core/BinarySection.cpp2
-rw-r--r--bolt/lib/Core/Relocation.cpp6
3 files changed, 10 insertions, 1 deletions
diff --git a/bolt/include/bolt/Core/Relocation.h b/bolt/include/bolt/Core/Relocation.h
index eb211005722b..1729ad64aa51 100644
--- a/bolt/include/bolt/Core/Relocation.h
+++ b/bolt/include/bolt/Core/Relocation.h
@@ -106,6 +106,9 @@ struct Relocation {
/// Return code for a PC-relative 8-byte relocation
static uint64_t getPC64();
+ /// Return code for a ABS 8-byte relocation
+ static uint64_t getAbs64();
+
/// Return true if this relocation is PC-relative. Return false otherwise.
bool isPCRelative() const { return isPCRelative(Type); }
diff --git a/bolt/lib/Core/BinarySection.cpp b/bolt/lib/Core/BinarySection.cpp
index fefa83e47cc1..1e28da4cb2f7 100644
--- a/bolt/lib/Core/BinarySection.cpp
+++ b/bolt/lib/Core/BinarySection.cpp
@@ -252,7 +252,7 @@ void BinarySection::reorderContents(const std::vector<BinaryData *> &Order,
// of the reordered segment to force LLVM to recognize and map this
// section.
MCSymbol *ZeroSym = BC.registerNameAtAddress("Zero", 0, 0, 0);
- addRelocation(OS.tell(), ZeroSym, ELF::R_X86_64_64, 0xdeadbeef);
+ addRelocation(OS.tell(), ZeroSym, Relocation::getAbs64(), 0xdeadbeef);
uint64_t Zero = 0;
OS.write(reinterpret_cast<const char *>(&Zero), sizeof(Zero));
diff --git a/bolt/lib/Core/Relocation.cpp b/bolt/lib/Core/Relocation.cpp
index ee90be50258a..9ca57288c1b5 100644
--- a/bolt/lib/Core/Relocation.cpp
+++ b/bolt/lib/Core/Relocation.cpp
@@ -637,6 +637,12 @@ bool Relocation::isPCRelative(uint64_t Type) {
return isPCRelativeX86(Type);
}
+uint64_t Relocation::getAbs64() {
+ if (Arch == Triple::aarch64)
+ return ELF::R_AARCH64_ABS64;
+ return ELF::R_X86_64_64;
+}
+
size_t Relocation::emit(MCStreamer *Streamer) const {
const size_t Size = getSizeForType(Type);
MCContext &Ctx = Streamer->getContext();