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authorEvan Cheng <evan.cheng@apple.com>2008-05-10 00:17:50 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-05-10 00:17:50 +0000
commitbec201fa06e1d7ddc7c96a5e0fb6a2d1d59f8baa (patch)
tree9f90b2b4c2724d11d3dfcdfbea273d60986af38a
parent19e3c857b8fb6b43234944bfbc95ac919ca93a71 (diff)
downloadllvm-bec201fa06e1d7ddc7c96a5e0fb6a2d1d59f8baa.tar.gz
If all sources of a PHI node are defined by an implicit_def, just emit an implicit_def instead of a copy.
llvm-svn: 50927
-rw-r--r--llvm/lib/CodeGen/PHIElimination.cpp18
-rw-r--r--llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll25
2 files changed, 36 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index a82e78e5a0d8..8b1f3078709a 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -127,11 +127,15 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
return true;
}
-static bool isSourceDefinedByImplicitDef(MachineInstr *MPhi, unsigned SrcIdx,
+static bool isSourceDefinedByImplicitDef(MachineInstr *MPhi,
MachineRegisterInfo *MRI) {
- unsigned SrcReg = MPhi->getOperand(SrcIdx*2+1).getReg();
- MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
- return DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF;
+ for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
+ unsigned SrcReg = MPhi->getOperand(i).getReg();
+ MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
+ if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
+ return false;
+ }
+ return true;
}
/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
@@ -156,9 +160,9 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
// into the phi node destination.
//
const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
- if (NumSrcs == 1 && isSourceDefinedByImplicitDef(MPhi, 0, MRI))
- // If the only source of a PHI node is an implicit_def, just emit an
- // implicit_def instead of a copy.
+ if (isSourceDefinedByImplicitDef(MPhi, MRI))
+ // If all sources of a PHI node are implicit_def, just emit an implicit_def
+ // instead of a copy.
BuildMI(MBB, AfterPHIsIt, TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
else
TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
diff --git a/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
new file mode 100644
index 000000000000..c0b196113137
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | llc -march=x86
+
+ %struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+
+define fastcc void @t() nounwind {
+entry:
+ br i1 false, label %bb23816.preheader, label %bb23821
+
+bb23816.preheader: ; preds = %entry
+ %tmp23735 = and i32 0, 2 ; <i32> [#uses=0]
+ br label %bb23830
+
+bb23821: ; preds = %entry
+ br i1 false, label %bb23830, label %bb23827
+
+bb23827: ; preds = %bb23821
+ %tmp23829 = getelementptr %struct.V* null, i32 0, i32 42 ; <i32*> [#uses=0]
+ br label %bb23830
+
+bb23830: ; preds = %bb23827, %bb23821, %bb23816.preheader
+ %scaledInDst.2.reg2mem.5 = phi i8 [ undef, %bb23827 ], [ undef, %bb23821 ], [ undef, %bb23816.preheader ] ; <i8> [#uses=1]
+ %toBool35047 = icmp eq i8 %scaledInDst.2.reg2mem.5, 0 ; <i1> [#uses=1]
+ %bothcond39107 = or i1 %toBool35047, false ; <i1> [#uses=0]
+ unreachable
+}