For PR9500.

--- Merging r128041 into '.':
U    test/CodeGen/X86/fast-isel-gep.ll
U    lib/Target/X86/X86FastISel.cpp

llvm-svn: 128042

2 files changed, 41 insertions, 16 deletions

diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 6fa928462b28..88744861e86e 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -399,33 +399,39 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
         Disp += SL->getElementOffset(Idx);
       } else {
         uint64_t S = TD.getTypeAllocSize(GTI.getIndexedType());
-        SmallVector<const Value *, 4> Worklist;
-        Worklist.push_back(Op);
-        do {
-          Op = Worklist.pop_back_val();
+        for (;;) {
           if (const ConstantInt *CI = dyn_cast<ConstantInt>(Op)) {
             // Constant-offset addressing.
             Disp += CI->getSExtValue() * S;
-          } else if (isa<AddOperator>(Op) &&
-                     isa<ConstantInt>(cast<AddOperator>(Op)->getOperand(1))) {
-            // An add with a constant operand. Fold the constant.
+            break;
+          }
+          if (isa<AddOperator>(Op) &&
+              (!isa<Instruction>(Op) ||
+               FuncInfo.MBBMap[cast<Instruction>(Op)->getParent()]
+                 == FuncInfo.MBB) &&
+              isa<ConstantInt>(cast<AddOperator>(Op)->getOperand(1))) {
+            // An add (in the same block) with a constant operand. Fold the
+            // constant.
             ConstantInt *CI =
               cast<ConstantInt>(cast<AddOperator>(Op)->getOperand(1));
             Disp += CI->getSExtValue() * S;
-            // Add the other operand back to the work list.
-            Worklist.push_back(cast<AddOperator>(Op)->getOperand(0));
-          } else if (IndexReg == 0 &&
-                     (!AM.GV || !Subtarget->isPICStyleRIPRel()) &&
-                     (S == 1 || S == 2 || S == 4 || S == 8)) {
+            // Iterate on the other operand.
+            Op = cast<AddOperator>(Op)->getOperand(0);
+            continue;
+          }
+          if (IndexReg == 0 &&
+              (!AM.GV || !Subtarget->isPICStyleRIPRel()) &&
+              (S == 1 || S == 2 || S == 4 || S == 8)) {
             // Scaled-index addressing.
             Scale = S;
             IndexReg = getRegForGEPIndex(Op).first;
             if (IndexReg == 0)
               return false;
-          } else
-            // Unsupported.
-            goto unsupported_gep;
-        } while (!Worklist.empty());
+            break;
+          }
+          // Unsupported.
+          goto unsupported_gep;
+        }
       }
     }
     // Check for displacement overflow.
diff --git a/llvm/test/CodeGen/X86/fast-isel-gep.ll b/llvm/test/CodeGen/X86/fast-isel-gep.ll
index fbe0243716bd..48abfd0f26e5 100644
--- a/llvm/test/CodeGen/X86/fast-isel-gep.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-gep.ll
@@ -87,4 +87,23 @@ define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind {
 ; X64-NEXT: ret
 }
 
+; PR9500, rdar://9156159 - Don't do non-local address mode folding,
+; because it may require values which wouldn't otherwise be live out
+; of their blocks.
+define void @test6() {
+if.end:                                           ; preds = %if.then, %invoke.cont
+  %tmp15 = load i64* undef
+  %dec = add i64 %tmp15, 13
+  store i64 %dec, i64* undef
+  %call17 = invoke i8* @_ZNK18G__FastAllocString4dataEv()
+          to label %invoke.cont16 unwind label %lpad
 
+invoke.cont16:                                    ; preds = %if.then14
+  %arrayidx18 = getelementptr inbounds i8* %call17, i64 %dec
+  store i8 0, i8* %arrayidx18
+  unreachable
+
+lpad:                                             ; preds = %if.end19, %if.then14, %if.end, %entry
+  unreachable
+}
+declare i8* @_ZNK18G__FastAllocString4dataEv() nounwind