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authorTanya Lattner <tonic@nondot.org>2008-10-17 21:36:29 +0000
committerTanya Lattner <tonic@nondot.org>2008-10-17 21:36:29 +0000
commit8c07c4ede04f4a06b8e090da65dc38706543f5cf (patch)
tree049203484345c2a9f84a5170b816759bd5c12795
parent738c257ed4ca32826b829c376c0108e3afba2166 (diff)
downloadllvm-8c07c4ede04f4a06b8e090da65dc38706543f5cf.tar.gz
remove v[if]cmp functionality from the 2.4 release. These instructions will be removed or substantially changes in mainline after the 2.4 release and we don't want to have to support these for backwards compatibility purposes. Patch by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@57732 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--docs/LangRef.html108
-rw-r--r--lib/AsmParser/LLLexer.cpp2
-rw-r--r--test/Assembler/vector-cmp.ll14
-rw-r--r--test/CodeGen/X86/2008-07-23-VSetCC.ll27
-rw-r--r--test/CodeGen/X86/vfcmp.ll12
-rw-r--r--test/Transforms/ConstProp/2008-07-07-VectorCompare.ll25
6 files changed, 1 insertions, 187 deletions
diff --git a/docs/LangRef.html b/docs/LangRef.html
index 84d377ee1a88..4d81dd7ea0f7 100644
--- a/docs/LangRef.html
+++ b/docs/LangRef.html
@@ -147,8 +147,6 @@
<ol>
<li><a href="#i_icmp">'<tt>icmp</tt>' Instruction</a></li>
<li><a href="#i_fcmp">'<tt>fcmp</tt>' Instruction</a></li>
- <li><a href="#i_vicmp">'<tt>vicmp</tt>' Instruction</a></li>
- <li><a href="#i_vfcmp">'<tt>vfcmp</tt>' Instruction</a></li>
<li><a href="#i_phi">'<tt>phi</tt>' Instruction</a></li>
<li><a href="#i_select">'<tt>select</tt>' Instruction</a></li>
<li><a href="#i_call">'<tt>call</tt>' Instruction</a></li>
@@ -1778,12 +1776,6 @@ following is the syntax for constant expressions:</p>
<dt><b><tt>fcmp COND ( VAL1, VAL2 )</tt></b></dt>
<dd>Performs the <a href="#i_fcmp">fcmp operation</a> on constants.</dd>
- <dt><b><tt>vicmp COND ( VAL1, VAL2 )</tt></b></dt>
- <dd>Performs the <a href="#i_vicmp">vicmp operation</a> on constants.</dd>
-
- <dt><b><tt>vfcmp COND ( VAL1, VAL2 )</tt></b></dt>
- <dd>Performs the <a href="#i_vfcmp">vfcmp operation</a> on constants.</dd>
-
<dt><b><tt>extractelement ( VAL, IDX )</tt></b></dt>
<dd>Perform the <a href="#i_extractelement">extractelement
@@ -4053,106 +4045,6 @@ always yields an <a href="#t_primitive">i1</a> result, as follows:
<!-- _______________________________________________________________________ -->
<div class="doc_subsubsection">
- <a name="i_vicmp">'<tt>vicmp</tt>' Instruction</a>
-</div>
-<div class="doc_text">
-<h5>Syntax:</h5>
-<pre> &lt;result&gt; = vicmp &lt;cond&gt; &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>vicmp</tt>' instruction returns an integer vector value based on
-element-wise comparison of its two integer vector operands.</p>
-<h5>Arguments:</h5>
-<p>The '<tt>vicmp</tt>' instruction takes three operands. The first operand is
-the condition code indicating the kind of comparison to perform. It is not
-a value, just a keyword. The possible condition code are:
-<ol>
- <li><tt>eq</tt>: equal</li>
- <li><tt>ne</tt>: not equal </li>
- <li><tt>ugt</tt>: unsigned greater than</li>
- <li><tt>uge</tt>: unsigned greater or equal</li>
- <li><tt>ult</tt>: unsigned less than</li>
- <li><tt>ule</tt>: unsigned less or equal</li>
- <li><tt>sgt</tt>: signed greater than</li>
- <li><tt>sge</tt>: signed greater or equal</li>
- <li><tt>slt</tt>: signed less than</li>
- <li><tt>sle</tt>: signed less or equal</li>
-</ol>
-<p>The remaining two arguments must be <a href="#t_vector">vector</a> or
-<a href="#t_integer">integer</a> typed. They must also be identical types.</p>
-<h5>Semantics:</h5>
-<p>The '<tt>vicmp</tt>' instruction compares <tt>op1</tt> and <tt>op2</tt>
-according to the condition code given as <tt>cond</tt>. The comparison yields a
-<a href="#t_vector">vector</a> of <a href="#t_integer">integer</a> result, of
-identical type as the values being compared. The most significant bit in each
-element is 1 if the element-wise comparison evaluates to true, and is 0
-otherwise. All other bits of the result are undefined. The condition codes
-are evaluated identically to the <a href="#i_icmp">'<tt>icmp</tt>'
-instruction</a>.
-
-<h5>Example:</h5>
-<pre>
- &lt;result&gt; = vicmp eq &lt;2 x i32&gt; &lt; i32 4, i32 0&gt;, &lt; i32 5, i32 0&gt; <i>; yields: result=&lt;2 x i32&gt; &lt; i32 0, i32 -1 &gt;</i>
- &lt;result&gt; = vicmp ult &lt;2 x i8 &gt; &lt; i8 1, i8 2&gt;, &lt; i8 2, i8 2 &gt; <i>; yields: result=&lt;2 x i8&gt; &lt; i8 -1, i8 0 &gt;</i>
-</pre>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
- <a name="i_vfcmp">'<tt>vfcmp</tt>' Instruction</a>
-</div>
-<div class="doc_text">
-<h5>Syntax:</h5>
-<pre> &lt;result&gt; = vfcmp &lt;cond&gt; &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt;</pre>
-<h5>Overview:</h5>
-<p>The '<tt>vfcmp</tt>' instruction returns an integer vector value based on
-element-wise comparison of its two floating point vector operands. The output
-elements have the same width as the input elements.</p>
-<h5>Arguments:</h5>
-<p>The '<tt>vfcmp</tt>' instruction takes three operands. The first operand is
-the condition code indicating the kind of comparison to perform. It is not
-a value, just a keyword. The possible condition code are:
-<ol>
- <li><tt>false</tt>: no comparison, always returns false</li>
- <li><tt>oeq</tt>: ordered and equal</li>
- <li><tt>ogt</tt>: ordered and greater than </li>
- <li><tt>oge</tt>: ordered and greater than or equal</li>
- <li><tt>olt</tt>: ordered and less than </li>
- <li><tt>ole</tt>: ordered and less than or equal</li>
- <li><tt>one</tt>: ordered and not equal</li>
- <li><tt>ord</tt>: ordered (no nans)</li>
- <li><tt>ueq</tt>: unordered or equal</li>
- <li><tt>ugt</tt>: unordered or greater than </li>
- <li><tt>uge</tt>: unordered or greater than or equal</li>
- <li><tt>ult</tt>: unordered or less than </li>
- <li><tt>ule</tt>: unordered or less than or equal</li>
- <li><tt>une</tt>: unordered or not equal</li>
- <li><tt>uno</tt>: unordered (either nans)</li>
- <li><tt>true</tt>: no comparison, always returns true</li>
-</ol>
-<p>The remaining two arguments must be <a href="#t_vector">vector</a> of
-<a href="#t_floating">floating point</a> typed. They must also be identical
-types.</p>
-<h5>Semantics:</h5>
-<p>The '<tt>vfcmp</tt>' instruction compares <tt>op1</tt> and <tt>op2</tt>
-according to the condition code given as <tt>cond</tt>. The comparison yields a
-<a href="#t_vector">vector</a> of <a href="#t_integer">integer</a> result, with
-an identical number of elements as the values being compared, and each element
-having identical with to the width of the floating point elements. The most
-significant bit in each element is 1 if the element-wise comparison evaluates to
-true, and is 0 otherwise. All other bits of the result are undefined. The
-condition codes are evaluated identically to the
-<a href="#i_fcmp">'<tt>fcmp</tt>' instruction</a>.
-
-<h5>Example:</h5>
-<pre>
- &lt;result&gt; = vfcmp oeq &lt;2 x float&gt; &lt; float 4, float 0 &gt;, &lt; float 5, float 0 &gt; <i>; yields: result=&lt;2 x i32&gt; &lt; i32 0, i32 -1 &gt;</i>
- &lt;result&gt; = vfcmp ult &lt;2 x double&gt; &lt; double 1, double 2 &gt;, &lt; double 2, double 2&gt; <i>; yields: result=&lt;2 x i64&gt; &lt; i64 -1, i64 0 &gt;</i>
-</pre>
-</div>
-
-<!-- _______________________________________________________________________ -->
-<div class="doc_subsubsection">
<a name="i_phi">'<tt>phi</tt>' Instruction</a>
</div>
diff --git a/lib/AsmParser/LLLexer.cpp b/lib/AsmParser/LLLexer.cpp
index 39d62bf71cff..e52be5599726 100644
--- a/lib/AsmParser/LLLexer.cpp
+++ b/lib/AsmParser/LLLexer.cpp
@@ -572,8 +572,6 @@ int LLLexer::LexIdentifier() {
INSTKEYWORD("xor", BinaryOpVal, Xor, XOR);
INSTKEYWORD("icmp", OtherOpVal, ICmp, ICMP);
INSTKEYWORD("fcmp", OtherOpVal, FCmp, FCMP);
- INSTKEYWORD("vicmp", OtherOpVal, VICmp, VICMP);
- INSTKEYWORD("vfcmp", OtherOpVal, VFCmp, VFCMP);
INSTKEYWORD("phi", OtherOpVal, PHI, PHI_TOK);
INSTKEYWORD("call", OtherOpVal, Call, CALL);
diff --git a/test/Assembler/vector-cmp.ll b/test/Assembler/vector-cmp.ll
index 383c0faf6206..d39b81d562a6 100644
--- a/test/Assembler/vector-cmp.ll
+++ b/test/Assembler/vector-cmp.ll
@@ -1,16 +1,4 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {global.*vicmp slt}
-; PR2317
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin9.2.2"
-define <4 x i32> @foo(<4 x float> %a, <4 x float> %b) nounwind {
-entry:
- %cmp = vfcmp olt <4 x float> %a, %b ; <4 x i32> [#uses=1]
- ret <4 x i32> %cmp
-}
-
-global <4 x i32> vicmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> ) ;
-
-@B = external global i32;
-
-global <4 x i32> vicmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> ) ;
diff --git a/test/CodeGen/X86/2008-07-23-VSetCC.ll b/test/CodeGen/X86/2008-07-23-VSetCC.ll
index 735c610bc7a9..135faa72be02 100644
--- a/test/CodeGen/X86/2008-07-23-VSetCC.ll
+++ b/test/CodeGen/X86/2008-07-23-VSetCC.ll
@@ -1,30 +1,3 @@
; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium
-; PR2575
-
-define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
- br i1 false, label %bb.nph, label %._crit_edge
-
-bb.nph: ; preds = %bb.nph, %0
- vicmp sgt <4 x i32> zeroinitializer, < i32 -128, i32 -128, i32 -128, i32 -128 > ; <<4 x i32>>:1 [#uses=1]
- extractelement <4 x i32> %1, i32 3 ; <i32>:2 [#uses=1]
- lshr i32 %2, 31 ; <i32>:3 [#uses=1]
- trunc i32 %3 to i1 ; <i1>:4 [#uses=1]
- select i1 %4, i32 -1, i32 0 ; <i32>:5 [#uses=1]
- insertelement <4 x i32> zeroinitializer, i32 %5, i32 3 ; <<4 x i32>>:6 [#uses=1]
- and <4 x i32> zeroinitializer, %6 ; <<4 x i32>>:7 [#uses=1]
- bitcast <4 x i32> %7 to <4 x float> ; <<4 x float>>:8 [#uses=1]
- mul <4 x float> zeroinitializer, %8 ; <<4 x float>>:9 [#uses=1]
- bitcast <4 x float> %9 to <4 x i32> ; <<4 x i32>>:10 [#uses=1]
- or <4 x i32> %10, zeroinitializer ; <<4 x i32>>:11 [#uses=1]
- bitcast <4 x i32> %11 to <4 x float> ; <<4 x float>>:12 [#uses=1]
- mul <4 x float> %12, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 > ; <<4 x float>>:13 [#uses=1]
- sub <4 x float> %13, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 > ; <<4 x float>>:14 [#uses=1]
- extractelement <4 x float> %14, i32 3 ; <float>:15 [#uses=1]
- call float @fmaxf( float 0.000000e+00, float %15 ) ; <float>:16 [#uses=0]
- br label %bb.nph
-
-._crit_edge: ; preds = %0
- ret void
-}
declare float @fmaxf(float, float)
diff --git a/test/CodeGen/X86/vfcmp.ll b/test/CodeGen/X86/vfcmp.ll
index 85b82a0ac8e8..7629ee71dc7d 100644
--- a/test/CodeGen/X86/vfcmp.ll
+++ b/test/CodeGen/X86/vfcmp.ll
@@ -1,13 +1 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
-; PR2620
-
-define void @t(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
- vfcmp olt <2 x double> zeroinitializer, zeroinitializer ; <<2 x i64>>:1 [#uses=1]
- extractelement <2 x i64> %1, i32 1 ; <i64>:2 [#uses=1]
- lshr i64 %2, 63 ; <i64>:3 [#uses=1]
- trunc i64 %3 to i1 ; <i1>:4 [#uses=1]
- zext i1 %4 to i8 ; <i8>:5 [#uses=1]
- insertelement <2 x i8> zeroinitializer, i8 %5, i32 1 ; <<2 x i8>>:6 [#uses=1]
- store <2 x i8> %6, <2 x i8>* null
- ret void
-}
diff --git a/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll b/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
index 4c7146320485..fd34d13987b6 100644
--- a/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
+++ b/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
@@ -1,28 +1,3 @@
; RUN: llvm-as < %s | opt -constprop -disable-output
-; PR2529
-define <4 x i32> @test1(i32 %argc, i8** %argv) {
-entry:
- %foo = vicmp slt <4 x i32> undef, <i32 14, i32 undef, i32 undef, i32 undef>
- ret <4 x i32> %foo
-}
-define <4 x i32> @test2(i32 %argc, i8** %argv) {
-entry:
- %foo = vicmp slt <4 x i32> <i32 undef, i32 undef, i32 undef, i32
-undef>, <i32 undef, i32 undef, i32 undef, i32 undef>
- ret <4 x i32> %foo
-}
-
-
-define <4 x i32> @test3() {
- %foo = vfcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float
-undef>, <float 1.0, float 1.0, float 1.0, float undef>
- ret <4 x i32> %foo
-}
-
-define <4 x i32> @test4() {
- %foo = vfcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, <float 1.0, float 1.0, float 1.0, float 0.0>
-
- ret <4 x i32> %foo
-}