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| author | Hal Finkel <hfinkel@anl.gov> | 2014-12-09 02:43:05 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-12-09 02:43:05 +0000 |
| commit | 2df2ca1fd9908dc1c0286087d05ca2e9618dda5d (patch) | |
| tree | a3149090f0266b27669afa29a96e5432d1df8d16 | |
| parent | 22a9d1a4d3761d2bf7ff5a0e9cb6dd8bae7dc9f7 (diff) | |
| download | llvm-2df2ca1fd9908dc1c0286087d05ca2e9618dda5d.tar.gz | |
Fixup backport of r223318
TM.getSubtargetImpl()->getRegisterInfo() needs to be TM.getRegisterInfo() in 3.5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223749 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 4c7dabba2bb7..57960598c83f 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -177,7 +177,7 @@ namespace { std::vector<SDValue> &OutOps) override { // We need to make sure that this one operand does not end up in r0 // (because we might end up lowering this as 0(%op)). - const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo(); + const TargetRegisterInfo *TRI = TM.getRegisterInfo(); const TargetRegisterClass *TRC = TRI->getPointerRegClass(*MF, /*Kind=*/1); SDValue RC = CurDAG->getTargetConstant(TRC->getID(), MVT::i32); SDValue NewOp = |