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authorDavid Majnemer <david.majnemer@gmail.com>2014-12-08 09:11:36 +0000
committerDavid Majnemer <david.majnemer@gmail.com>2014-12-08 09:11:36 +0000
commitaf44f024445cbab39d44166a9bd574c4b584d191 (patch)
tree1873678f9cee11b2b0aace2fd88aa74ac24f4ec8
parentf38406688d8013baeb86d5f2ee895217b3a9f28c (diff)
downloadllvm-af44f024445cbab39d44166a9bd574c4b584d191.tar.gz
Merging r214385:
------------------------------------------------------------------------ r214385 | majnemer | 2014-07-30 21:49:29 -0700 (Wed, 30 Jul 2014) | 9 lines InstCombine: Correctly propagate NSW/NUW for x-(-A) -> x+A We can only propagate the nsw bits if both subtraction instructions are marked with the appropriate bit. N.B. We only propagate the nsw bit in InstCombine because the nuw case is already handled in InstSimplify. This fixes PR20189. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223644 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/InstCombine/InstCombineAddSub.cpp12
-rw-r--r--test/Transforms/InstCombine/sub.ll9
2 files changed, 18 insertions, 3 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index e80d6a9ee39b..ed0e1c908888 100644
--- a/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1462,11 +1462,17 @@ Instruction *InstCombiner::visitSub(BinaryOperator &I) {
if (Value *V = SimplifyUsingDistributiveLaws(I))
return ReplaceInstUsesWith(I, V);
- // If this is a 'B = x-(-A)', change to B = x+A. This preserves NSW/NUW.
+ // If this is a 'B = x-(-A)', change to B = x+A.
if (Value *V = dyn_castNegVal(Op1)) {
BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V);
- Res->setHasNoSignedWrap(I.hasNoSignedWrap());
- Res->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
+
+ if (const auto *BO = dyn_cast<BinaryOperator>(Op1)) {
+ assert(BO->getOpcode() == Instruction::Sub &&
+ "Expected a subtraction operator!");
+ if (BO->hasNoSignedWrap() && I.hasNoSignedWrap())
+ Res->setHasNoSignedWrap(true);
+ }
+
return Res;
}
diff --git a/test/Transforms/InstCombine/sub.ll b/test/Transforms/InstCombine/sub.ll
index 67b7c4996b07..114aff7efb85 100644
--- a/test/Transforms/InstCombine/sub.ll
+++ b/test/Transforms/InstCombine/sub.ll
@@ -464,3 +464,12 @@ define i32 @test38(i32 %A) {
; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[ICMP]] to i32
; CHECK-NEXT: ret i32 [[SEXT]]
}
+
+define i32 @test39(i32 %A, i32 %x) {
+ %B = sub i32 0, %A
+ %C = sub nsw i32 %x, %B
+ ret i32 %C
+; CHECK-LABEL: @test39(
+; CHECK: %C = add i32 %x, %A
+; CHECK: ret i32 %C
+}