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author | Guy Blank <guy.blank@intel.com> | 2016-11-24 06:52:24 +0000 |
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committer | Guy Blank <guy.blank@intel.com> | 2016-11-24 06:52:24 +0000 |
commit | 56938b6ec471a2724da88355f8a19d6829f10ef5 (patch) | |
tree | 3b6b2ef042328714dd2a53e9ed0e0595084544b4 | |
parent | 11d3b2906a6c6de048ae25f38443e2792d0339ce (diff) | |
download | llvm-56938b6ec471a2724da88355f8a19d6829f10ef5.tar.gz |
merge r276347
[X86] Do not use AND8ri8 in AVX512 pattern
This variant is (as documented in the TD) for disassembler use only, and should
not be used in patterns - it is longer, and is broken on 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@287855 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86InstrAVX512.td | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/no-and8ri8.ll | 18 |
2 files changed, 19 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index de4129f86541..803a7e35c209 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -2124,7 +2124,7 @@ let Predicates = [HasAVX512] in { (COPY_TO_REGCLASS (i16 (EXTRACT_SUBREG $src, sub_16bit)), VK1)>; def : Pat<(i1 (trunc (i8 GR8:$src))), - (COPY_TO_REGCLASS (i16 (SUBREG_TO_REG (i64 0), (AND8ri8 $src, (i8 1)), + (COPY_TO_REGCLASS (i16 (SUBREG_TO_REG (i64 0), (AND8ri $src, (i8 1)), sub_8bit)), VK1)>; def : Pat<(i1 (trunc (i8 (assertzext_i1 GR8:$src)))), diff --git a/test/CodeGen/X86/no-and8ri8.ll b/test/CodeGen/X86/no-and8ri8.ll new file mode 100644 index 000000000000..57f33226602e --- /dev/null +++ b/test/CodeGen/X86/no-and8ri8.ll @@ -0,0 +1,18 @@ +; RUN: llc -mtriple=x86_64-pc-linux -mattr=+avx512f --show-mc-encoding < %s | FileCheck %s + +declare i1 @bar() + +; CHECK-LABEL: @foo +; CHECK-NOT: andb {{.*}} # encoding: [0x82, +define i1 @foo(i1 %i) nounwind { +entry: + br i1 %i, label %if, label %else + +if: + %r = call i1 @bar() + br label %else + +else: + %ret = phi i1 [%r, %if], [true, %entry] + ret i1 %ret +} |