diff options
| author | Hans Wennborg <hans@hanshq.net> | 2019-08-27 14:36:51 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@hanshq.net> | 2019-08-27 14:36:51 +0000 |
| commit | 48278dc2af9556690f16069191b80237c27732b0 (patch) | |
| tree | e522b8183ce8b0a8f3973a08dc59870a603f6dd6 | |
| parent | ae6f41b6142bfc2ae21c04604871e97c25ccc31a (diff) | |
| download | llvm-48278dc2af9556690f16069191b80237c27732b0.tar.gz | |
ReleaseNotes: PowerPC
By Lei Huang!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_90@370065 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | docs/ReleaseNotes.rst | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst index 94621312b74c..268528ed1f9b 100644 --- a/docs/ReleaseNotes.rst +++ b/docs/ReleaseNotes.rst @@ -144,7 +144,30 @@ Changes to the MIPS Target Changes to the PowerPC Target ----------------------------- - During this release ... +* Improved handling of TOC pointer spills for indirect calls + +* Improve precision of square root reciprocal estimate + +* Enabled MachinePipeliner support for P9 with -ppc-enable-pipeliner. + +* MMX/SSE/SSE2 intrinsics headers have been ported to PowerPC using Altivec. + +* Machine verification failures cleaned, EXPENSIVE_CHECKS will run + MachineVerification by default now. + +* PowerPC scheduling enhancements, with customized PPC specific scheduler + strategy. + +* Inner most loop now always align to 32 bytes. + +* Enhancements of hardware loops interaction with LSR. + +* New builtins added, eg: __builtin_setrnd. + +* Various codegen improvements for both scalar and vector code + +* Various new exploitations and bug fixes, eg: exploited P9 maddld. + Changes to the SystemZ Target ----------------------------- |